Documentation and download available at http://www.FreeRTOS.org/
Changes between V8.2.2 and V8.2.3 released October 16, 2015
RTOS kernel updates:
+ Fix bug identified in a modification made in V8.2.2 to the software timer
code that allows tickless low power applications to sleep indefinitely
when software timers are used.
+ Simplify and improve efficiency of stack overflow checking.
+ Add xTaskNotifyStateClear() API function.
+ New IAR and GCC Cortex-R ports for microprocessors that do not use an ARM
generic interrupt controller (GIC).
+ New PIC32MEC14xx port.
+ Add support for PIC32MZ EF parts (with floating point) into the PIC32MZ
+ Zynq7000 port layer now declares the functions that setup and clear the
tick interrupt as weak symbols so they can be overridden by the
application, and uses a global XScuGic object so the same object can be
used by the application code.
+ Introduced configUSE_TASK_FPU_SUPPORT, although the PIC32MZ EF port is
currently the only port that uses it.
+ Updates to RL78 and 78K0 IAR port layers to improve support for
combinations of memory models.
+ Minor updates to heap_5.c to remove compiler warnings generated by some
+ License simplifications. See /FreeRTOS/License/license.txt in the
+ Update directory names to use WolfSSL instead of CyaSSL, inline with
+ Update to latest WolfSSL code.
+ Update to latest FreeRTOS+Trace recorder code.
+ Add in the FreeRTOS+Trace recorder library required for streaming trace.
Demo application changes:
+ Add demo applications for Renesas RZ/T (Cortex-R), PIC32MZ EF (PIC32 with
floating point hardware), PIC32MEC14xx, RX71M, RX113 and RX231.
+ General tidy up of spelling and compiler warnings.
Changes between V8.2.1 and V8.2.2 released August 12, 2015
RTOS kernel updates:
+ Added Intel IA32/x86 32-bit port.
+ General maintenance.
+ PRIVILEGED_FUNCTION and PRIVILEGED_DATA macros, which are used in memory
protected systems, have been added to the newer event group and software
+ Add the errno definitions used by FreeRTOS+ components into projdefs.h.
+ Remove the restriction that prevented tick-less idle implementations
waiting indefinitely when software timers were used in the same
+ Introduce xTaskNotifyAndQueryFromISR() as the interrupt safe version of
+ Add additional NOPs to the MSP430X port layers to ensure strict compliance
with the hardware documentation.
+ Microblaze port: Added option for port optimised task selection.
+ Microblaze port: Previously tasks inherited the exception enable state
at the time the task was created. Now all tasks are created with
exceptions enabled if the Microblaze design supports exceptions.
+ Windows port: Add additional safe guards to ensure the correct start up
sequence and thread switching timing.
+ Windows port: Improve the implementation of the port optimised task
selection assembly code.
+ Update heap_4 and heap_5 to allow use on 64-bit processors.
+ Simplify the code that creates a queue.
+ General improved tick-less idle behaviour.
+ Ensure none of the variables in the common kernel files are initialised to
anything other than zero.
+ Correct calculation of xHeapStructSize in heap_4 and heap_5.
Demo application updates:
+ Added demo project for the new IA32/x86 port that targets the Galileo
+ Added MSP430FR5969 demos (previously provided as a separate download).
+ Added FreeRTOS BSP repository for automatic creation of FreeRTOS
applications in the Xilinx SDK.
+ Added Atmel Studio / GCC project for the SAMV71 (ARM Cortex-M7)
+ Update Xilinx SDK projects to use version 2015.2 of the SDK.
+ Remove Microblaze demos that were using obsolete tools.
+ Add MSP43FR5969 IAR and CCS demos.
+ Updated FreeRTOS+Trace recorder library, which requires an update to the
+ Added Reliance Edge source code and demo application. Reliance edge is
a fail safe transactional file system ideal for applications that require
file storage, and especially when high reliability is essential.
+ Introduce configAPPLICATION_PROVIDES_cOutputBuffer to allow FreeRTOS+CLI
users to place the output buffer at a fixed memory address.
+ Improve the NetworkInterface.c file provided for the Windows port of
Changes between V8.2.0 and V8.2.1 released 24th March 2015.
RTOS kernel updates:
+ Added user definable and flexible thread local storage facility.
+ Added vTimerSetTimerID() API function to complement the pvTimerGetTimerID()
function to allow the timer's ID to be used as timer local storage.
+ Fixed a potential issue related to the use of queue sets from an ISR.
+ Some updates to the Xilinx Microblaze GCC port.
+ Added ARM Cortex-M4F port for Texas Instruments Code Composer Studio.
+ Added ARM Cortex-M7 r0p1 port layer for IAR, GCC and Keil which contains a
minor errata work around. All other ARM Cortex-M7 core revisions should
use the ARM Cortex-M4F port.
+ Exclude the whole of croutine.c if configUSE_CO_ROUTINES is set to 0.
+ Change some data types from uint32_t to size_t in preparation for 64-bit
+ Update the PIC32 port to remove deprecation warnings output by the latest
Demo application updates:
+ Added demo application for TI's ARM Cortex-M4F based MSP432
microcontroller using IAR, Keil and CCS compilers.
+ Added demo application for STM32F ARM Cortex-M7 based microcontroller
using IAR and Keil.
+ Added demo application for Atmel SAMV71 ARM Cortex-M7 based
microcontroller using IAR and Keil.
+ Added Microblaze demo that uses the 2014.4 version of the Xilinx SDK and
runs on the KC705 evaluation board (Kintex FPGA).
Changes between V8.1.2 and V8.2.0 released 16th January 2015
Changes between release candidate 1 and the official release are restricted
to maintenance only.
Significant RTOS kernel updates:
+ MAJOR NEW FEATURE! Task notifications. Please see the following URL for
+ NEW HEADER FILE REQUIRED! Obsolete definitions have been separated into
a new header file called FreeRTOS/Source/include/deprecated_definitions.h.
This header file must be present to build. Note some of the obsolete
definitions are still used by very old demo application projects.
Other RTOS kernel updates:
+ Made xSemaphoreGiveFromISR() a function rather than a macro that calls
xQueueGenericSendFromISR(). This allows for major performance
enhancements at the expense of some additional code size if both functions
are used in the same application. NOTE: In most uses cases such use of
a semaphore can now be replaced with a task notification which is smaller
and faster still.
+ The TCB is now always allocated such that the task's stack grows away from
the TCB (improves debugging of stack overflows as the overflow will not
overwrite the task's name).
+ GCC, IAR and Keil Cortex-M4F ports now use more inlining (performance
enhancements at the cost of a little additional code space).
+ Queues are now allocated with a single call to pvPortMalloc() which
allocates both the queue structure and the queue storage area.
+ Introduced a new critical section macro for reading the tick count that
defines away to nothing in cases where the width of the tick allows the
tick count to be read atomically (performance benefits - especially when
optimisation is on).
+ Introduced configAPPLICATION_ALLOCATED_HEAP in heap_4.c to allow the
application writer to provide their own heap array - and in so doing
control the location of the heap.
+ Introduced configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES which, when set, will
include known values in both list and list item structures. The values
are intended to assist debugging. If the values get overwritten then it
is likely application code has written over RAM used by the kernel.
+ configASSERT()s in all Cortex-M ports used to test the lowest 5 bits of
the interrupt control register to detect taskENTER_CRITICAL() being called
from an interrupt. This has been changed to test all 8 bits.
+ Introduced uxTaskPriorityGetFromISR().
+ Microblze V8 port now tests XPAR_MICROBLAZE_0_USE_FPU for inequality to 0
rather than equality to 1, and 2 and 3 are also valid values.
+ Cortex-A5 GIC-less port no longer passes the address of the interrupting
peripheral into the interrupt handler.
+ Fix an issue in FreeRTOS-MPU where an attempt was made to free the stack
belonging to a task when the task was deleted, even when the stack was
+ Utility (helper) functions that format task statistic information into
human readable tables now pad task names with spaces to ensure columns
line up correctly even where task name lengths vary greatly.
+ Update FreeRTOS+Trace recorder library to version 2.7.0.
Demo application updates:
+ Added two new standard demo task sets: IntSemTest and TaskNotify.
+ Added port and demo application for Atmel SAMA5D4 Cortex-A5 MPU.
+ Added demo application for Altera Cyclone V Cortex-A9 MPU.
+ Updated Zynq demo to use version 2014.4 of Xilinx's SDK and added in
demo tasks for new RTOS features.
+ Updated Atmel SAM4E and SAM4S demos to include a lot of additional test
and demo tasks.
+ Fixed a corner case issue in Atmel SAM4L low power tickless
implementation, and added button interrupt handling.
+ Make the interrupt queue tests more tolerant to heave CPU loads.
+ Updated MSVC FreeRTOS simulator demo to include the latest standard test
and demo tasks.
+ Updated MingW/Eclipse FreeRTOS simulator demo to match the FreeRTOS MSVC
+ Updated all demos that use FreeRTOS+Trace to work with the latest trace
Changes between V8.1.1 and V8.1.2 released September 2nd 2014
Move the defaulting of configUSE_PORT_OPTIMISED_TASK_SELECTION into the
individual port layers where necessary so it does not affect ports that do
not support the definition.
Changes between V8.1.0 and V8.1.1 released August 29th 2014
By popular requests - a minor patch to V8.1.0 to re-instate the ability to
give a mutex type semaphore (with priority inheritance) from an interrupt
Changes between V8.0.1 and V8.1.0 released August 26th 2014
FreeRTOS scheduler, kernel, demo and test updates:
+ Improved the priority inheritance algorithms to assist integration with
off the shelf middleware that may hold multiple mutexes simultaneously.
+ Introduce heap_5.c, which is similar to heap_4.c but allows the heap to
span multiple non-contiguous memory regions.
+ Updated all Cortex-A9 ports to help trap a couple of common usage errors -
the first being when a task incorrectly attempts to exit its implementing
function and the second being when a non interrupt safe API function is
called from an interrupt.
+ Update all Cortex-A9 ports to remove obsolete mode switches prior to
restoring a task context.
+ configUSE_PORT_OPTIMISED_TASK_SELECTION now defaults to 1 instead of 0.
+ Update all Cortex-M3/4F ports to trap a non interrupt safe API function
being called from an interrupt handler.
+ Simplify the alignment checks in heap_4.c.
+ Update the MSVC Windows simulator demo to use heap_5.c in place of
heap_4.c to ensure end users have an example to refer to.
+ Updated standard demo test code to test the new priority inheritance
+ Updated the standard demo tasks to make use of stdint and the FreeRTOS
specific typedefs that were introduced in FreeRTOS V8.0.0.
+ Introduce the pdMS_TO_TICKS() macro as a more user friendly and intuitive
alternative to pdTICKS_PER_MS - both of which can be used to convert a
time specified in milliseconds to a time specified in RTOS ticks.
+ Fix a bug in the Tasking compiler's Cortex-M port that resulted in an
incorrect value being written to the basepri register. This only effects
users of the Tasking compiler.
+ Update the Zynq demo to use version 2014.2 of the SDK and add in an lwIP
example that demonstrates lwIP being used with both its raw and sockets
+ Updated the CCS Cortex-R4 port to enable it to be built with the latest
New ports and demo applications:
+ Two Renesas RX64M ports (RXv2 core) and demos introduced, one for the GCC
compiler and one for the Renesas compiler. Both demos use e2 studio.
+ Generic IAR Cortex-A5 port (without any reliance on a GIC) introduced.
The new port is demonstrated on an Atmel SAMA5D3 XPlained board.
FreeRTOS+ component updates:
+ Update CyaSSL to the latest version.
+ Updated the FreeRTOS+ components supplied directly by Real Time Engineers
Ltd. to make use of stdint and the FreeRTOS specific typedefs that were
introduced in FreeRTOS V8.0.0.
+ Rework and simplify the FreeRTOS+FAT SL RAM disk driver.
Miscellaneous updates and maintenance:
+ Update the IAR and DS-5/ARM RZ demos to target the official RZ RSK
hardware in place of the previously targeted Renesas internal (not
publicly available) hardware.
+ Various other maintenance tasks.
Changes between V8.0.0 and V8.0.1 released 2nd May 2014
+ Minor fixes to the event group functionality that was released in V8.0.0.
The 'clear bits from ISR' functionality is now implemented using a
deferred interrupt callback instead of a function, and the 'wait bits' and
'task sync' functions now correctly clear internal control bits before
returning a value in every possible path through the respective functions.
+ Ensure the updating of internal control data is protected by a critical
section after a task is deleted or suspended.
+ Minor fixes to FreeRTOS+FAT SL - namely seeking beyond the end of a file
when the offset was not a multiple of the sector size.
+ Ensure Cortex-A9 system registers are only ever accessed as 32-bit values,
even when only the lest significant byte of the register is implemented.
+ Updated the XMC4200 IAR project so it links with version 7.x of the IAR
+ Add RL78L1C demo.
+ Add pcTimerGetTimerName() API function.
+ Call _reclaim_reent() when a task is deleted if configUSE_NEWLIB_REENTRANT
Changes between V7.6.0 and V8.0.0 released 19th Feb 2014
FreeRTOS V8.x.x is a drop-in compatible replacement for FreeRTOS V7.x.x,
although a change to the type used to reference character strings may result
in application code generating a few (easily clearable) compiler warnings
after the upgrade, and an updated typedef naming convention means use of the
old typedef names is now discouraged.
See http://www.freertos.org/upgrading-to-FreeRTOS-V8.html for full
New features and functionality:
+ Event groups - see http://www.freertos.org/FreeRTOS-Event-Groups.html
+ Centralised deferred interrupt processing - see
+ Previously, when a task left the Blocked state, a context switch was
performed if the priority of the unblocked task was greater than or equal
to the priority of the Running task. Now a context switch is only
performed if the priority of the unblocked task is greater than the
priority of the Running task.
+ New low power tickless demonstration project that targets the ST STM32L
microcontroller - see
+ Add xPortGetMinimumEverFreeHeapSize() to heap_4.c.
+ Small change to the tickless low power implementation on the SAM4L to
ensure the alarm value (compare match value) cannot be set to zero when a
tickless period is exited due to an interrupt originating from a source
other than the RTOS tick.
+ Update the GCC/Eclipse Win32 simulator demo to make better use of Eclipse
resource filters and match the functionality of the MSVC equivalent.
+ xTaskIsTaskSuspended() is no longer a public function. Use
eTaskGetState() in its place.
+ Improved trace macros, including tracing of heap usage.
+ Remove one level of indirection when accepting interrupts on the PIC32MZ.
+ Add Cortex-A9 GCC port layer.
+ Add Xilinx Zynq demo application.
Changes between V7.5.3 and V7.6.0 released 18th November 2013
V7.6.0 changes some behaviour when the co-operative scheduler is used (when
configUSE_PREEMPTION is set to 0). It is important to note that the
behaviour of the pre-emptive scheduler is unchanged - the following
description only applies when configUSE_PREEMPTION is set to 0:
WHEN configUSE_PREEMPTION IS SET TO 0 (which is in a small minority of
cases) a context switch will now only occur when a task places itself into
the Blocked state, or explicitly calls taskYIELD(). This differs from
previous versions, where a context switch would also occur when implicitly
moving a higher priority task out of the Blocked state. For example,
previously, WHEN PREEMPTION WAS TURNED OFF, if task A unblocks task B by
writing to a queue, then the scheduler would switch to the higher priority
task. Now, WHEN PREEMPTION IS TURNED OFF, if task A unblocks task B by
writing to a queue, task B will not start running until task A enters the
Blocked state or task A calls taskYIELD(). [If configUSE_PREEMPTION is not
set to 0, so the normal pre-emptive scheduler is being used, then task B
will start running immediately that it is moved out of the Blocked state].
+ Added a port layer and a demo project for the new PIC32MZ architecture.
+ Update the PIC32MX port layer to re-introduce some ehb instructions that
were previously removed, add the ability to catch interrupt stack
overflows (previously only task stack overflows were trapped), and also
add the ability to catch an application task incorrectly attempting to
return from its implementing function.
+ Make dramatic improvements to the performance of the Win32 simulator port
+ Ensure tasks that are blocked indefinitely report their state as Blocked
instead of Suspended.
+ Slight improvement to the Cortex-M4F port layers where previously one
register was inadvertently being saved twice.
+ Introduce the xSemaphoreCreateBinary() API function to ensure consistency
in the semantics of how each semaphore type is created. It is no longer
recommended to use vSemaphoreCreateBinary() (the version prefixed with a
'v'), although it will remain in the code for backward compatibility.
+ Update the Cortex-M0 port layers to allow the scheduler to be started
without using the SVC handler.
+ Added a build configuration to the PIC32MX MPLAB X demo project that
targets the PIC32 USB II starter kit. Previously all the build
configurations required the Explorer 16 hardware.
+ Some of the standard demo tasks have been updated to ensure they execute
correctly with the updated co-operative scheduling behaviour.
+ Added comprehensive demo for the Atmel SAM4E, including use of
FreeRTOS+UDP, FreeRTOS+FAT SL and FreeRTOS+CLI.
+ Minor maintenance on FreeRTOS+UDP.
Changes between V7.5.2 and V7.5.3 released October 14 2013
+ Prior to V7.5.x yields requested from the tick hook would occur in the
same tick interrupt - revert to that original behaviour.
+ New API function uxQueueSpacesAvailable().
+ Introduced the prvTaskExitError() function to Cortex-M0, Cortex-M3/4
and Cortex-M4F ports. prvTaskExitError() is used to trap tasks that
attempt to return from their implementing functions (tasks should call
vTaskDelete( NULL ); if they want to exit).
+ The Cortex-M0 version of portSET_INTERRUPT_MASK_FROM_ISR and
portCLEAR_INTERRUPT_MASK_FROM_ISR are now fully nestable.
+ Improved behaviour and robustness of the default Cortex-M tickless idle
+ Add workaround for silicon errata PMU_CM001 in Infineon XMC4000 devices to
all Cortex-M4F ports.
+ Add Cortex-M0 port for Keil.
+ Updated Cortus port.
+ Ensure _impure_ptr is initialised before the scheduler is started.
Previously it was not set until the first context switch.
+ Update FreeRTOS+UDP to V1.0.1 - including direct integration of the
FreeRTOS+Nabto task, improvements to the DHCP behaviour, and a correction
to the test that prevents the network event hook being called on the first
network down event. The FreeRTOS+UDP change history is maintained
+ Correct the __NVIC_PRIO_BITS setting in the LPC18xx.h header files
provided in the NXP CMSIS library, then update the interrupts used by the
LPC18xx demos accordingly.
+ Replace double quotes (") with single quotes (') in FreeRTOS+CLI help
strings to ensure the strings can be used with the JSON descriptions used
in the FreeRTOS+Nabto demos.
Demo and miscellaneous changes:
+ Added demo for the Atmel SAMD20 Cortex-M0+. The demo includes
+ Added a demo for the Infineon Cortex-M0 that can be built with the IAR
Keil and GCC tools.
+ Updated the Infineon XMC4000 demos for IAR, Keil, GCC and Tasking tools,
with additional build configurations to directly support the XMC4200 and
XMC4400 devices, in addition to the previously supported XMC4500.
+ Updated the demo application.
+ Added additional trace macros traceMALLOC and traceFREE to track heap
Changes between V7.5.0 and V7.5.2 released July 24 2013
V7.5.2 makes the new Cortex-M vPortCheckInterruptPriority() function
compatible with the STM32 standard peripheral driver library, and adds
an extra critical section to the default low power tickless mode
implementation. Only users of the STM32 peripheral library or the default
tickless implementation need update from version 7.5.0.
Changes between V7.4.2 and V7.5.0 released July 19 2013
V7.5.0 is a major upgrade that includes multiple scheduling and efficiency
improvements, and some new API functions.
Compatibility information for FreeRTOS users:
FreeRTOS V7.5.0 is backward compatible with FreeRTOS V7.4.0 with one
exception; the vTaskList() and vTaskGetRunTimeStats() functions are now
considered legacy, having been replaced by the single uxTaskGetSystemState()
function. configUSE_STATS_FORMATTING_FUNCTIONS must be set to 1 in
FreeRTOSConfig.h for vTaskList() and vTaskGetRunTimeStats() to be
Compatibility information for FreeRTOS port writers:
vTaskIncrementTick() is now called xTaskIncrementTick() (because it now
returns a value).
+ Multiple scheduling and efficiency improvements.
+ Core kernel files now pass PC-Lint V8 static checking without outputting
any warnings (information on the test conditions will follow).
New API functions:
+ uxTaskGetSystemState() http://www.freertos.org/uxTaskGetSystemState.html
+ xQueueOverwrite() http://www.freertos.org/xQueueOverwrite.html
The following ports and demos, which were previously available separately,
are now incorporated into the main FreeRTOS zip file download:
+ ARM Cortex-A9 IAR
+ ARM Cortex-A9 ARM compiler
+ Renesas RZ
+ Microsemi SmartFusion2
New FreeRTOSConfig.h settings
+ (MPU port only) The configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
options provides a mechanism that allows application writers to execute
certain functions in privileged mode even when a task is running in user
+ Ports that support interrupt nesting now include a configASSERT() that
will trigger if an interrupt safe FreeRTOS function is called from an
interrupt that has a priority designated as above the maximum system/API
call interrupt priority.
+ The included FreeRTOS+Trace recorder code has been updated to the latest
version, and the demo applications that use the trace recorder code have
been updated accordingly.
+ The FreeRTOS Windows Simulator (MSVC version only) has been updated to
include a new basic 'blinky' build option in addition to the original
comprehensive build option.
+ Improve RAM usage efficiency of heap_4.c and heap_2.c.
+ Prevent heap_4.c from attempting to free memory blocks that were not
allocated by heap_4.c, or have already been freed.
+ As FreeRTOS now comes with FreeRTOS+FAT SL (donated by HCC) the Chan FATfs
files have been removed from FreeRTOS/Demo/Common.
+ Fix build error when R4 port is build in co-operative mode.
+ Multiple port and demo application maintenance activities.
Changes between V7.4.1 and V7.4.2 released May 1 2013
NOTE: There are no changes in the FreeRTOS kernel between V7.4.1 and V7.4.2
+ Added FreeRTOS+FAT SL source code and demo project. The demo project
runs in the FreeRTOS Windows simulator for easy and hardware independent
experimentation and evaluation. See http://www.FreeRTOS.org/fat_sl
Changes between V7.4.0 and V7.4.1 released April 18 2013
+ To ensure strict conformance with the spec and ensure compatibility with
future chips data and instruction barrier instructions have been added to
the yield macros of Cortex-M and Cortex-R port layers. For efficiency
the Cortex-M port layer "yield" and "yield" from ISR are now implemented
separately as the barrier instructions are not required in the ISR case.
+ Added FreeRTOS+UDP into main download.
+ Reorganised the FreeRTOS+ directory so it now matches the FreeRTOS
directory with Source and Demo subdirectories.
+ Implemented the Berkeley sockets select() function in FreeRTOS+UDP.
+ Changed (unsigned) casting in calls to standard library functions with
+ Added the Atmel SAM4L and Renesas RX100 demos that demonstrates the
tickless (tick suppression) low power FreeRTOS features.
+ Add a new RL78 IAR demo that targets numerous new RL78 chips and
+ Adjusted stack alignment on RX200 ports to ensure an assert was not
falsely triggered when configASSERT() is defined.
+ Updated the Cortex_M4F_Infineon_XMC4500_IAR demo to build with the latest
version of EWARM.
+ Corrected header comments in the het.c and het.h files (RM48/TMS570 demo).
Changes between V7.3.0 and V7.4.0 released February 20 2013
+ New feature: Queue sets. See:
+ Overhauled the default tickless idle mode implementation provided with the
ARM Cortex-M3 port layers.
+ Enhanced tickless support in the core kernel code with the introduction of
the configEXPECTED_IDLE_TIME_BEFORE_SLEEP macro and the
+ Added the QueueSet.c common demo/test file. Several demo applications
have been updated to use the new demo/test tasks.
+ Removed reliance on the PLIB libraries from the MPLAB PIC32 port layer and
+ Added the FreeRTOS+Trace recorder code to the MSVC Win32 demo.
+ Renamed eTaskStateGet() to eTaskGetState() for consistency, and added a
pre-processor macro for backward compatibility with the previous name.
+ Updated functions implemented in the core queue.c source file to allow
queue.h to be included from the .c file directly (this prevents compiler
warnings that were generated by some compilers).
+ Updated the CCS Cortex-R4 port layer to replace the CLZ assembler function
with the CLZ compiler intrinsic that is provided by the latest versions of
the CCS ARM compiler.
+ Updated all heap_x.c implementations to replace the structure that was
used to ensure the start of the heap was aligned with a more portable
direct C code implementation.
+ Added support for PIC24 devices that include EDS.
+ Minor optimisations to the PIC32 port layer.
+ Minor changes to tasks.c that allow the state viewer plug-ins to display
+ Bug fix: Update prvProcessReceivedCommands() in timers.c to remove an
issue that could occur if the priority of the timer daemon task was set
below the priority of tasks that used timer services.
+ Update the FreeRTOS+Trace recorder code to the latest version.
Changes between V7.2.0 and V7.3.0 released October 31 2012
+ Added ability to override the default scheduler task selection mechanism
with implementations that make use of architecture specific instructions.
+ Added ability to suppress tick interrupts during idle time, and in so
doing, provide the ability to make use of architecture specific low power
+ Added the portSUPPRESS_TICKS_AND_SLEEP() macro and vTaskStepTick() helper
+ Added the configSYSTICK_CLOCK_HZ configuration constant.
+ Reworked the Cortex-M3 and Cortex-M4F port layers for GCC, Keil and IAR to
directly support basic power saving functionality.
+ Added hooks to allow basic power saving to be augmented in the application
by making use of chip specific functionality.
+ Minor change to allow mutex type semaphores to be used from interrupts
(which would not be a normal usage model for a mutex).
+ Change the behaviour of the interrupt safe interrupt mask save and restore
macros in the Cortex-M ports. The save macro now returns the previous
mask value. The restore macro now uses the previous mask value. These
changes are not necessary for the kernel's own implementation, and are
made purely because the macros were being used by application writers.
+ Added eTaskStateGet() API function.
+ Added port specific optimisations to the PIC32 port layer, and updated the
PIC32 demo applications to make use of this new feature.
+ Added port specific optimisations to the Win32 simulator port.
+ Added new ports and demo applications for the TI Hercules RM48 and TMS570
+ Added SAM3 demos targeting the ATSAM3S-EK2 and ATSAM3X-EK evaluation
+ Updated the PIC32 MPLAB X project to manually set the compiler include
paths instead of using the IDE entry box following reports that the
include paths were somehow being deleted.
+ Improved character handling in FreeRTOS+CLI.
Changes between V7.1.1 and V7.2.0 released 14 August 2012
FreeRTOS V7.2.0 is backward compatible with FreeRTOS V7.1.2.
+ Added a FreeRTOS+ sub-directory. The directory contains some FreeRTOS+
source code, and example projects that use the FreeRTOS Win32 simulator.
+ Added a new example heap allocation implementation (heap_4.c) that
includes memory block coalescence.
+ Added a demo that targets the Atmel SAM4S Cortex-M4 based microcontroller.
The demo is preconfigured to build using the free Atmel Studio 6 IDE and
+ Added xSemaphoreTakeFromISR() implementation.
+ The last parameter in ISR safe FreeRTOS queue and semaphore functions
(xHigherPriorityTaskWoken) is now optional and can be set to NULL if it
is not required.
+ Update the IAR and MSP430X ports to clear all lower power mode bits before
exiting the tick interrupt [bug fix].
+ Allow xQueueReset() to be used, even when the queues event lists are not
+ Added a vQueueDelete() handler for the FreeRTOS MPU port (this was
+ Updated the vPortSVCHandler() functions in the FreeRTOS MPU port layer to
ensure it compiles with the latest ARM GCC compilers from Linaro.
+ Updated the prvReadGP() function in the NIOS II port to ensure the compiler
can choose any register for the functions parameter (required at high
compiler optimisation levels).
+ Add #error macros into the Keil and IAR Cortex-M ports to ensure they
cannot be built if the user has set configMAX_SYSCALL_INTERRUPT_PRIORITY
+ Added comments in the FreeRTOSConfig.h files associated with Cortex-M3 and
Cortex-M4 demos stating that the configMAX_SYSCALL_INTERRUPT_PRIORITY
parameter must not be set to 0.
+ Introduce new INCLUDE_xQueueGetMutexHolder configuration constant
(defaulted to 0).
+ Added two new list handling macros - for internal use only in upcoming new
+ Removed all mention of the legacy vTaskStartTrace and ulTaskEndTrace
macros. FreeRTOS+Trace supersedes the legacy trace.
+ Added a configASSERT() into the vPortFree() function in heap_1.c as it is
invalid for the function to be called.
+ Made the xRxLock and xTxLock members of the queue structure volatile.
This is probably not necessary, and is included as a precautionary
+ Modify the assert() that checks to see if the priority passed into an
xTaskCreate() function is within valid bounds to permit the assert to be
used in the FreeRTOS MPU port.
+ The software timer service (daemon) task is now created in a way that
to ensure compatibility with FreeRTOS MPU.
Changes between V7.1.0 and V7.1.1 released May 1 2012
The following ports are brand new:
+ Cortex-M3 Tasking
The following ports have been available as separate downloads for a number
of months, but are now included in the main FreeRTOS download.
+ Cortex-M0 IAR
+ Cortex-M0 GCC
+ Cortex-M4F GCC (with full floating point support)
The following demos are brand new:
+ Renesas RX63N RDK (Renesas compiler)
The following demos have been available as separate downloads for a number
of months, but are now included in the main FreeRTOS download.
+ NXP LPC1114 GCC/LPCXpresso
+ ST STM32F0518 IAR
+ Infineon XMC4500 GCC/Atollic
+ Infineon XMC4500 IAR
+ Infineon XMC4500 Keil
+ Infineon XMC4500 Tasking
Kernel miscellaneous / maintenance:
+ Introduced the portSETUP_TCB() macro to remove the requirement for the
Windows simulator to use the traceTASK_CREATE() macro, leaving the trace
macro available for use by FreeRTOS+Trace (http://www.FreeRTOS.org/trace).
+ Added a new trace macro, traceMOVE_TASK_TO_READY_STATE(), to allow future
FreeRTOS+Trace versions to provide even more information to users.
+ Updated the FreeRTOS MPU port to be correct for changes that were
introduced in FreeRTOS V7.1.0.
+ Introduced the xQueueReset() API function.
+ Introduced the xSemaphoreGetMutexHolder() API function.
+ Tidy up various port implementations to add the static key word where
appropriate, and remove obsolete code.
+ Slight change to the initial stack frame given to the RX600 ports to allow
them to be used in the Eclipse based E2Studio IDE without confusing GDB.
+ Correct the alignment given to the initial stack of Cortex-M4F tasks.
+ Added a NOP following each DINT instruction on MSP430 devices for strict
conformance with the instructions on using DINT.
+ Changed the implementation of thread deletes in the Win32 port to prevent
the port making use of the traceTASK_DELETE() trace macros - leaving this
macro free for use by FreeRTOS+Trace.
+ Made some benign changes to the RX600 Renesas compiler port layer to
ensure the code can be built to a library without essential code being
removed by the linker.
+ Reverted the change in the name of the uxTaskNumber variable made in
V7.1.0 as it broke the IAR plug-in.
Demo miscellaneous / maintenance:
+ The command interpreter has now been formally released as FreeRTOS+CLI,
and been moved out of the main FreeRTOS download, to instead be available
from the FreeRTOS+ Ecosystem site http://www.FreeRTOS.org/plus.
+ flash_timer.c/h has been added to the list of standard demo tasks. This
performs the same functionality as the flash.c tasks, but using software
timers in place of tasks.
+ Upgraded the PIC32 demo as follows: Changes to how the library functions
are called necessitated by the new compiler version, addition of MPLAB X
project with PIC32MX360, PIC32MX460 and PIC32MX795 configurations,
addition of simply blinky demo, updated FreeRTOSConfig.h to include more
parameters, addition of hook function stubs.
+ The MSP430X IAR and CCS demos have been updated to ensure the power
settings are correct for the configured CPU frequency.
+ Rowley CrossWorks projects have been updated to correct the "multiple
definition of ..." warnings introduced when the toolchain was updated.
+ Updated various FreeRTOSConfig.h header files associated with projects
that build with Eclipse to include a #error statement informing the user
that the CreateProjectDirectoryStructure.bat batch file needs to be
executed before the projects can be opened.
+ Renamed directories that included "CCS4" in their name to remove the '4'
and instead just be "CCS". This is because the demo was updated and
tested to also work with later Code Composer Studio versions.
+ Updated the TCP/IP periodic timer frequency in numerous uIP demos to be
50ms instead of 500ms.
Changes between V7.0.2 and V7.1.0 released December 13 2011
+ Cortex-M4F IAR port.
+ Cortex-M4F Keil/RVDS port.
+ TriCore GCC port.
+ NXP LPC4350 using the Keil MDK, and demonstrated on a Hitex development
+ ST STM32F407 using the IAR Embedded Workbench for ARM, and demonstrated on
the IAR STM32F407ZG-SK starter kit.
+ Infineon TriCore TC1782, using the GCC compiler, demonstrated on the
TriBoard TC1782 evaluation board.
+ Renesas RX630, using the Renesas compiler and HEW, demonstrated on an
RX630 RSK (Renesas Starter Kit).
Miscellaneous / maintenance:
+ Removed all calls to printf() from the K60/IAR Kinetis demo so the project
can execute stand alone - without being connected to the debugger.
+ Completed the command interpreter framework. Command handlers now receive
the entire command string, giving them direct access to parameters.
Utility functions are provided to check the number of parameters, and
return parameter sub-strings.
+ The previously documented fix for the bug in xTaskResumeFromISR() that
effected (only) ports supporting interrupt nesting has now been
incorporated into the main release.
+ The portALIGNMENT_ASSERT_pxCurrentTCB() definition has been added to allow
specific ports to skip the second stack alignment check when a task is
created. This is because the second check is not appropriate for some
ports - including the new TriCore port where the checked pointer does not
actually point to a stack.
+ The portCLEAN_UP_TCB() macro has been added to allow port specific clean
up when a task is deleted - again this is required by the TriCore port.
+ Various other minor changes to ensure warning free builds on a growing
number of microcontroller and toolchain platforms. This includes a
(benign) correction to the prototype of the
vApplicationStackOverflowHook() definition found in lots of recent demos.
+ The legacy trace mechanism has been completely removed - it has been
obsolete for the years since the trace macros were introduced. The
configuration constant configUSE_TRACE_FACILITY is now used to optionally
include additional queue and task information. The additional information
is intended to make the trace mechanism more generic, and allow the trace
output to provide more information. When configUSE_TRACE_FACILITY is set
- the queue structure includes an additional member to hold the queue
type, which can be base, mutex, counting semaphore, binary semaphore
or recursive mutex.
- the queue structure includes an additional member to hold a queue
number. A trace tool can set and query the queue number for its own
purposes. The kernel does not use the queue number itself.
- the TCB structure includes an additional member to hold a task number
number. A trace tool can set and query the task number for its own
purposes. The kernel does not use the task number itself.
+ Queues and all types of semaphores are now automatically allocated their
type as they are created.
+ Added two new trace macros - traceTASK_PRIORITY_INHERIT() and
+ Updated the traceQUEUE_CREATE_FAILED() macro to take a parameter that
indicates the type of queue, mutex, or semaphore that failed to be
+ The position from which traceCREATE_MUTEX() is called has been moved from
after the call to xQueueGenericSend() [within the same function] to before
the call. This ensures the trace events occur in the correct order.
+ The value passed into tracePRIORITY_SET() has been corrected for the case
where vTaskPrioritySet() is called with a null parameter.
Changes between V7.0.1 and V7.0.2 released September 20 2011
+ The official FreeRTOS Renesas RX200 port and demo application have been
incorporated into the main FreeRTOS zip file download.
+ The official FreeRTOS Renesas RL78 port and demo application have been
incorporated into the main FreeRTOS zip file download.
+ The official FreeRTOS Freescale Kinetis K60 tower demo application has
been incorporated into the main FreeRTOS zip file download. This includes
an embedded web server example.
+ A new Microblaze V8 port layer has been created to replace the older, now
deprecated, port layer. The V8 port supports V8.x of the Microblaze IP,
including exceptions, caches, and the floating point unit. A new
Microblaze demo has also been added to demonstrate the new Microblaze V8
port layer. The demo application was created using V13.1 of the Xilinx
EDK, and includes a basic embedded web server that uses lwIP V1.4.0.
+ The official FreeRTOS Fujitsu FM3 MB9A310 demo application has been
incorporated into the main FreeRTOS zip file download. Projects are
provided for both the IAR and Keil toolchains.
+ xTaskGetIdleTaskHandle() has been added.
+ xTaskGetTimerDaemonTaskHandle() has been added.
+ pcTaskGetTaskName() has been added.
+ vSemaphoreDelete() macro has been added to make it obvious how to delete
a semaphore. In previous versions vQueueDelete() had to be used.
+ vTaskCleanUpResources() has been removed. It has been obsolete for a
+ portPOINTER_SIZE_TYPE has been introduced to prevent compiler warnings
being generated when the size of a pointer does not match the size of
the stack type. This will (has already) be used in new ports, but will
not be retrofitted to existing ports until the existing port itself is
Other updates and news:
+ The core files have all been modified to tighten the coding standard even
further. These are style, not functional changes.
+ All ARM7 port layers have been slightly modified to prevent erroneous
assert() failures when tasks are created and configASSERT() is defined.
+ All ARM IAR projects have been updated to build with the latest V6.2.x
versions of the IAR Embedded Workbench for ARM tools (EWARM). This was
necessary due to a change in the way EWARM uses the CMSIS libraries.
+ The PIC32 port layer has been updated in preparation for V2 of the C32
+ The old Virtex-4 Microblaze demo has been marked as deprecated. Please
use the brand new Spartan-6 port and demo in its place.
+ The bones of a new generic command interpreter is located in
FreeRTOS/Demo/Common/Utils/CommandInterpreter.c. This is still a work in
progress, and not documented. It is however already in use. It will be
documented in full when the projects that are already using it are
+ A couple of new standard demos have been included. First, a version of
flop.c called sp_flop.c. This is similar to flop.c, but uses single
precision floats in place of double precision doubles. This allows the
for testing ports to processors that have only single precision floating
point units, and revert to using emulated calculations whenever a double
is used. Second, comtest_strings.c has been included to allow the test
of UART drivers when an entire string is transmitted at once. The
previous comtest.c only used single character transmission and reception.
+ lwIP V1.4.0 is now included in the FreeRTOS/Demo/Common directory, and
used by a couple of new demos.
Changes between V7.0.0 and V7.0.1 released May 13 2011
+ Added a Fujitsu FM3 demo application for both the IAR and Keil tool
+ Added a SmartFusion demo application for all of the IAR, Keil and
SoftConsole (GCC/Eclipse) tool chains.
+ Updated the RX600 port and demo applications to take into account the
different semantics required when using the latest (V184.108.40.206) version of
the Renesas compiler.
+ Modified the RX600 Ethernet driver slightly to make it more robust under
heavy load, and updated the uIP handling task to make use of the FreeRTOS
+ Slightly changed the PIC32 port layer to move an ehb instruction in line
with the recommendations of the MIPS core manual, and ensure 8 byte stack
alignment is truly always obtained.
+ Changed the behaviour when tasks are suspended before the scheduler has
been started. Before, there needed to be at least one task that was not
in the suspended state. This is no longer the case.
Changes between V6.1.1 and V7.0.0 released April 8 2011
FreeRTOS V7.0.0 is backward compatible with FreeRTOS V6.x.x
+ Introduced a new software timer implementation.
+ Introduced a new common demo application file to exercise the new timer
+ Updated the Win32/MSVC simulator project to include the new software timer
demo tasks and software timer tick hook test. Much simpler software timer
demonstrations are included in the demo projects for both of the new ports
(MSP430X with CCS4 and STM32 with TrueStudio).
+ Various enhancements to the kernel implementation in tasks.c. These are
transparent to users and do not effect the pre-existing API.
+ Added calls to configASSERT() within the kernel code. configASSERT() is
functionally equivalent to the standard C assert() macro, but does not
rely on the compiler providing assert.h.
+ Updated the MSP430X IAR port and demo project to include support for the
medium memory model.
+ Added a demo project for the MSP430X that targets the MSP430X Discovery
board and uses the Code Composer Studio 4 tools. This demo includes use
of the new software timer implementation.
+ Added an STM32F100RB demo project that targets the STM32 Discovery Board
and uses the TrueStudio Eclipse based IDE from Atollic.
+ Removed some compiler warnings from the PSoC demo application.
+ Updated the PIC32 port layer to ensure the
configMAX_SYSCALL_INTERRUPT_PRIORITY constant works as expected no matter
what its value is (within the valid range set by the microcontroller
+ Updated the PIC24, dsPIC and PIC32 projects so they work with the latest
MPLAB compiler versions from Microchip.
+ Various cosmetic changes to prepare for a standards compliance statement
that will be published after the software release.
Changes between V6.1.0 and V6.1.1 released January 14 2011
+ Added two new Windows simulator ports. One uses the free Microsoft Visual
Studio 2010 express edition, and the other the free MingW/Eclipse
environment. Demo projects are provided for both.
+ Added three demo projects for the PSoC 5 (CYAC5588). These are for the
GCC, Keil, and RVDS build tools, and all use the PSoC Creator IDE.
+ Added a demo for the low power STM32L152 microcontroller using the IAR
+ Added a new port for the MSP430X core using the IAR Embedded Workbench.
+ Updated all the RX62N demo projects that target the Renesas Demonstration
Kit (RDK) to take into account the revered LED wiring on later hardware
revisions, and the new J-Link debug interface DLL.
+ Updated all the RX62N demo projects so the IO page served by the example
embedded web server works with all web browsers.
+ Updated the Red Suite projects to work with the up coming Red Suite
release, and to use a more recent version of the CMSIS libraries.
+ Added the traceTAKE_MUTEX_RECURSIVE_FAILED() trace macro.
+ Removed the (pointless) parameter from the traceTASK_CREATE_FAILED()
+ Introduced the portALT_GET_RUN_TIME_COUNTER_VALUE() macro to compliment
the already existing portGET_RUN_TIME_COUNTER_VALUE(). This allows for
more flexibility in how the time base for the run time statistics feature
can be implemented.
+ Added a "cpsie i" instruction before the "svc 0" instruction used to start
the scheduler in each of the Cortex M3 ports. This is to ensure that
interrupts are globally enabled prior to the "svc 0" instruction being
executed in cases where interrupts are left disabled by the C start up
+ Slight optimisation in the run time stats calculation.
Changes between V6.0.5 and V6.1.0 released October 6 2010
+ Added xTaskGetTickCountFromISR() function.
+ Modified vTaskSuspend() to allow tasks that have just been created to be
immediately suspended even when the kernel has not been started. This
allows them to effectively start in the Suspended state - a feature that
has been asked for on numerous occasions to assist with initialisation
+ Added ports for the Renesas RX62N using IAR, GCC and Renesas tool suites.
+ Added a STM32F103 demo application that uses the Rowley tools.
+ Under specific conditions xFreeBytesRemaining within heap_2.c could end up
with an incorrect value. This has been fixed.
+ xTaskCreateGeneric() has a parameter that can be used to pass the handle
of the task just created out to the calling task. The assignment to this
parameter has been moved to ensure it is assigned prior to the newly
created having any possibility of executing. This takes into account the
case where the assignment is made to a global variable that is accessed by
the newly created task.
+ Fixed some build time compiler warnings in various FreeTCPIP (based on
+ Fixed some build time compiler warnings in Demo/Common/Minimal/IntQueue.c.
Changes between V6.0.4 and V6.0.5 released May 17 2010
+ Added port and demo application for the Cortus APS3 processor.
Changes between V6.0.3 and V6.0.4 released March 14 2010
+ All the contributed files that were located in the Demo/Unsupported_Demos
directory have been removed. These files are instead now available in the
new Community Contributions section of the FreeRTOS website. See
+ The project file located in the Demo/CORTEX_STM32F107_GCC_Rowley directory
has been upgraded to use V2.x of the Rowley Crossworks STM32 support
+ An initial Energy Micro EFM32 demo has been included. This will be
updated over the coming months to make better use of the low power modes
the EFM32 provides.
Changes between V6.0.2 and V6.0.3 released February 26 2010
+ SuperH SH7216 (SH2A-FPU) port and demo application added.
+ Slight modification made to the default implementation of
pvPortMallocAligned() and vPortFreeAligned() macros so by default they
just call pvPortMalloc() and vPortFree(). The macros are only needed to
be defined when a memory protection unit (MPU) is being used - and then
only depending on other configuration settings.
Changes between V6.0.1 and V6.0.2 released January 9th 2010
+ Changed all GCC ARM 7 ports to use 0 as the SWI instruction parameter.
Previously the parameter was blank and therefore only an implicit 0 but
newer GCC releases do not permit this.
+ Updated IAR SAM7S and SAM7X ports to work with IAR V5.40.
+ Changed the stack alignment requirement for PIC32 from 4 bytes to 8 bytes.
+ Updated prvListTaskWithinSingleList() is it works on processors where the
stack grows up from low memory.
+ Corrected some comments.
+ Updated the startup file for the RVDS LPC21xx demo.
Changes between V6.0.0 and V6.0.1 released November 15th 2009
+ Altered pxPortInitialiseStack() for all Cortex-M3 ports to ensure the
stack pointer is where the compiler expects it to be when a task first
The following minor changes only effect the Cortex-M3 MPU port:
+ portRESET_PRIVILEGE() assembly macro updated to include a clobber list.
+ Added prototypes for all the privileged function wrappers to ensure no
compile time warnings are generated no matter what the warning level
+ Corrected the name of portSVC_prvRaisePrivilege to
+ Added conditional compilation into xTaskGenericCreate() to prevent some
compilers issuing warnings when portPRIVILEGE_BIT is defined as zero.
Changes between V5.4.2 and V6.0.0 released October 16th 2009
FreeRTOS V6 is backward compatible with FreeRTOS V5.x.
+ FreeRTOS V6 is the first version to include memory protection unit (MPU)
support. Two ports now exist for the Cortex M3, the standard FreeRTOS
which does not include MPU support, and FreeRTOS-MPU which does.
+ xTaskCreateRestricted() and vTaskAllocateMPURegions() API functions added
in support of FreeRTOS-MPU.
+ Wording for the GPL exception has been (hopefully) clarified. Also the
license.txt file included in the download has been fixed (the previous
version contained some corruption).
+ New API function xPortGetFreeHeapSize() added to heap_1.c and heap_2.c.
+ ARM7 GCC demo interrupt service routines wrappers have been modified to
call the C portion using an __asm statement. This prevents the function
call being inlined at higher optimisation levels.
+ ARM7 ports now automatically set the THUMB bit if necessary when
setting up the initial stack of a task - removing the need for
THUMB_INTERWORK to be defined. This also allows THUMB mode and ARM mode
tasks to be mixed more easily.
+ All ARM7/9 ports now have portBYTE_ALIGNMENT set to 8 by default.
+ Various demo application project files have been updated to be up to date
with the latest IDE versions.
+ The linker scripts used with command line GCC demos have been updated to
include an eh_frame section to allow their use with the latest Yagarto
release. Likewise the demo makefiles have been updated to include
command line options to reduce or eliminate the eh_frame section all
+ The definition of portBYTE_ALIGNMENT_MASK has been moved out of the
various memory allocation files and into the common portable.h header
+ Removed unnecessary use of portLONG, portSHORT and portCHAR.
+ Added LM3Sxxxx demo for Rowley CrossWorks.
+ Posix simulator has been upgraded - see the corresponding WEB page on the
Changes between V5.4.1 and V5.4.2 released August 9th 2009
+ Added a new port and demo app for the Altera Nios2 soft core.
+ Added LPC1768 demo for IAR.
+ Added a USB CDC demo to all LPC1768 demos (Code Red, CrossWorks and IAR).
+ Changed clock frequency of LPC1768 demos to 99MHz.
Changes between V5.4.0 and V5.4.1 released July 25th 2009
+ New hook function added. vApplicationMallocFailedHook() is (optionally)
called if pvPortMalloc() returns NULL.
+ Additional casting added to xTaskCheckForTimeOut(). This prevents
problems that can arise should configUSE_16_BIT_TICKS be set to 1 on a
32 bit architecture (which would probably be a mistake, anyway).
+ Corrected the parameter passed to NVIC_SetPriority() to set the MAC
interrupt priority in both LPC1768 demos.
+ Decreased the default setting of configMINIMAL_STACK_SIZE in the PIC32
demo application to ensure the heap space was not completely consumed
before the scheduler was started.
Changes between V5.3.1 and V5.4.0 released July 13th 2009
+ Added Virtex5 / PPC440 port and demos.
+ Replaced the LPC1766 Red Suite demo with an LPC1768 Red Suite demo. The
original demo was configured to use engineering samples of the CPU. The
new demo has an improved Ethernet driver.
+ Added LPC1768 Rowley demo with zero copy Ethernet driver.
+ Reworked byte alignment code to ensure 8 byte alignment works correctly.
+ Set configUSE_16_BIT_TICKS to 0 in the PPC405 demo projects.
+ Changed the initial stack setup for the PPC405 to ensure the small data
area pointers are setup correctly.
Changes between V5.3.0 and V5.3.1 released June 21st 2009
+ Added ColdFire V1 MCF51CN128 port and WEB server demo.
+ Added STM32 Connectivity Line STM32107 Cortex M3 WEB server demo.
+ Changed the Cortex M3 port.c asm statements to __asm so it can be
compiled using Rowley CrossWorks V2 in its default configuration.
+ Updated the Posix/Linux simulator contributed port.
Changes between V5.2.0 and V5.3.0 released June 1st 2009
+ Added new (optional) feature that gathers statistics on the amount of CPU
time used by each task.
+ Added a new demo application for the Atmel AT91SAM3U Cortex-M3 based
+ Added a new demo application for the NXP LPC1766 Cortex-M3 based
+ Added a contributed port/demo that allows FreeRTOS to be 'simulated' in a
+ Updated the Stellaris uIP WEB server demos to include the new run time
statistics gathering feature - and include a served WEB page that
presents the information in a tabular format.
+ Added in the lwIP port layer for the Coldfire MCF52259.
+ Updated the CrossWorks LPC2368 WEB server to include an image in the
+ Changed some of the timing in the initialisation of the LPC2368 MAC to
permit its use on all part revisions.
+ Minor modifications to the core uIP code to remove some compiler warnings.
+ Added xTaskGetApplicationTaskTag() function and updated the OpenWatcom
demo to make use of the new function.
+ Added contributed demos for AVR32 AP7000, STM32 Primer 2 and STM32 using
+ Heap_1.c and Heap_2.c used to define structures for the purpose of data
alignment. These have been converted to unions to save a few bytes of
RAM that would otherwise be wasted.
+ Remove the call to strncpy() used to copy the task name into the TCB when
the maximum task name is configured to be 1 byte long.
Changes between V5.1.2 and V5.2.0 released March 14th 2009
+ Optimised the queue send and receive functions (also used by semaphores).
+ Replaced the standard critical sections used to protect BIOS calls in the
PC port to instead use scheduler locks. This is because the BIOS calls
always return with interrupts enabled.
+ Corrected unclosed comments in boot.s.
Changes between V5.1.1 and V5.1.2 released February 9th 2009
+ Added NEC V850ES port and demo.
+ Added NEC 78K0R port and demo.
+ Added MCF52259 port and demo.
+ Added the AT91SAM9XE port and demo.
+ Updated the MCF52233 FEC driver to work around a silicon bug that
prevents the part auto negotiating some network parameters.
+ Minor modifications to the MCF52233 makefile to permit it to be used
on Linux hosts.
+ Updated the STM32 primer files to allow them to be built with the latest
version of the RIDE tools.
+ Updated the threads.js Java script used for kernel aware debugging in
the Rowley CrossWorks IDE.
Changes between V5.1.0 and V5.1.1 released November 20, 2008
+ Added Coldfire MCF52233 WEB server demo using GCC and Eclipse.
+ Added IAR MSP430 port and demo.
+ Corrected several compiler time issues that had crept in as tool versions
+ Included FreeRTOS-uIP - a faster uIP. This is not yet complete.
Changes between V5.0.4 and V5.1.0 released October 24, 2008
+ Added a new port and demo application for the ColdFire V2 core using the
CodeWarrior development tools.
+ Replaced the ARM7 demo that used the old (and now no longer supported)
Keil compiler with a new port that uses the new Keil/RVDS combo.
+ Stack overflow checking now works for stacks that grow up from low
memory (PIC24 and dsPIC).
+ BUG FIX - set the PIC32 definition of portSTACK_GROWTH to the correct
value of -1.
+ MSP430 port layers have been updated to permit tasks to place the
microcontroller into power down modes 1 to 3. The demo applications have
likewise been updated to demonstrate the new feature.
+ Replaced the two separate MSP430/Rowley port layers with a single and more
+ Added more contributed ports, including ports for NEC and SAM9
+ Changed the linker script used in the LPC2368 Eclipse demo.
Changes between V5.0.3 and V5.0.4 released September 22, 2008
+ Completely re-written port for ColdFire GCC.
+ Bug fix: All Cortex M3 ports have a minor change to the code that sets
the pending interrupt.
+ Some header files require that FreeRTOS.h be included prior to their
inclusion. #error message have been added to all such header file
informing users to the cause of the compilation error should the headers
not be included in the correct order.
Changes between V5.0.2 and V5.0.3 released July 31, 2008
Changes relating to the Cortex M3:
+ Added configMAX_SYSCALL_INTERRUPT_PRIORITY usage to all the Cortex M3
ports and demos. See the port documentation pages on the FreeRTOS.org
WEB site for full usage information.
+ Improved efficiency of Cortex M3 port even further.
+ Ensure the Cortex M3 port works no matter where the vector table is
+ Added the IntQTimer demo/test tasks to a demo project for each CM3 port
(Keil, GCC and IAR) to test the new configMAX_SYSCALL_INTERRUPT_PRIORITY
+ Added the mainINCLUDE_WEB_SERVER definition to the LM3SXXXX IAR and Keil
projects to allow the WEB server to be conditionally excluded from the
build and therefore allow use of the KickStart (code size limited)
+ Moved the PIC24 and dsPIC versions of vPortYield() from the C file to
an assembly file to allow use with all MPLAB compiler versions. This also
allows the omit-frame-pointer optimisation to be turned off.
Changes between V5.0.0 and V5.0.2 released May 30, 2008
+ Updated the PIC32 port to allow queue API calls to be used from
interrupts above the kernel interrupt priority, and to allow full
interrupt nesting. Task stack usages has also been reduced.
+ Added a new PowerPC port that demonstrates how the trace macros can be
used to allow the use of a floating point co-processor. The
traceTASK_SWITCHED_OUT() and traceTASK_SWITCHED_INT() macros are used to
save and restore the floating point context respectively for those tasks
that actually use floating point operations.
+ BUG FIX: The first PPC405 port contained a bug in that it did not leave
adequate space above the stack for the backchain to be saved when a task
started to execute for the first time.
+ Updated queue.c to add in the means to allow interrupt nesting and for
queue API functions to be called from interrupts that have a priority
above the kernel priority. This is only supported on PIC32 ports thus
+ Fixed the compiler warnings that were generated when the latest version
of WinAVR was used.
+ Remove all inline usage of 'inline' from the core kernel code.
+ Added the queue registry feature. The queue registry is provided as a
means for kernel aware debuggers to locate queue definitions. It has no
purpose unless you are using a kernel aware debugger. The queue registry
will only be used when configQUEUE_REGISTRY_SIZE is greater than zero.
+ Added the ST Cortex-M3 drivers into the Demo/Common/Drivers directory to
prevent them from having to be included in multiple demos.
+ Added a Keil STM32 demo application.
+ Changed the blocktim.c test files as it is no longer legitimate for all
ports to call queue API functions from within a critical section.
+ Added the IntQueue.c test file to test the calling of queue API functions
from different interrupt priority levels, and test interrupt nesting.
Changes between V5.0.0 and V5.0.1
+ V5.0.1 was a customer specific release.
Changes between V4.8.0 and V5.0.0 released April 15, 2008
*** VERY IMPORTANT INFORMATION ON UPGRADING TO FREERTOS.ORG V5.0.0 ***
The parameters to the functions xQueueSendFromISR(), xQueueSendToFrontFromISR(),
xQueueSendToBackFromISR() and xSemaphoreGiveFromISR() have changed. You must
update all calls to these functions to use the new calling convention! Your
compiler might not issue any type mismatch warnings!
See http://www.FreeRTOS.org/upgrading.html for full information.
+ Support added for the new Luminary Micro LM3S3768 and LM3S3748 Cortex-M3
+ New task hook feature added.
+ PowerPC demo updated to use version 10.1 of the Xilinx EDK.
+ Efficiency gains within the PIC32 port layer.
Changes between V4.7.2 and V4.8.0 released March 26 2008
+ Added a Virtex4 PowerPC 405 port and demo application.
+ Added optional stack overflow checking and new
+ Added new x