ADI Open Hardware Files

The STAMP board is a flexible development platform.  To accommodate the
maximum number of configuration options, some layout compromises were made.
Version 1.2 STAMP board SDRAM is tested at 110 MHz with the included VDSP elf
file.  Setting the SDRAM frequency higher than 110 MHz may cause any number of
errors - including SDRAM read errors which leads to incorrect instructions being
executed by the processor.  Please also note that v0.9, v1.0, and v1.1 STAMP
boards SDRAM were tested at 80 MHz.  Version 0.9, version 1.0 and version 1.1
STAMP boards require improvements to the SPORT connector for signal integrity
and noise rejection. If you see this noise issue on your existing board, you can
add a resistor and cap to the SPORT line.  The rework instructions are shown in
the v1.0, v1.1 re-work instructions.

Changes made to v1.2: 
- added series resistors on the SPORT lines.
- added termination resistors on the SDRAM