Xilogic is a small smart tool with GUI. It can translate Xilinx FPGA Package/Device Pinout Files (ASCII)
to PADS logic import file, CSV format. It will greatly reduces the time it takes to build schematic symbols of Xilinx FPGA.

Features

  • translate Xilinx FPGA Package/Device Pinout Files (ASCII) to PADS logic import file, CSV format
  • reduces time to build schematic symbols of Xilinx FPGA
  • developed by Microsoft Visual Studio 2005
  • run at Windows Operation System

Project Samples

Screenshot of Version 0.01

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Registered

2009-11-12
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