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From: Uwe B. <bo...@el...> - 2016-06-26 10:11:23
|
>>>>> "Joe" == Joe Hermaszewski <xc3...@su...> writes: Joe> The Genesys2 has a FT2232H FTDI chip connected to the JTAG ports on Joe> the FPGA, a XC7K325T-2FFG900C. It seems as though all the pieces Joe> are there to enable programming this board with xc3sprog, however I Joe> can't quite get it to work. Joe> Programming with cable type `ftdi` or `jtaghs1` produces the error Joe> message: Joe> ``` Using Libftdi, No JTAG Chain found ``` Joe> Programming with other cable types gets less far, for example the Joe> `jtaghs2` or `ftdijtag` cable types are not even able to find the Joe> device. Joe> ``` Could not open FTDI device (using libftdi): device not found Joe> Unable to access FTDI device with either libftdi or FTD2XX ``` Joe> What options do I have for debugging this? Perhaps there are tweaks Joe> I can make similar to what was done for the `nexys4` cable type. Does the FTDI get recognised when plugged? Look e.g. with "dmesg". If it gets recognized, do you have decent access rights on that device? If xc3sprog recognises the device when running as root, change the udev rules. And when the device gets recognized and you have access and then connection still fails, check the connection on the board. Hope this helps -- Uwe Bonnes bo...@el... Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 1623569 ------- Fax. 06151 1623305 --------- |
From: Joe H. <xc3...@su...> - 2016-06-25 13:36:41
|
The Genesys2 has a FT2232H FTDI chip connected to the JTAG ports on the FPGA, a XC7K325T-2FFG900C. It seems as though all the pieces are there to enable programming this board with xc3sprog, however I can't quite get it to work. Programming with cable type `ftdi` or `jtaghs1` produces the error message: ``` Using Libftdi, No JTAG Chain found ``` Programming with other cable types gets less far, for example the `jtaghs2` or `ftdijtag` cable types are not even able to find the device. ``` Could not open FTDI device (using libftdi): device not found Unable to access FTDI device with either libftdi or FTD2XX ``` What options do I have for debugging this? Perhaps there are tweaks I can make similar to what was done for the `nexys4` cable type. Best, Joe. |
From: Uwe B. <bo...@el...> - 2016-06-13 16:31:31
|
>>>>> "Ankit" == Ankit <ank...@sp...> writes: Ankit> Hello Sir, I using XC3PROG to program XC3S400 and XCF02S which Ankit> are connected in parallel to TDI and TDO lines. Ankit> and both are in JTAG chain. but they are present in the Ankit> Devlist.txt so it is not able to program it. Hello Ankit, are you sure TDI and TDO lines are "connected in parallel" ? This will not work! You must form a chain, connecting TDO from first device to TDI of second device. Bye -- Uwe Bonnes bo...@el... Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 1623569 ------- Fax. 06151 1623305 --------- |
From: Ankit <ank...@sp...> - 2016-06-13 13:18:42
|
Hello Sir, I using XC3PROG to program XC3S400 and XCF02S which are connected in parallel to TDI and TDO lines. and both are in JTAG chain. but they are present in the Devlist.txt so it is not able to program it. Please me to correct this bugs. this FPGA PROM arrangement is programmed by Xillinx ISE. Regards, Ankit Yawale |
From: Álvaro L. <alv...@al...> - 2016-04-28 06:24:50
|
Hello Ankit, That does not look like a valid JTAG IDCODE. Which JTAG hardware are you using ? Alvaro On 28/04/16 06:57, Ankit Yawale wrote: > Hello Sir/Mam > > I am Using Xc3sprog utility for programming XC3S400 FPGA. But it can't able to detect the IDCODE is for XC3S400. > As per device list IDCODE for XC3S400 is 0141c093 but this utility is scanning it as 0003003. There is only FPGA in tool chain. > > Please help me to resolve this problem. > > Thanks & Regards > > Ankit Yawale > +91-8149000521 > > ------------------------------------------------------------------------------ > Find and fix application performance issues faster with Applications Manager > Applications Manager provides deep performance insights into multiple tiers of > your business applications. It resolves application problems quickly and > reduces your MTTR. Get your free trial! > https://ad.doubleclick.net/ddm/clk/302982198;130105516;z > _______________________________________________ > Xc3sprog-users mailing list > Xc3...@li... > https://lists.sourceforge.net/lists/listinfo/xc3sprog-users > |
From: Ankit Y. <ank...@sp...> - 2016-04-28 06:17:47
|
Thanks & Regards Ankit Yawale +91-8149000521 ----------------------------------------------------------- SPJ Embedded Technologies Pvt. Ltd. Survey No. 124/12A, Mulik Baug, 2nd Floor, Opp. Swapnapurti Hall, Off Paud Road, Near MIT College Kothrud, Pune - 411 038 (INDIA) E-mail: sp...@sp... URL: http://www.spjsystems.com ----------------------------------------------------------- ----------------------------------------------------------- Disclaimer ----------------------------------------------------------- "This message (including attachments if any) is confidential and may be privileged. Before opening attachments please check them for viruses and defects. SPJ Embedded Technologies Pvt. Ltd.(SPJ) will not be responsible for any viruses or defects or any forwarded attachments emanating either from within SPJ or outside. If you have received this message by mistake, please notify the sender by return e-mail and delete this message from your system. Any unauthorized use or dissemination of this message in whole or in part is strictly prohibited. Please note that e-mails are susceptible to change and SPJ shall not be liable for any improper, untimely or incomplete transmission." ----------------------------------------------------------- |
From: Ankit Y. <ank...@sp...> - 2016-04-28 06:04:12
|
Hello Sir/Mam I am Using Xc3sprog utility for programming XC3S400 FPGA. But it can't able to detect the IDCODE is for XC3S400. As per device list IDCODE for XC3S400 is 0141c093 but this utility is scanning it as 0003003. There is only FPGA in tool chain. Please help me to resolve this problem. Thanks & Regards Ankit Yawale +91-8149000521 |
From: joosteto <joo...@gm...> - 2016-04-14 12:38:25
|
Oops! Here it is! Index: progalgspiflash.cpp =================================================================== --- progalgspiflash.cpp (revision 780) +++ progalgspiflash.cpp (working copy) @@ -82,6 +82,18 @@ fclose(fp_dbg); } +int ProgAlgSPIFlash::spi_flashinfo_spansion(unsigned char *buf){ + fprintf(stderr, "Found Spansion Device, Device ID %02x, memory type %02x, capacity %02x\n", + buf[1], buf[2], buf[3]); + switch (buf[3]){ + case 0x01: + pages = 4096; + } + pgsize = 256; + return 1; +} + + int ProgAlgSPIFlash::spi_flashinfo_s33(unsigned char *buf) { fprintf(stderr, "Found Intel Device, Device ID 0x%02x%02x\n", @@ -510,6 +522,9 @@ switch (fbuf[0]) { + case 0x01: + res = spi_flashinfo_spansion(fbuf); + break; case 0x1f: { switch (fbuf[1]>> 5) /* Family code*/ { case 1: @@ -1189,6 +1204,7 @@ switch (manf_id) { case 0x1f: /* Atmel */ return program_at45(pfile); + case 0x01: /* Spansion */ case 0x20: /* Numonyx */ case 0xc2: /* Macronix */ case 0x30: /* AMIC */ Index: progalgspiflash.h =================================================================== --- progalgspiflash.h (revision 780) +++ progalgspiflash.h (working copy) @@ -60,6 +60,7 @@ int xc_user(byte *in, byte *out, int len); int spi_xfer_user1(uint8_t *last_miso, int miso_len, int miso_skip, uint8_t *mosi, int mosi_len, int preamble); + int spi_flashinfo_spansion (unsigned char * fbuf); int spi_flashinfo_s33 (unsigned char * fbuf); int spi_flashinfo_amic (unsigned char * fbuf); int spi_flashinfo_amic_quad (unsigned char * fbuf); On 14 April 2016 at 14:01, Uwe Bonnes < bo...@el...> wrote: > >>>>> "joosteto" == joosteto <joo...@gm...> writes: > > joosteto> Hi, I notice that the spansion flash memory I'm using isn't > joosteto> supported by xc3sprog. Could the following patch be applied? > > Can you please attach the patch? > -- > Uwe Bonnes bo...@el... > > Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt > --------- Tel. 06151 1623569 ------- Fax. 06151 1623305 --------- > |
From: joosteto <joo...@gm...> - 2016-04-14 11:29:10
|
Hi, I notice that the spansion flash memory I'm using isn't supported by xc3sprog. Could the following patch be applied? --- progalgspiflash.cpp (revision 780) +++ progalgspiflash.cpp (working copy) @@ -82,6 +82,18 @@ fclose(fp_dbg); } +int ProgAlgSPIFlash::spi_flashinfo_spansion(unsigned char *buf){ + fprintf(stderr, "Found Spansion Device, Device ID %02x, memory type %02x, capacity %02x\n", + buf[1], buf[2], buf[3]); + switch (buf[3]){ + case 0x01: + pages = 4096; + } + pgsize = 256; + return 1; +} + + int ProgAlgSPIFlash::spi_flashinfo_s33(unsigned char *buf) { fprintf(stderr, "Found Intel Device, Device ID 0x%02x%02x\n", @@ -510,6 +522,9 @@ switch (fbuf[0]) { + case 0x01: + res = spi_flashinfo_spansion(fbuf); + break; case 0x1f: { switch (fbuf[1]>> 5) /* Family code*/ { case 1: @@ -1189,6 +1204,7 @@ switch (manf_id) { case 0x1f: /* Atmel */ return program_at45(pfile); + case 0x01: /* Spansion */ case 0x20: /* Numonyx */ case 0xc2: /* Macronix */ case 0x30: /* AMIC */ Index: progalgspiflash.h =================================================================== --- progalgspiflash.h (revision 780) +++ progalgspiflash.h (working copy) @@ -60,6 +60,7 @@ int xc_user(byte *in, byte *out, int len); int spi_xfer_user1(uint8_t *last_miso, int miso_len, int miso_skip, uint8_t *mosi, int mosi_len, int preamble); + int spi_flashinfo_spansion (unsigned char * fbuf); int spi_flashinfo_s33 (unsigned char * fbuf); int spi_flashinfo_amic (unsigned char * fbuf); int spi_flashinfo_amic_quad (unsigned char * fbuf); |
From: Frans S. <fra...@gm...> - 2015-12-27 08:11:23
|
Hello, First of all thanks for the great software! I think this is something Xilinx schould provide, but a couple of brave guys did it instead. I would like to report that the Artix 35T works flawlessly both with the digilent hs2 and the ft2232. I have 3 questions however. 1). I use interface B of the ft2232h for jtag, but i couldn't find the command line option to select it. Hardcoding the interface in ioftdi.cpp works, but how do i normally do that? 2). I see that ISF is supported, but where do i find the bitfile that goes into the fpga? Should it be somewhere in the vivado folder? 3). I would like to do a donation but couldn't find a donate button. Do you have other ways to send you some money? Thans and kind regards, Frans Schreuder |
From: lyf4 S. <ly...@gm...> - 2015-11-29 12:58:58
|
Hi experts, I tried compiling the recent version of xc3sprog in windows 8.1 Installed mingw compiler and configured using cmake gui with change to system path variable. In cmake compiler chosen in Mingw Makefile and libftdi path is linked. When I tried invoking mingw32-make in the xc3sprog folder it is throwing error as "system path not found". Kindly provide correctness of above steps and how to compile for windows versions. |
From: Sven O. M. <xc3...@sv...> - 2015-11-19 14:30:04
|
On Thu, 19 Nov 2015, Uwe Bonnes wrote: > Hello, > > Antti Lukats <ant...@gm...> contributed a VHDL file for the > bscan_spi, but there is no UCF file for the chip and no bit file yet. > > I don't know if my ISE14.6 installation still has the license to compile > for Artix7. I you provide my a UCF file, I could try. > > Otherwise a kind ask to Antti could perhaps help too. No big hassle, if you try it, please feel free to so. My next step will be to ask the author of the original core, to compile the core for the Artix7, because it will be something that project needs anyway: a way to update the board without the xilinx toolchain. If he distributes the bitstream of the core together with the bitstream of bscan_spi, a link to xc3sprog and a small cmd-script / shell-script that'll run the flash process (which will be most probably provided by me), it will make life easier for everyone involved. If you can't compile it, I will also ask for permission to commit his version of bscan_spi to the xc3sprog project. This way both projects will benefit. But that might take a couple of days, because he's on a field trip, afaik. Greetings, SvOlli -- | _______ | | ( /\ | user, n.: |__)v\/lli a.k.a.| The word computer professionals use when they mean "idiot." |Sven Oliver Moll| -- Dave Barry, "Claw Your Way to the Top" |
From: Uwe B. <bo...@el...> - 2015-11-19 13:52:04
|
Hello, Antti Lukats <ant...@gm...> contributed a VHDL file for the bscan_spi, but there is no UCF file for the chip and no bit file yet. I don't know if my ISE14.6 installation still has the license to compile for Artix7. I you provide my a UCF file, I could try. Otherwise a kind ask to Antti could perhaps help too. Bye -- Uwe Bonnes bo...@el... Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 1623569 ------- Fax. 06151 1623305 --------- |
From: Sven O. M. <xc3...@sv...> - 2015-11-19 12:14:18
|
On Thu, 19 Nov 2015, Uwe Bonnes wrote: > Sven> So here are my questions: > Sven> - Is my assumption about the missing bscan_spi for the > Sven> Nexys4 correct? > > The bscan_spi file is specific to a FPGA, not a board. So there are chances > that there is a bscan_spi file already available. What FPGA is used? It's an Artix-7: http://www.xilinx.com/products/silicon-devices/fpga/artix-7.html > Sven> - Will it work (as in getting it to load bitstream from flash on > Sven> startup) once I've got a working bscan_spi? > > Start with getting in contact with the FPGA. Is is recognized? Yes. Writing the bitstream "to the ram" of the FPGA and starting it is working perfectly. > Sven> - Can I use any of the other bscan_spi already > Sven> provided? > > Perhaps. Your mails misses information about the FPGA used. As stated, it's an Artix-7. Sorry for forgetting to mention this. Being a software developer I know how hard it is to get a good problem report. ;-) Xilinx part number is: XC7A100T-1CSG324C. The board is this one: https://reference.digilentinc.com/nexys4-ddr:start Thanks for the help, SvOlli -- | _______ | | ( /\ | <While cleaning the fridge> |__)v\/lli a.k.a.| Wanna see what milk becomes AFTER yogurt? |Sven Oliver Moll| -- Frumpy The Clown by Judd Winick (March, 13th 1998) |
From: Uwe B. <bo...@el...> - 2015-11-19 10:37:46
|
>>>>> "Sven" == Sven Oliver Moll <xc3...@sv...> writes: Sven> Hello, I'm trying to write to the SPI flash of an Nexys4 Sven> board. Uploading and running bitstream either via USB or via SD Sven> card works fine, but I can't get it running from flash. As far as Sven> I can tell, there's a matching "bscan_spi"-code missing. Sven> I'm using the board for the sole purpose of running the MEGA65 Sven> core only (http://mega65.org), so I'm not writing any vhdl-code, Sven> and don't have an IDE for creating FPGAs. Sven> So here are my questions: Sven> - Is my assumption about the missing bscan_spi for the Sven> Nexys4 correct? The bscan_spi file is specific to a FPGA, not a board. So there are chances that there is a bscan_spi file already available. What FPGA is used? Sven> - Will it work (as in getting it to load bitstream from flash on Sven> startup) once I've got a working bscan_spi? Start with getting in contact with the FPGA. Is is recognized? Sven> - Can I use any of the other bscan_spi already Sven> provided? Perhaps. Your mails misses information about the FPGA used. Regards -- Uwe Bonnes bo...@el... Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 1623569 ------- Fax. 06151 1623305 --------- |
From: Sven O. M. <xc3...@sv...> - 2015-11-18 22:01:53
|
Hello, I'm trying to write to the SPI flash of an Nexys4 board. Uploading and running bitstream either via USB or via SD card works fine, but I can't get it running from flash. As far as I can tell, there's a matching "bscan_spi"-code missing. I'm using the board for the sole purpose of running the MEGA65 core only (http://mega65.org), so I'm not writing any vhdl-code, and don't have an IDE for creating FPGAs. So here are my questions: - Is my assumption about the missing bscan_spi for the Nexys4 correct? - Will it work (as in getting it to load bitstream from flash on startup) once I've got a working bscan_spi? - Can I use any of the other bscan_spi already provided? Greetings, SvOlli -- | _______ | | ( /\ | Let us die young or let us live forever |__)v\/lli a.k.a.| We don't have the power but we never say never. |Sven Oliver Moll| -- Alphaville, "Forever Young" |
From: Yann S. <ya...@si...> - 2015-10-14 15:26:35
|
Hello, This patch adds support for XC7A35T device (on the $99 ARTY board). Regards, PS : the nexys4 cable seems to work for the ARTY board to load a bitstream to the FPGA. -- Yann |
From: Uwe B. <bo...@el...> - 2015-07-14 18:52:51
|
>>>>> "Ezequiel" == Ezequiel <eze...@ho...> writes: Ezequiel> Hello, i'm trying to cmake xc3sprog and it generate: package Ezequiel> 'libftdi' not found package 'libftd2xx' not found Ezequiel> Where it looks for them? what is the problem with cmake? I Ezequiel> installed ftdi libraries from ftdi web Have a look at the cmake file in the repo. I am always fighting with that too. If you have a cleanup, I am glad to test and integrate. Bye -- Uwe Bonnes bo...@el... Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ---------- |
From: Ezequiel <eze...@ho...> - 2015-07-14 17:33:02
|
Hello, i'm trying to cmake xc3sprog and it generate: package 'libftdi' not found package 'libftd2xx' not found Where it looks for them? what is the problem with cmake? I installed ftdi libraries from ftdi web Thanks Ezequiel |
From: Adrien Prost-B. <adr...@la...> - 2015-06-30 18:04:57
|
Hi, I have a small Actel Igloo Nano FPGA board and I thought it would be nice if it could be programmed with xc3sprogs. http://www.microsemi.com/products/fpga-soc/design-resources/dev -kits/igloo/igloo-nano-starter-kit I can see that xc3sprogs is able to program Xilinx devices, but not only, as some AVR microcontrollers can also be programmed. So I wondered whether the extensibility of xc3sprogs was enough to consider porting it to other FPGA families ? I also know people that would love any kind of support for Altera DE1 board. I can get one of these boards. http://users.ece.gatech.edu/~hamblen/DE1/ 1) Is xc3sprogs extensibility high enough to support other FPGA families? 2) What amount of work would it require to add this support? 3) Is such work reasonably accessible to newcomers? 4) Are there other people that would like support for Actel or Altera boards, or other board families? Best regards, Adrien |
From: Uffe J. <uf...@uf...> - 2015-06-02 21:25:16
|
On 2015-06-02 10:46, Uwe Bonnes wrote: >>>>>> "Uffe" == Uffe Jakobsen <uf...@uf...> writes: > > Uffe> On 2015-06-01 12:54, Uwe Bonnes wrote: > >> > >> Any opinions from other readers? > >> > > Uffe> I was actually going to suggest the same - I just didn't want to > Uffe> put too many topics into one thread > > So there are 3 voice for a move and one against. > > I will let the subject hanging for some time, so perhaps other contributors > may raise their voice. > Even though I like github more than sourceforge - it is definately not a mandatory thing for me. Fixing the code style is my main priority. /Uffe |
From: Uffe J. <uf...@uf...> - 2015-06-01 21:26:00
|
On 2015-06-01 12:54, Uwe Bonnes wrote: > > Any opinions from other readers? > I was actually going to suggest the same - I just didn't want to put too many topics into one thread /Uffe |
From: Sébastien B. <sb...@m-...> - 2015-06-01 11:12:58
|
On 06/01/2015 06:54 PM, Uwe Bonnes wrote: > Any opinions from other readers? I agree with those reasons. |
From: Uwe B. <bo...@el...> - 2015-06-01 10:54:31
|
>>>>> "Sidney" == Sidney Cadot <si...@ji...> writes: Sidney> Hi Uwe: >> Can you give any reasons for this request? Sidney> Sure, Sidney> - github is technically preferrable to SourceForge; - git is Sidney> superior to svn; - SourceForge has descended into very nasty Sidney> business practices: Sidney> http://blog.gluster.org/2013/08/how-far-the-once-mighty-sourceforge-has-fallen/ Sidney> Therefore, if somebody is offering to work on a big code cleanup Sidney> (which is very good), I think this may be a good time to switch Sidney> over. Any opinions from other readers? -- Uwe Bonnes bo...@el... Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ---------- |
From: Sidney C. <si...@ji...> - 2015-06-01 10:40:58
|
Hi Uwe: > Can you give any reasons for this request? Sure, - github is technically preferrable to SourceForge; - git is superior to svn; - SourceForge has descended into very nasty business practices: http://blog.gluster.org/2013/08/how-far-the-once-mighty-sourceforge-has-fallen/ Therefore, if somebody is offering to work on a big code cleanup (which is very good), I think this may be a good time to switch over. Cheerio, Sidney |