vice-emu-commit Mailing List for VICE (Page 27)
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|
From: <gp...@us...> - 2024-05-05 15:25:15
|
Revision: 45150
http://sourceforge.net/p/vice-emu/code/45150
Author: gpz
Date: 2024-05-05 15:25:14 +0000 (Sun, 05 May 2024)
Log Message:
-----------
add vsid to selftest target
Modified Paths:
--------------
testprogs/testbench/Makefile
Modified: testprogs/testbench/Makefile
===================================================================
--- testprogs/testbench/Makefile 2024-05-02 11:00:11 UTC (rev 45149)
+++ testprogs/testbench/Makefile 2024-05-05 15:25:14 UTC (rev 45150)
@@ -132,6 +132,7 @@
./testbench.sh xpet selftest
./testbench.sh xcbm2 selftest
./testbench.sh xcbm5x0 selftest
+ ./testbench.sh vsid selftest
cmpscreens: cmpscreens.c
$(CC) -W -Wall -O3 -o cmpscreens cmpscreens.c -lm
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <co...@us...> - 2024-05-02 11:00:12
|
Revision: 45149
http://sourceforge.net/p/vice-emu/code/45149
Author: compyx
Date: 2024-05-02 11:00:11 +0000 (Thu, 02 May 2024)
Log Message:
-----------
Fix clang -Wparentheses-equality warning
Modified Paths:
--------------
trunk/vice/src/arch/gtk3/widgets/base/unicodehelpers.c
Modified: trunk/vice/src/arch/gtk3/widgets/base/unicodehelpers.c
===================================================================
--- trunk/vice/src/arch/gtk3/widgets/base/unicodehelpers.c 2024-05-01 15:47:34 UTC (rev 45148)
+++ trunk/vice/src/arch/gtk3/widgets/base/unicodehelpers.c 2024-05-02 11:00:11 UTC (rev 45149)
@@ -160,7 +160,7 @@
*s = *s + 0x40;
} else if ((*s >= 0xe0) && (*s <= 0xfe)) {
*s = *s;
- } else if ((*s == 0xff) /*&& (*s <= 0xff) */) {
+ } else if /*(*/ (*s == 0xff) /*&& (*s <= 0xff)) */ {
*s = 0xbf;
} else {
*s = charset_screencode_to_petscii(*s);
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <co...@us...> - 2024-05-01 15:47:36
|
Revision: 45148
http://sourceforge.net/p/vice-emu/code/45148
Author: compyx
Date: 2024-05-01 15:47:34 +0000 (Wed, 01 May 2024)
Log Message:
-----------
Stupid unused variable, go away!
Modified Paths:
--------------
trunk/vice/src/cbm2/cbm2export.c
Modified: trunk/vice/src/cbm2/cbm2export.c
===================================================================
--- trunk/vice/src/cbm2/cbm2export.c 2024-04-30 21:29:35 UTC (rev 45147)
+++ trunk/vice/src/cbm2/cbm2export.c 2024-05-01 15:47:34 UTC (rev 45148)
@@ -57,7 +57,6 @@
void export_dump(void)
{
export_list_t *current = NULL;
- io_source_t *io;
int cartid;
int exrom;
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <gp...@us...> - 2024-04-30 21:29:36
|
Revision: 45147
http://sourceforge.net/p/vice-emu/code/45147
Author: gpz
Date: 2024-04-30 21:29:35 +0000 (Tue, 30 Apr 2024)
Log Message:
-----------
memmap extension: show reads of non initialized ram.
Modified Paths:
--------------
trunk/vice/src/c128/c128cpu.c
trunk/vice/src/c64/c64cpu.c
trunk/vice/src/c64/c64cpusc.c
trunk/vice/src/c64/vsidcpu.c
trunk/vice/src/c64dtv/c64dtvcpu.c
trunk/vice/src/cbm2/cbm2cpu.c
trunk/vice/src/main65816cpu.c
trunk/vice/src/mainc64cpu.c
trunk/vice/src/maincpu.c
trunk/vice/src/mainviccpu.c
trunk/vice/src/monitor/mon_memmap.c
trunk/vice/src/monitor.h
trunk/vice/src/pet/petcpu.c
trunk/vice/src/plus4/plus4cpu.c
trunk/vice/src/vic20/vic20cpu.c
Modified: trunk/vice/src/c128/c128cpu.c
===================================================================
--- trunk/vice/src/c128/c128cpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/c128/c128cpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -112,6 +112,10 @@
#define CPU_ADDITIONAL_RESET() c128cpu_memory_refresh_clk = 11
#ifdef FEATURE_CPUMEMHISTORY
+
+/* FIXME: the following functions should handle IO/RAM/ROM and -dummy accesses
+ * for the memmap feature - see mainc64cpu.c */
+
static void memmap_mem_store(unsigned int addr, unsigned int value)
{
monitor_memmap_store(addr, MEMMAP_RAM_W);
Modified: trunk/vice/src/c64/c64cpu.c
===================================================================
--- trunk/vice/src/c64/c64cpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/c64/c64cpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -57,6 +57,9 @@
#ifdef FEATURE_CPUMEMHISTORY
/* FIXME do proper ROM/RAM/IO tests */
+/* FIXME: the following functions should handle IO/RAM/ROM and -dummy accesses
+ * for the memmap feature - see mainc64cpu.c */
+
inline static void memmap_mem_update(unsigned int addr, int write)
{
unsigned int type = MEMMAP_RAM_R;
Modified: trunk/vice/src/c64/c64cpusc.c
===================================================================
--- trunk/vice/src/c64/c64cpusc.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/c64/c64cpusc.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -114,7 +114,7 @@
/* HACK: memmap updates for the reg_pc < bank_limit case */
#ifdef FEATURE_CPUMEMHISTORY
-#define MEMMAP_UPDATE(addr) memmap_mem_update(addr, 0)
+#define MEMMAP_UPDATE(addr) memmap_mem_update(addr, 0, 0) /* FIXME: is this a dummy access or not? */
#else
#define MEMMAP_UPDATE(addr)
#endif
Modified: trunk/vice/src/c64/vsidcpu.c
===================================================================
--- trunk/vice/src/c64/vsidcpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/c64/vsidcpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -52,6 +52,10 @@
*/
#ifdef FEATURE_CPUMEMHISTORY
+
+/* FIXME: the following functions should handle IO/RAM/ROM and -dummy accesses
+ * for the memmap feature - see mainc64cpu.c */
+
static void memmap_mem_store(unsigned int addr, unsigned int value)
{
if ((addr >= 0xd000) && (addr <= 0xdfff)) {
Modified: trunk/vice/src/c64dtv/c64dtvcpu.c
===================================================================
--- trunk/vice/src/c64dtv/c64dtvcpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/c64dtv/c64dtvcpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -538,6 +538,10 @@
#endif /* !ALLOW_UNALIGNED_ACCESS */
#ifdef FEATURE_CPUMEMHISTORY
+
+/* FIXME: the following functions should handle IO/RAM/ROM and -dummy accesses
+ * for the memmap feature - see mainc64cpu.c */
+
#if 0
void memmap_mem_store(unsigned int addr, unsigned int value)
{
Modified: trunk/vice/src/cbm2/cbm2cpu.c
===================================================================
--- trunk/vice/src/cbm2/cbm2cpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/cbm2/cbm2cpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -65,6 +65,10 @@
(*_mem_read_ind_tab_ptr[(addr) >> 8])((uint16_t)(addr))
#ifdef FEATURE_CPUMEMHISTORY
+
+/* FIXME: the following functions should handle IO/RAM/ROM and -dummy accesses
+ * for the memmap feature - see mainc64cpu.c */
+
static void memmap_mem_store(unsigned int addr, unsigned int value)
{
monitor_memmap_store(addr, MEMMAP_RAM_W);
Modified: trunk/vice/src/main65816cpu.c
===================================================================
--- trunk/vice/src/main65816cpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/main65816cpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -74,6 +74,8 @@
/* ------------------------------------------------------------------------- */
+/* FIXME: implementation of cpu-history and memmap is missing (see mainc64cpu.c) */
+
#ifndef STORE
#define STORE(addr, value) \
(*_mem_write_tab_ptr[(addr) >> 8])((uint16_t)(addr), (uint8_t)(value))
Modified: trunk/vice/src/mainc64cpu.c
===================================================================
--- trunk/vice/src/mainc64cpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/mainc64cpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -207,7 +207,8 @@
/* FIXME do proper ROM/RAM/IO tests */
-inline static void memmap_mem_update(unsigned int addr, int write)
+/* this is called per memory access, so it should only do whats really needed */
+inline static void memmap_mem_update(unsigned int addr, int write, int dummy)
{
unsigned int type = MEMMAP_RAM_R;
@@ -240,10 +241,15 @@
/* HACK: transform R to X */
type >>= 2;
memmap_state &= ~(MEMMAP_STATE_OPCODE);
+#if 0
} else if (memmap_state & MEMMAP_STATE_INSTR) {
/* ignore operand reads */
type = 0;
+#endif
}
+ if (dummy == 0) {
+ type |= MEMMAP_REGULAR_READ;
+ }
}
monitor_memmap_store(addr, type);
}
@@ -250,13 +256,13 @@
static void memmap_mem_store(unsigned int addr, unsigned int value)
{
- memmap_mem_update(addr, 1);
+ memmap_mem_update(addr, 1, 0);
(*_mem_write_tab_ptr[(addr) >> 8])((uint16_t)(addr), (uint8_t)(value));
}
static void memmap_mem_store_dummy(unsigned int addr, unsigned int value)
{
- memmap_mem_update(addr, 1);
+ memmap_mem_update(addr, 1, 1);
(*_mem_write_tab_ptr_dummy[(addr) >> 8])((uint16_t)(addr), (uint8_t)(value));
}
@@ -264,7 +270,7 @@
static uint8_t memmap_mem_read(unsigned int addr)
{
check_ba();
- memmap_mem_update(addr, 0);
+ memmap_mem_update(addr, 0, 0);
return (*_mem_read_tab_ptr[(addr) >> 8])((uint16_t)(addr));
}
@@ -271,7 +277,7 @@
static uint8_t memmap_mem_read_dummy(unsigned int addr)
{
check_ba();
- memmap_mem_update(addr, 0);
+ memmap_mem_update(addr, 0, 1);
return (*(_mem_read_tab_ptr_dummy[(addr) >> 8]))((uint16_t)(addr));
}
Modified: trunk/vice/src/maincpu.c
===================================================================
--- trunk/vice/src/maincpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/maincpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -89,6 +89,10 @@
#ifdef FEATURE_CPUMEMHISTORY
#ifndef C64DTV /* FIXME: fix DTV and remove this */
+/* NOTE: the functions called here are in src/plus4/plus4cpu.c, src/c128/c128cpu.c,
+ * src/cbm2/cbm2cpu.c, src/c64/vsidcpu.c, src/c64/c64cpu.c, src/pet/petcpu.c,
+ * src/c64dtv/c64dtvcpu.c */
+
/* map access functions to memmap hooks */
#ifndef STORE
#define STORE(addr, value) \
Modified: trunk/vice/src/mainviccpu.c
===================================================================
--- trunk/vice/src/mainviccpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/mainviccpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -79,14 +79,20 @@
#ifdef FEATURE_CPUMEMHISTORY
-inline static void memmap_mem_update(unsigned int addr, int write)
+/* this is called per memory access, so it should only do whats really needed */
+inline static void memmap_mem_update(unsigned int addr, int write, int dummy)
{
unsigned int type = MEMMAP_RAM_R;
unsigned int a_m = addr >> 8;
- if (((a_m >= 0x90) && (a_m <= 0x93)) || ((addr >= 0x98) && (addr <= 0x9f))) {
+ if (((a_m >= 0x90) && (a_m <= 0x93)) ||
+ ((a_m >= 0x98) && (a_m <= 0x9f))) {
+ /* FIXME: IO2 or IO3 could be RAM */
type = MEMMAP_I_O_R;
- } else if (((a_m >= 0x80) && (a_m <= 0x8f)) || (a_m >= 0xc0)) {
+ } else if (((a_m >= 0x60) && (a_m <= 0x7f)) ||
+ ((a_m >= 0x80) && (a_m <= 0x8f)) || /* chargen */
+ (a_m >= 0xa0)) {
+ /* FIXME: blocks 1,2,3 could be ROM also */
type = MEMMAP_ROM_R;
}
@@ -98,10 +104,15 @@
/* HACK: transform R to X */
type >>= 2;
memmap_state &= ~(MEMMAP_STATE_OPCODE);
+#if 0
} else if (memmap_state & MEMMAP_STATE_INSTR) {
/* ignore operand reads */
type = 0;
+#endif
}
+ if (dummy == 0) {
+ type |= MEMMAP_REGULAR_READ;
+ }
}
monitor_memmap_store(addr, type);
@@ -110,25 +121,25 @@
static void memmap_mem_store(unsigned int addr, unsigned int value)
{
- memmap_mem_update(addr, 1);
+ memmap_mem_update(addr, 1, 0);
(*_mem_write_tab_ptr[(addr) >> 8])((uint16_t)(addr), (uint8_t)(value));
}
static void memmap_mem_store_dummy(unsigned int addr, unsigned int value)
{
- memmap_mem_update(addr, 1);
+ memmap_mem_update(addr, 1, 1);
(*_mem_write_tab_ptr_dummy[(addr) >> 8])((uint16_t)(addr), (uint8_t)(value));
}
static uint8_t memmap_mem_read(unsigned int addr)
{
- memmap_mem_update(addr, 0);
+ memmap_mem_update(addr, 0, 0);
return (*_mem_read_tab_ptr[(addr) >> 8])((uint16_t)(addr));
}
static uint8_t memmap_mem_read_dummy(unsigned int addr)
{
- memmap_mem_update(addr, 0);
+ memmap_mem_update(addr, 0, 1);
return (*_mem_read_tab_ptr_dummy[(addr) >> 8])((uint16_t)(addr));
}
@@ -184,6 +195,12 @@
memmap_mem_read_dummy((addr) & 0xff)
#endif
+/* Route stack operations through memmap */
+
+#define PUSH(val) memmap_mem_store((0x100 + (reg_sp--)), (uint8_t)(val))
+#define PULL() memmap_mem_read(0x100 + (++reg_sp))
+#define STACK_PEEK() memmap_mem_read_dummy(0x100 + reg_sp)
+
#endif /* FEATURE_CPUMEMHISTORY */
#ifndef STORE
@@ -238,6 +255,19 @@
(*_mem_read_tab_ptr_dummy[0])((uint16_t)(addr))
#endif
+/* Route stack operations through read/write handlers */
+#ifndef PUSH
+#define PUSH(val) (*_mem_write_tab_ptr[0x01])((uint16_t)(0x100 + (reg_sp--)), (uint8_t)(val))
+#endif
+
+#ifndef PULL
+#define PULL() (*_mem_read_tab_ptr[0x01])((uint16_t)(0x100 + (++reg_sp)))
+#endif
+
+#ifndef STACK_PEEK
+#define STACK_PEEK() (*_mem_read_tab_ptr_dummy[0x01])((uint16_t)(0x100 + reg_sp))
+#endif
+
#ifndef DMA_FUNC
static void maincpu_generic_dma(void)
{
Modified: trunk/vice/src/monitor/mon_memmap.c
===================================================================
--- trunk/vice/src/monitor/mon_memmap.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/monitor/mon_memmap.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -36,6 +36,7 @@
#endif
#include "lib.h"
+#include "log.h"
#include "machine.h"
#include "mon_disassemble.h"
#include "mon_memmap.h"
@@ -289,12 +290,13 @@
static int mon_memmap_picy;
static unsigned int mon_memmap_mask;
-
+/* mmzap */
void mon_memmap_zap(void)
{
memset(mon_memmap, 0, mon_memmap_size * sizeof(MEMMAP_ELEM));
}
+/* mmsh */
void mon_memmap_show(int mask, MON_ADDR start_addr, MON_ADDR end_addr)
{
unsigned int addr;
@@ -315,10 +317,10 @@
if (machine_class == VICE_MACHINE_C64DTV) {
mon_out(" addr: IO ROM RAM\n");
- line_fmt = "%06x: %c%c%c %c%c%c %c%c%c\n";
+ line_fmt = "%06x: %c%c%c %c%c%c %c%c%c%s%s%s\n";
} else {
mon_out("addr: IO ROM RAM\n");
- line_fmt = "%04x: %c%c%c %c%c%c %c%c%c\n";
+ line_fmt = "%04x: %c%c%c %c%c%c %c%c%c%s%s%s\n";
}
for (addr = start_addr; addr <= end_addr; ++addr) {
@@ -337,13 +339,19 @@
(b & MEMMAP_ROM_X) ? 'x' : '-',
(b & MEMMAP_RAM_R) ? 'r' : '-',
(b & MEMMAP_RAM_W) ? 'w' : '-',
- (b & MEMMAP_RAM_X) ? 'x' : '-');
+ (b & MEMMAP_RAM_X) ? 'x' : '-',
+ (b & MEMMAP_RAM_R) && (!(b & MEMMAP_REGULAR_READ)) ? " (dummy)" : "",
+ (b & MEMMAP_UNINITIALIZED_READ) ? " (uninitialized read)" : "",
+ (b & MEMMAP_UNINITIALIZED_EXEC) ? " (uninitialized exec)" : ""
+ );
}
}
+/* this is called per memory access, so it should only do whats really needed */
void monitor_memmap_store(unsigned int addr, unsigned int type)
{
- uint8_t op = cpuhistory[cpuhistory_i].op;
+ /* uint8_t op = cpuhistory[cpuhistory_i].op; */
+ unsigned int last;
#if 0
static int repeat = 0;
@@ -356,7 +364,7 @@
if (memmap_state & MEMMAP_STATE_IN_MONITOR) {
return;
}
-
+#if 0 /* FIXME: why would we do this? */
/* Ignore reg_pc+2 reads on branches & JSR
and return address read on RTS */
if (type & (MEMMAP_ROM_R | MEMMAP_RAM_R)
@@ -364,11 +372,20 @@
|| ((op == OP_RTS) && ((addr > 0x1ff) || (addr < 0x100))))) {
return;
}
-
+#endif
+ last = mon_memmap[addr & mon_memmap_mask];
+ if (!(last & MEMMAP_RAM_W)) { /* if this address was not written to yet */
+ if (type & MEMMAP_REGULAR_READ) { /* and this is a regular, non dummy, read */
+ if (type & MEMMAP_RAM_R) {
+ type |= MEMMAP_UNINITIALIZED_READ; /* mark as non-initialized read in the history */
+ } else if (type & MEMMAP_RAM_X) {
+ type |= MEMMAP_UNINITIALIZED_EXEC; /* mark as non-initialized execute in the history */
+ }
+ }
+ }
mon_memmap[addr & mon_memmap_mask] |= type;
}
-
void mon_memmap_save(const char *filename, int format)
{
const char *drvname;
Modified: trunk/vice/src/monitor.h
===================================================================
--- trunk/vice/src/monitor.h 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/monitor.h 2024-04-30 21:29:35 UTC (rev 45147)
@@ -251,6 +251,9 @@
void monitor_memmap_store(unsigned int addr, unsigned int type);
/* memmap defines */
+#define MEMMAP_UNINITIALIZED_EXEC (1 << 11) /* was executed before written to */
+#define MEMMAP_UNINITIALIZED_READ (1 << 10) /* was read before written to */
+#define MEMMAP_REGULAR_READ (1 << 9) /* NOT just a dummy read */
#define MEMMAP_I_O_R (1 << 8)
#define MEMMAP_I_O_W (1 << 7)
#define MEMMAP_I_O_X (1 << 6)
Modified: trunk/vice/src/pet/petcpu.c
===================================================================
--- trunk/vice/src/pet/petcpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/pet/petcpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -67,6 +67,10 @@
#define HAVE_6809_REGS
#ifdef FEATURE_CPUMEMHISTORY
+
+/* FIXME: the following functions should handle IO/RAM/ROM and -dummy accesses
+ * for the memmap feature - see mainc64cpu.c */
+
static void memmap_mem_store(unsigned int addr, unsigned int value)
{
monitor_memmap_store(addr, MEMMAP_RAM_W);
Modified: trunk/vice/src/plus4/plus4cpu.c
===================================================================
--- trunk/vice/src/plus4/plus4cpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/plus4/plus4cpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -37,6 +37,10 @@
#define CPU_DELAY_CLK ted_delay_clk();
#ifdef FEATURE_CPUMEMHISTORY
+
+/* FIXME: the following functions should handle IO/RAM/ROM and -dummy accesses
+ * for the memmap feature - see mainc64cpu.c */
+
static void memmap_mem_store(unsigned int addr, unsigned int value)
{
monitor_memmap_store(addr, MEMMAP_RAM_W);
Modified: trunk/vice/src/vic20/vic20cpu.c
===================================================================
--- trunk/vice/src/vic20/vic20cpu.c 2024-04-29 22:34:27 UTC (rev 45146)
+++ trunk/vice/src/vic20/vic20cpu.c 2024-04-30 21:29:35 UTC (rev 45147)
@@ -48,12 +48,6 @@
#define SKIP_CYCLE 0
-/* Route stack operations through read/write handlers */
-
-#define PUSH(val) (*_mem_write_tab_ptr[0x01])((uint16_t)(0x100 + (reg_sp--)), (uint8_t)(val))
-#define PULL() (*_mem_read_tab_ptr[0x01])((uint16_t)(0x100 + (++reg_sp)))
-#define STACK_PEEK() (*_mem_read_tab_ptr_dummy[0x01])((uint16_t)(0x100 + reg_sp))
-
/* opcode_t etc */
#if !defined WORDS_BIGENDIAN && defined ALLOW_UNALIGNED_ACCESS
@@ -109,7 +103,7 @@
/* HACK: memmap updates for the reg_pc < bank_limit case */
#ifdef FEATURE_CPUMEMHISTORY
-#define MEMMAP_UPDATE(addr) memmap_mem_update(addr, 0)
+#define MEMMAP_UPDATE(addr) memmap_mem_update(addr, 0, 0)
#else
#define MEMMAP_UPDATE(addr)
#endif
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <gp...@us...> - 2024-04-29 22:34:28
|
Revision: 45146
http://sourceforge.net/p/vice-emu/code/45146
Author: gpz
Date: 2024-04-29 22:34:27 +0000 (Mon, 29 Apr 2024)
Log Message:
-----------
add comment. commit++
Modified Paths:
--------------
trunk/vice/src/monitor/mon_register.c
Modified: trunk/vice/src/monitor/mon_register.c
===================================================================
--- trunk/vice/src/monitor/mon_register.c 2024-04-29 22:29:33 UTC (rev 45145)
+++ trunk/vice/src/monitor/mon_register.c 2024-04-29 22:34:27 UTC (rev 45146)
@@ -57,6 +57,7 @@
}
}
+ /* these are not actually registers, we need them for the conditionals */
if ((reg_id == e_Rasterline) || (reg_id == e_Cycle)) {
return 1;
}
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <gp...@us...> - 2024-04-29 22:29:35
|
Revision: 45145
http://sourceforge.net/p/vice-emu/code/45145
Author: gpz
Date: 2024-04-29 22:29:33 +0000 (Mon, 29 Apr 2024)
Log Message:
-----------
add comments, sync t_reg_id with register_string array
Modified Paths:
--------------
trunk/vice/src/monitor/monitor.c
trunk/vice/src/monitor/montypes.h
Modified: trunk/vice/src/monitor/monitor.c
===================================================================
--- trunk/vice/src/monitor/monitor.c 2024-04-29 22:18:06 UTC (rev 45144)
+++ trunk/vice/src/monitor/monitor.c 2024-04-29 22:29:33 UTC (rev 45145)
@@ -260,7 +260,7 @@
const char * const mon_memspace_string[] = { "default", "C", "8", "9", "10", "11" };
-/* must match order in enum t_reg_id */
+/* CAUTION: must match order in enum t_reg_id, and contain all of its elements */
static const char * const register_string[] = {
/* 6502/65c02 */
"A",
@@ -328,6 +328,8 @@
"RL", /* Rasterline */
"CY", /* Cycle in line */
+ "P00", /* CPU port DDR (6510) */
+ "P01" /* CPU port Data (6510) */
};
bool monitor_is_inside_monitor(void)
Modified: trunk/vice/src/monitor/montypes.h
===================================================================
--- trunk/vice/src/monitor/montypes.h 2024-04-29 22:18:06 UTC (rev 45144)
+++ trunk/vice/src/monitor/montypes.h 2024-04-29 22:29:33 UTC (rev 45145)
@@ -45,8 +45,9 @@
658xx: 65802/65816
6x09: 6809/6309
- These values are used in the binary monitor API, so it
- is important that they remain consistent.
+ CAUTION: These values are used in the binary monitor API, so it is important
+ that they remain consistent (and the order is not changed).
+ Also make sure this matches register_string[]
*/
enum t_reg_id {
e_A = 0x00, /* 65xx/c64dtv/658xx/6x09/z80 */
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <old...@us...> - 2024-04-29 22:18:09
|
Revision: 45144
http://sourceforge.net/p/vice-emu/code/45144
Author: oldwoman37
Date: 2024-04-29 22:18:06 +0000 (Mon, 29 Apr 2024)
Log Message:
-----------
Added c128 z80 timing suite to testbench
Modified Paths:
--------------
testprogs/testbench/c128-testlist.in
testprogs/testbench/kernal64c128c128-testlist.txt
testprogs/testbench/x128-testlist.txt
testprogs/testbench/z64kc128-testlist.txt
Modified: testprogs/testbench/c128-testlist.in
===================================================================
--- testprogs/testbench/c128-testlist.in 2024-04-29 22:16:06 UTC (rev 45143)
+++ testprogs/testbench/c128-testlist.in 2024-04-29 22:18:06 UTC (rev 45144)
@@ -290,6 +290,1874 @@
../c128/z80/zex128/,st8ix2-all.prg,exitcode,11000000
../c128/z80/zex128/,st8ix3-all.prg,exitcode,7000000
../c128/z80/zex128/,stabd-all.prg,exitcode,8000000
+../c128/z80/c128z80timing/,00-nop.prg,exitcode,10000000
+../c128/z80/c128z80timing/,01-ld-bc-nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,02-ld-bc_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,03-inc-bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,04-inc-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,05-dec-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,06-ld-b-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,07-rlca.prg,exitcode,10000000
+../c128/z80/c128z80timing/,08-ex-af_af.prg,exitcode,10000000
+../c128/z80/c128z80timing/,0a-ld-a_bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,0b-dec-bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,0c-inc-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,0d-dec-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,0e-ld-c-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,0f-rrca.prg,exitcode,10000000
+../c128/z80/c128z80timing/,11-ld-de-nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,12-ld-de_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,13-inc-de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,14-inc-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,15-dec-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,16-ld-d-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,17-rla.prg,exitcode,10000000
+../c128/z80/c128z80timing/,1a-ld-a_de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,1b-dec-de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,1c-inc-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,1d-dec-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,1e-ld-e-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,1f-rra.prg,exitcode,10000000
+../c128/z80/c128z80timing/,21-ld-hl-nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,22-ld-nn_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,23-inc-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,24-inc-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,25-dec-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,26-ld-h-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,27-daa.prg,exitcode,10000000
+../c128/z80/c128z80timing/,2a-ld-hl_nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,2b-dec-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,2c-inc-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,2d-dec-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,2e-ld-l-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,2f-cpl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,31-ld-sp-nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,32-ld-nn_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,33-inc-sp.prg,exitcode,10000000
+../c128/z80/c128z80timing/,34-inc-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,35-dec-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,36-ld-hl-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,37-scf.prg,exitcode,10000000
+../c128/z80/c128z80timing/,3a-ld-a_nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,3b-dec-sp.prg,exitcode,10000000
+../c128/z80/c128z80timing/,3c-inc-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,3d-dec-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,3e-ld-a-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,3f-ccf.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d3-out-n_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d9-exx.prg,exitcode,10000000
+../c128/z80/c128z80timing/,db-in-a_n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd21-ld-ix-nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd22-ld-nn_ix.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd23-inc-ix.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd24-inc-ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd25-dec-ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd26-ld-ixh-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd2a-ld-ix_nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd2b-dec-ix.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd2c-inc-ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd2d-dec-ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd2e-ld-ixl-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd34-inc-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd35-dec-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd36-ld-ixd-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dde3-ex-sp_ix.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddf9-ld-sp_ix.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e3-ex-sp_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,eb-ex-de_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed40-in-b_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed41-out-c_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed43-ld-nn_bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed44-neg.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed46-im-0.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed47-ld-i_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed48-in-c_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed49-out-c_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed4b-ld-bc_nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed4c-neg.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed4e-im-0.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed4f-ld-r_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed50-in-d_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed51-out-c_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed53-ld-nn_de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed54-neg.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed56-im-1.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed57-ld-a_i.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed58-in-e_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed59-out-c_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed5b-ld-de_nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed5c-neg.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed5e-im-2.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed5f-ld-a_r.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed60-in-h_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed61-out-c_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed63-ld-nn_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed64-neg.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed66-im-0.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed67-rrd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed68-in-l_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed69-out-c_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed6b-ld-hl_nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed6c-neg.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed6e-im-0.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed6f-rld.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed70-in-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed71-out-c_0.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed73-ld-nn_sp.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed74-neg.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed76-im-1.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed78-in-a_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed79-out-c_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed7b-ld-sp_nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed7c-neg.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed7e-im-2.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f3-di.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f9-ld-sp_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fb-ei.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd21-ld-iy-nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd22-ld-nn_iy.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd23-inc-iy.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd24-inc-iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd25-dec-iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd26-ld-iyh-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd2a-ld-iy_nn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd2b-dec-iy.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd2c-inc-iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd2d-dec-iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd2e-ld-iyl-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd34-inc-iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd35-dec-iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd36-ld-iyd-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fde3-ex-sp_iy.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdf9-ld-sp_iy.prg,exitcode,10000000
+../c128/z80/c128z80timing/,40-ld-b_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,41-ld-b_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,42-ld-b_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,43-ld-b_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,44-ld-b_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,45-ld-b_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,46-ld-b_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,47-ld-b_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,48-ld-c_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,49-ld-c_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,4a-ld-c_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,4b-ld-c_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,4c-ld-c_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,4d-ld-c_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,4e-ld-c_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,4f-ld-c_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,50-ld-d_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,51-ld-d_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,52-ld-d_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,53-ld-d_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,54-ld-d_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,55-ld-d_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,56-ld-d_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,57-ld-d_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,58-ld-e_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,59-ld-e_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,5a-ld-e_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,5b-ld-e_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,5c-ld-e_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,5d-ld-e_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,5e-ld-e_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,5f-ld-e_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,60-ld-h_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,61-ld-h_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,62-ld-h_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,63-ld-h_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,64-ld-h_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,65-ld-h_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,66-ld-h_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,67-ld-h_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,68-ld-l_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,69-ld-l_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,6a-ld-l_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,6b-ld-l_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,6c-ld-l_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,6d-ld-l_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,6e-ld-l_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,6f-ld-l_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,70-ld-hl_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,71-ld-hl_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,72-ld-hl_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,73-ld-hl_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,74-ld-hl_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,75-ld-hl_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,77-ld-hl_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,78-ld-a_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,79-ld-a_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,7a-ld-a_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,7b-ld-a_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,7c-ld-a_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,7d-ld-a_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,7e-ld-a_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,7f-ld-a_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd44-ld-b_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd45-ld-b_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd46-ld-b_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd4c-ld-c_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd4d-ld-c_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd4e-ld-c_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd54-ld-d_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd55-ld-d_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd56-ld-d_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd5c-ld-e_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd5d-ld-e_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd5e-ld-e_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd60-ld-ixh_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd61-ld-ixh_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd62-ld-ixh_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd63-ld-ixh_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd64-ld-ixh_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd65-ld-ixh_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd66-ld-h_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd67-ld-ixh_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd68-ld-ixl_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd69-ld-ixl_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd6a-ld-ixl_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd6b-ld-ixl_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd6c-ld-ixl_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd6d-ld-ixl_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd6e-ld-l_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd6f-ld-ixl_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd70-ld-ixd_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd71-ld-ixd_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd72-ld-ixd_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd73-ld-ixd_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd74-ld-ixd_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd75-ld-ixd_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd77-ld-ixd_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd7c-ld-a_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd7d-ld-a_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd7e-ld-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd44-ld-b_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd45-ld-b_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd46-ld-b_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd4c-ld-c_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd4d-ld-c_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd4e-ld-c_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd54-ld-d_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd55-ld-d_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd56-ld-d_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd5c-ld-e_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd5d-ld-e_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd5e-ld-e_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd60-ld-iyh_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd61-ld-iyh_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd62-ld-iyh_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd63-ld-iyh_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd64-ld-iyh_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd65-ld-iyh_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd66-ld-h_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd67-ld-iyh_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd68-ld-iyl_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd69-ld-iyl_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd6a-ld-iyl_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd6b-ld-iyl_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd6c-ld-iyl_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd6d-ld-iyl_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd6e-ld-l_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd6f-ld-iyl_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd70-ld-iyd_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd71-ld-iyd_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd72-ld-iyd_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd73-ld-iyd_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd74-ld-iyd_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd75-ld-iyd_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd77-ld-iyd_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd7c-ld-a_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd7d-ld-a_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd7e-ld-a_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,10-djnz-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,10-djnz-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,18-jr.prg,exitcode,10000000
+../c128/z80/c128z80timing/,20-jr-nz-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,20-jr-nz-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,28-jr-z-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,28-jr-z-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,30-jr-nc-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,30-jr-nc-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,38-jr-c-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,38-jr-c-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c0-retnz-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c0-retnz-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c1-pop-bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c2-jp-nz-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c2-jp-nz-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c3-jp.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c4-call-nz-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c4-call-nz-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c5-push-bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c7-rst-00.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c8-retz-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c8-retz-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c9-ret.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ca-jp-z-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ca-jp-z-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cc-call-z-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cc-call-z-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cd-call.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cf-rst-08.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d0-retnc-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d0-retnc-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d1-pop-de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d2-jp-nc-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d2-jp-nc-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d4-call-nc-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d4-call-nc-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d5-push-de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d7-rst-10.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d8-retc-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d8-retc-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,da-jp-c-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,da-jp-c-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dc-call-c-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dc-call-c-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dde1-pop-ix.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dde5-push-ix.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dde9-jp-ix.prg,exitcode,10000000
+../c128/z80/c128z80timing/,df-rst-18.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e0-retpo-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e0-retpo-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e1-pop-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e2-jp-po-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e2-jp-po-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e4-call-po-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e4-call-po-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e5-push-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e7-rst-20.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e8-retpe-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e8-retpe-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e9-jp-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ea-jp-pe-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ea-jp-pe-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ec-call-pe-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ec-call-pe-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed45-retn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed4d-reti.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed55-retn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed5d-retn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed65-retn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed6d-retn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed75-retn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed7d-retn.prg,exitcode,10000000
+../c128/z80/c128z80timing/,eda0-ldi.prg,exitcode,10000000
+../c128/z80/c128z80timing/,eda1-cpi.prg,exitcode,10000000
+../c128/z80/c128z80timing/,eda2-ini.prg,exitcode,10000000
+../c128/z80/c128z80timing/,eda3-outi.prg,exitcode,10000000
+../c128/z80/c128z80timing/,eda8-ldd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,eda9-cpd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edaa-ind.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edab-outd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edb0-ldir.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edb1-cpir.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edb2-inir.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edb3-otir.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edb8-lddr.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edb9-cpdr.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edba-indr.prg,exitcode,10000000
+../c128/z80/c128z80timing/,edbb-otdr.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ef-rst-28.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f0-retp-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f0-retp-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f1-pop-af.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f2-jp-p-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f2-jp-p-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f4-call-p-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f4-call-p-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f5-push-af.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f7-rst-30.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f8-retm-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f8-retm-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fa-jp-m-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fa-jp-m-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fc-call-m-f.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fc-call-m-t.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fde1-pop-iy.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fde5-push-iy.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fde9-jp-iy.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ff-rst-38.prg,exitcode,10000000
+../c128/z80/c128z80timing/,09-add-hl_bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,19-add-hl_de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,29-add-hl_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,39-add-hl_sp.prg,exitcode,10000000
+../c128/z80/c128z80timing/,80-add-a_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,81-add-a_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,82-add-a_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,83-add-a_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,84-add-a_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,85-add-a_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,86-add-a_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,87-add-a_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,88-adc-a_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,89-adc-a_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,8a-adc-a_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,8b-adc-a_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,8c-adc-a_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,8d-adc-a_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,8e-adc-a_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,8f-adc-a_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,90-sub-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,91-sub-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,92-sub-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,93-sub-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,94-sub-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,95-sub-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,96-sub-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,97-sub-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,98-sbc-a_b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,99-sbc-a_c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,9a-sbc-a_d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,9b-sbc-a_e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,9c-sbc-a_h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,9d-sbc-a_l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,9e-sbc-a_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,9f-sbc-a_a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a0-and-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a1-and-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a2-and-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a3-and-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a4-and-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a5-and-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a6-and-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a7-and-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a8-xor-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,a9-xor-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,aa-xor-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ab-xor-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ac-xor-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ad-xor-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ae-xor-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,af-xor-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b0-or-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b1-or-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b2-or-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b3-or-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b4-or-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b5-or-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b6-or-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b7-or-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b8-cp-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,b9-cp-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ba-cp-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,bb-cp-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,bc-cp-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,bd-cp-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,be-cp-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,bf-cp-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,c6-add-a-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ce-adc-a-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,d6-sub-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd09-add-ix_bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd19-add-ix_de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd29-add-ix_ix.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd39-add-ix_sp.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd84-add-a_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd85-add-a_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd86-add-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd8c-adc-a_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd8d-adc-a_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd8e-adc-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd94-sub-ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd95-sub-ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd96-sub-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd9c-sbc-a_ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd9d-sbc-a_ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dd9e-sbc-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dda4-and-ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dda5-and-ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,dda6-and-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddac-xor-ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddad-xor-ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddae-xor-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddb4-or-ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddb5-or-ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddb6-or-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddbc-cp-ixh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddbd-cp-ixl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddbe-cp-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,de-sbc-a-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,e6-and-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed42-sbc-hl_bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed4a-adc-hl_bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed52-sbc-hl_de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed5a-adc-hl_de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed62-sbc-hl_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed6a-adc-hl_hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed72-sbc-hl_sp.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ed7a-adc-hl_sp.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ee-xor-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,f6-or-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd09-add-iy_bc.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd19-add-iy_de.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd29-add-iy_iy.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd39-add-iy_sp.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd84-add-a_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd85-add-a_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd86-add-a_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd8c-adc-a_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd8d-adc-a_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd8e-adc-a_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd94-sub-iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd95-sub-iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd96-sub-iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd9c-sbc-a_iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd9d-sbc-a_iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fd9e-sbc-a_iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fda4-and-iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fda5-and-iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fda6-and-iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdac-xor-iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdad-xor-iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdae-xor-iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdb4-or-iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdb5-or-iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdb6-or-iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdbc-cp-iyh.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdbd-cp-iyl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fdbe-cp-iyd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,fe-cp-n.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb00-rlc-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb01-rlc-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb02-rlc-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb03-rlc-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb04-rlc-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb05-rlc-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb06-rlc-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb07-rlc-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb08-rrc-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb09-rrc-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb0a-rrc-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb0b-rrc-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb0c-rrc-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb0d-rrc-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb0e-rrc-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb0f-rrc-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb10-rl-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb11-rl-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb12-rl-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb13-rl-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb14-rl-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb15-rl-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb16-rl-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb17-rl-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb18-rr-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb19-rr-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb1a-rr-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb1b-rr-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb1c-rr-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb1d-rr-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb1e-rr-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb1f-rr-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb20-sla-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb21-sla-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb22-sla-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb23-sla-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb24-sla-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb25-sla-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb26-sla-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb27-sla-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb28-sra-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb29-sra-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb2a-sra-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb2b-sra-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb2c-sra-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb2d-sra-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb2e-sra-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb2f-sra-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb30-sls-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb31-sls-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb32-sls-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb33-sls-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb34-sls-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb35-sls-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb36-sls-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb37-sls-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb38-srl-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb39-srl-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb3a-srl-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb3b-srl-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb3c-srl-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb3d-srl-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb3e-srl-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb3f-srl-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb40-bit-0-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb41-bit-0-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb42-bit-0-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb43-bit-0-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb44-bit-0-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb45-bit-0-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb46-bit-0-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb47-bit-0-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb48-bit-1-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb49-bit-1-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb4a-bit-1-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb4b-bit-1-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb4c-bit-1-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb4d-bit-1-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb4e-bit-1-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb4f-bit-1-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb50-bit-2-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb51-bit-2-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb52-bit-2-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb53-bit-2-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb54-bit-2-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb55-bit-2-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb56-bit-2-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb57-bit-2-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb58-bit-3-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb59-bit-3-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb5a-bit-3-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb5b-bit-3-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb5c-bit-3-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb5d-bit-3-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb5e-bit-3-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb5f-bit-3-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb60-bit-4-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb61-bit-4-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb62-bit-4-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb63-bit-4-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb64-bit-4-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb65-bit-4-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb66-bit-4-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb67-bit-4-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb68-bit-5-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb69-bit-5-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb6a-bit-5-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb6b-bit-5-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb6c-bit-5-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb6d-bit-5-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb6e-bit-5-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb6f-bit-5-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb70-bit-6-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb71-bit-6-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb72-bit-6-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb73-bit-6-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb74-bit-6-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb75-bit-6-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb76-bit-6-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb77-bit-6-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb78-bit-7-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb79-bit-7-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb7a-bit-7-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb7b-bit-7-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb7c-bit-7-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb7d-bit-7-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb7e-bit-7-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb7f-bit-7-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb80-res-0-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb81-res-0-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb82-res-0-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb83-res-0-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb84-res-0-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb85-res-0-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb86-res-0-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb87-res-0-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb88-res-1-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb89-res-1-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb8a-res-1-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb8b-res-1-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb8c-res-1-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb8d-res-1-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb8e-res-1-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb8f-res-1-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb90-res-2-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb91-res-2-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb92-res-2-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb93-res-2-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb94-res-2-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb95-res-2-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb96-res-2-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb97-res-2-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb98-res-3-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb99-res-3-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb9a-res-3-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb9b-res-3-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb9c-res-3-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb9d-res-3-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb9e-res-3-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cb9f-res-3-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba0-res-4-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba1-res-4-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba2-res-4-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba3-res-4-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba4-res-4-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba5-res-4-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba6-res-4-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba7-res-4-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba8-res-5-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cba9-res-5-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbaa-res-5-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbab-res-5-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbac-res-5-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbad-res-5-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbae-res-5-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbaf-res-5-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb0-res-6-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb1-res-6-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb2-res-6-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb3-res-6-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb4-res-6-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb5-res-6-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb6-res-6-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb7-res-6-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb8-res-7-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbb9-res-7-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbba-res-7-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbbb-res-7-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbbc-res-7-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbbd-res-7-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbbe-res-7-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbbf-res-7-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc0-set-0-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc1-set-0-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc2-set-0-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc3-set-0-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc4-set-0-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc5-set-0-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc6-set-0-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc7-set-0-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc8-set-1-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbc9-set-1-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbca-set-1-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbcb-set-1-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbcc-set-1-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbcd-set-1-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbce-set-1-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbcf-set-1-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd0-set-2-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd1-set-2-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd2-set-2-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd3-set-2-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd4-set-2-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd5-set-2-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd6-set-2-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd7-set-2-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd8-set-3-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbd9-set-3-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbda-set-3-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbdb-set-3-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbdc-set-3-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbdd-set-3-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbde-set-3-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbdf-set-3-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe0-set-4-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe1-set-4-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe2-set-4-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe3-set-4-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe4-set-4-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe5-set-4-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe6-set-4-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe7-set-4-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe8-set-5-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbe9-set-5-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbea-set-5-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbeb-set-5-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbec-set-5-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbed-set-5-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbee-set-5-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbef-set-5-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf0-set-6-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf1-set-6-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf2-set-6-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf3-set-6-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf4-set-6-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf5-set-6-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf6-set-6-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf7-set-6-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf8-set-7-b.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbf9-set-7-c.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbfa-set-7-d.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbfb-set-7-e.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbfc-set-7-h.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbfd-set-7-l.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbfe-set-7-hl.prg,exitcode,10000000
+../c128/z80/c128z80timing/,cbff-set-7-a.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb00-rlc-b_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb01-rlc-c_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb02-rlc-d_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb03-rlc-e_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb04-rlc-h_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb05-rlc-l_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb06-rlc-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb07-rlc-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb08-rrc-b_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb09-rrc-c_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb0a-rrc-d_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb0b-rrc-e_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb0c-rrc-h_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb0d-rrc-l_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb0e-rrc-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb0f-rrc-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb10-rl-b_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb11-rl-c_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb12-rl-d_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb13-rl-e_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb14-rl-h_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb15-rl-l_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb16-rl-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb17-rl-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb18-rr-b_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb19-rr-c_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb1a-rr-d_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb1b-rr-e_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb1c-rr-h_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb1d-rr-l_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb1e-rr-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb1f-rr-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb20-sla-b_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb21-sla-c_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb22-sla-d_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb23-sla-e_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb24-sla-h_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb25-sla-l_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb26-sla-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb27-sla-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb28-sra-b_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb29-sra-c_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb2a-sra-d_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb2b-sra-e_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb2c-sra-h_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb2d-sra-l_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb2e-sra-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb2f-sra-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb30-sls-b_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb31-sls-c_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb32-sls-d_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb33-sls-e_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb34-sls-h_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb35-sls-l_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb36-sls-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb37-sls-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb38-srl-b_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb39-srl-c_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb3a-srl-d_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb3b-srl-e_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb3c-srl-h_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb3d-srl-l_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb3e-srl-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb3f-srl-a_ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb40-bit-0-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb41-bit-0-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb42-bit-0-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb43-bit-0-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb44-bit-0-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb45-bit-0-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb46-bit-0-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb47-bit-0-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb48-bit-1-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb49-bit-1-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb4a-bit-1-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb4b-bit-1-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb4c-bit-1-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb4d-bit-1-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb4e-bit-1-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb4f-bit-1-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb50-bit-2-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb51-bit-2-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb52-bit-2-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb53-bit-2-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb54-bit-2-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb55-bit-2-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb56-bit-2-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb57-bit-2-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb58-bit-3-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb59-bit-3-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb5a-bit-3-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb5b-bit-3-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb5c-bit-3-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb5d-bit-3-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb5e-bit-3-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb5f-bit-3-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb60-bit-4-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb61-bit-4-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb62-bit-4-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb63-bit-4-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb64-bit-4-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb65-bit-4-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb66-bit-4-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb67-bit-4-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb68-bit-5-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb69-bit-5-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb6a-bit-5-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb6b-bit-5-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb6c-bit-5-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb6d-bit-5-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb6e-bit-5-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb6f-bit-5-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb70-bit-6-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb71-bit-6-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb72-bit-6-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb73-bit-6-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb74-bit-6-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb75-bit-6-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb76-bit-6-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb77-bit-6-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb78-bit-7-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb79-bit-7-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb7a-bit-7-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb7b-bit-7-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb7c-bit-7-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb7d-bit-7-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb7e-bit-7-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb7f-bit-7-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb80-res-0-b_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb81-res-0-c_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb82-res-0-d_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb83-res-0-e_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb84-res-0-h_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb85-res-0-l_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb86-res-0-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb87-res-0-a_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb88-res-1-b_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb89-res-1-c_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb8a-res-1-d_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb8b-res-1-e_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb8c-res-1-h_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb8d-res-1-l_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb8e-res-1-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb8f-res-1-a_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb90-res-2-b_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb91-res-2-c_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb92-res-2-d_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb93-res-2-e_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb94-res-2-h_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb95-res-2-l_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb96-res-2-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb97-res-2-a_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb98-res-3-b_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb99-res-3-c_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb9a-res-3-d_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb9b-res-3-e_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb9c-res-3-h_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb9d-res-3-l_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb9e-res-3-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcb9f-res-3-a_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba0-res-4-b_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba1-res-4-c_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba2-res-4-d_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba3-res-4-e_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba4-res-4-h_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba5-res-4-l_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba6-res-4-ixd.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba7-res-4-a_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba8-res-5-b_x.prg,exitcode,10000000
+../c128/z80/c128z80timing/,ddcba9-res-5-c_x.prg,exitcode,10000000
+../c128/z...
[truncated message content] |
|
From: <old...@us...> - 2024-04-29 22:16:23
|
Revision: 45143
http://sourceforge.net/p/vice-emu/code/45143
Author: oldwoman37
Date: 2024-04-29 22:16:06 +0000 (Mon, 29 Apr 2024)
Log Message:
-----------
Added C128 Z80 timing suite
Added Paths:
-----------
testprogs/c128/z80/c128z80timing/
testprogs/c128/z80/c128z80timing/00-nop.prg
testprogs/c128/z80/c128z80timing/00-nop.z80
testprogs/c128/z80/c128z80timing/01-ld-bc-nn.prg
testprogs/c128/z80/c128z80timing/01-ld-bc-nn.z80
testprogs/c128/z80/c128z80timing/02-ld-bc_a.prg
testprogs/c128/z80/c128z80timing/02-ld-bc_a.z80
testprogs/c128/z80/c128z80timing/03-inc-bc.prg
testprogs/c128/z80/c128z80timing/03-inc-bc.z80
testprogs/c128/z80/c128z80timing/04-inc-b.prg
testprogs/c128/z80/c128z80timing/04-inc-b.z80
testprogs/c128/z80/c128z80timing/05-dec-b.prg
testprogs/c128/z80/c128z80timing/05-dec-b.z80
testprogs/c128/z80/c128z80timing/06-ld-b-n.prg
testprogs/c128/z80/c128z80timing/06-ld-b-n.z80
testprogs/c128/z80/c128z80timing/07-rlca.prg
testprogs/c128/z80/c128z80timing/07-rlca.z80
testprogs/c128/z80/c128z80timing/08-ex-af_af.prg
testprogs/c128/z80/c128z80timing/08-ex-af_af.z80
testprogs/c128/z80/c128z80timing/09-add-hl_bc.prg
testprogs/c128/z80/c128z80timing/09-add-hl_bc.z80
testprogs/c128/z80/c128z80timing/0a-ld-a_bc.prg
testprogs/c128/z80/c128z80timing/0a-ld-a_bc.z80
testprogs/c128/z80/c128z80timing/0b-dec-bc.prg
testprogs/c128/z80/c128z80timing/0b-dec-bc.z80
testprogs/c128/z80/c128z80timing/0c-inc-c.prg
testprogs/c128/z80/c128z80timing/0c-inc-c.z80
testprogs/c128/z80/c128z80timing/0d-dec-c.prg
testprogs/c128/z80/c128z80timing/0d-dec-c.z80
testprogs/c128/z80/c128z80timing/0e-ld-c-n.prg
testprogs/c128/z80/c128z80timing/0e-ld-c-n.z80
testprogs/c128/z80/c128z80timing/0f-rrca.prg
testprogs/c128/z80/c128z80timing/0f-rrca.z80
testprogs/c128/z80/c128z80timing/10-djnz-f.prg
testprogs/c128/z80/c128z80timing/10-djnz-f.z80
testprogs/c128/z80/c128z80timing/10-djnz-t.prg
testprogs/c128/z80/c128z80timing/10-djnz-t.z80
testprogs/c128/z80/c128z80timing/11-ld-de-nn.prg
testprogs/c128/z80/c128z80timing/11-ld-de-nn.z80
testprogs/c128/z80/c128z80timing/12-ld-de_a.prg
testprogs/c128/z80/c128z80timing/12-ld-de_a.z80
testprogs/c128/z80/c128z80timing/13-inc-de.prg
testprogs/c128/z80/c128z80timing/13-inc-de.z80
testprogs/c128/z80/c128z80timing/14-inc-d.prg
testprogs/c128/z80/c128z80timing/14-inc-d.z80
testprogs/c128/z80/c128z80timing/15-dec-d.prg
testprogs/c128/z80/c128z80timing/15-dec-d.z80
testprogs/c128/z80/c128z80timing/16-ld-d-n.prg
testprogs/c128/z80/c128z80timing/16-ld-d-n.z80
testprogs/c128/z80/c128z80timing/17-rla.prg
testprogs/c128/z80/c128z80timing/17-rla.z80
testprogs/c128/z80/c128z80timing/18-jr.prg
testprogs/c128/z80/c128z80timing/18-jr.z80
testprogs/c128/z80/c128z80timing/19-add-hl_de.prg
testprogs/c128/z80/c128z80timing/19-add-hl_de.z80
testprogs/c128/z80/c128z80timing/1a-ld-a_de.prg
testprogs/c128/z80/c128z80timing/1a-ld-a_de.z80
testprogs/c128/z80/c128z80timing/1b-dec-de.prg
testprogs/c128/z80/c128z80timing/1b-dec-de.z80
testprogs/c128/z80/c128z80timing/1c-inc-e.prg
testprogs/c128/z80/c128z80timing/1c-inc-e.z80
testprogs/c128/z80/c128z80timing/1d-dec-e.prg
testprogs/c128/z80/c128z80timing/1d-dec-e.z80
testprogs/c128/z80/c128z80timing/1e-ld-e-n.prg
testprogs/c128/z80/c128z80timing/1e-ld-e-n.z80
testprogs/c128/z80/c128z80timing/1f-rra.prg
testprogs/c128/z80/c128z80timing/1f-rra.z80
testprogs/c128/z80/c128z80timing/20-jr-nz-f.prg
testprogs/c128/z80/c128z80timing/20-jr-nz-f.z80
testprogs/c128/z80/c128z80timing/20-jr-nz-t.prg
testprogs/c128/z80/c128z80timing/20-jr-nz-t.z80
testprogs/c128/z80/c128z80timing/21-ld-hl-nn.prg
testprogs/c128/z80/c128z80timing/21-ld-hl-nn.z80
testprogs/c128/z80/c128z80timing/22-ld-nn_hl.prg
testprogs/c128/z80/c128z80timing/22-ld-nn_hl.z80
testprogs/c128/z80/c128z80timing/23-inc-hl.prg
testprogs/c128/z80/c128z80timing/23-inc-hl.z80
testprogs/c128/z80/c128z80timing/24-inc-h.prg
testprogs/c128/z80/c128z80timing/24-inc-h.z80
testprogs/c128/z80/c128z80timing/25-dec-h.prg
testprogs/c128/z80/c128z80timing/25-dec-h.z80
testprogs/c128/z80/c128z80timing/26-ld-h-n.prg
testprogs/c128/z80/c128z80timing/26-ld-h-n.z80
testprogs/c128/z80/c128z80timing/27-daa.prg
testprogs/c128/z80/c128z80timing/27-daa.z80
testprogs/c128/z80/c128z80timing/28-jr-z-f.prg
testprogs/c128/z80/c128z80timing/28-jr-z-f.z80
testprogs/c128/z80/c128z80timing/28-jr-z-t.prg
testprogs/c128/z80/c128z80timing/28-jr-z-t.z80
testprogs/c128/z80/c128z80timing/29-add-hl_hl.prg
testprogs/c128/z80/c128z80timing/29-add-hl_hl.z80
testprogs/c128/z80/c128z80timing/2a-ld-hl_nn.prg
testprogs/c128/z80/c128z80timing/2a-ld-hl_nn.z80
testprogs/c128/z80/c128z80timing/2b-dec-hl.prg
testprogs/c128/z80/c128z80timing/2b-dec-hl.z80
testprogs/c128/z80/c128z80timing/2c-inc-l.prg
testprogs/c128/z80/c128z80timing/2c-inc-l.z80
testprogs/c128/z80/c128z80timing/2d-dec-l.prg
testprogs/c128/z80/c128z80timing/2d-dec-l.z80
testprogs/c128/z80/c128z80timing/2e-ld-l-n.prg
testprogs/c128/z80/c128z80timing/2e-ld-l-n.z80
testprogs/c128/z80/c128z80timing/2f-cpl.prg
testprogs/c128/z80/c128z80timing/2f-cpl.z80
testprogs/c128/z80/c128z80timing/30-jr-nc-f.prg
testprogs/c128/z80/c128z80timing/30-jr-nc-f.z80
testprogs/c128/z80/c128z80timing/30-jr-nc-t.prg
testprogs/c128/z80/c128z80timing/30-jr-nc-t.z80
testprogs/c128/z80/c128z80timing/31-ld-sp-nn.prg
testprogs/c128/z80/c128z80timing/31-ld-sp-nn.z80
testprogs/c128/z80/c128z80timing/32-ld-nn_a.prg
testprogs/c128/z80/c128z80timing/32-ld-nn_a.z80
testprogs/c128/z80/c128z80timing/33-inc-sp.prg
testprogs/c128/z80/c128z80timing/33-inc-sp.z80
testprogs/c128/z80/c128z80timing/34-inc-hl.prg
testprogs/c128/z80/c128z80timing/34-inc-hl.z80
testprogs/c128/z80/c128z80timing/35-dec-hl.prg
testprogs/c128/z80/c128z80timing/35-dec-hl.z80
testprogs/c128/z80/c128z80timing/36-ld-hl-n.prg
testprogs/c128/z80/c128z80timing/36-ld-hl-n.z80
testprogs/c128/z80/c128z80timing/37-scf.prg
testprogs/c128/z80/c128z80timing/37-scf.z80
testprogs/c128/z80/c128z80timing/38-jr-c-f.prg
testprogs/c128/z80/c128z80timing/38-jr-c-f.z80
testprogs/c128/z80/c128z80timing/38-jr-c-t.prg
testprogs/c128/z80/c128z80timing/38-jr-c-t.z80
testprogs/c128/z80/c128z80timing/39-add-hl_sp.prg
testprogs/c128/z80/c128z80timing/39-add-hl_sp.z80
testprogs/c128/z80/c128z80timing/3a-ld-a_nn.prg
testprogs/c128/z80/c128z80timing/3a-ld-a_nn.z80
testprogs/c128/z80/c128z80timing/3b-dec-sp.prg
testprogs/c128/z80/c128z80timing/3b-dec-sp.z80
testprogs/c128/z80/c128z80timing/3c-inc-a.prg
testprogs/c128/z80/c128z80timing/3c-inc-a.z80
testprogs/c128/z80/c128z80timing/3d-dec-a.prg
testprogs/c128/z80/c128z80timing/3d-dec-a.z80
testprogs/c128/z80/c128z80timing/3e-ld-a-n.prg
testprogs/c128/z80/c128z80timing/3e-ld-a-n.z80
testprogs/c128/z80/c128z80timing/3f-ccf.prg
testprogs/c128/z80/c128z80timing/3f-ccf.z80
testprogs/c128/z80/c128z80timing/40-ld-b_b.prg
testprogs/c128/z80/c128z80timing/40-ld-b_b.z80
testprogs/c128/z80/c128z80timing/41-ld-b_c.prg
testprogs/c128/z80/c128z80timing/41-ld-b_c.z80
testprogs/c128/z80/c128z80timing/42-ld-b_d.prg
testprogs/c128/z80/c128z80timing/42-ld-b_d.z80
testprogs/c128/z80/c128z80timing/43-ld-b_e.prg
testprogs/c128/z80/c128z80timing/43-ld-b_e.z80
testprogs/c128/z80/c128z80timing/44-ld-b_h.prg
testprogs/c128/z80/c128z80timing/44-ld-b_h.z80
testprogs/c128/z80/c128z80timing/45-ld-b_l.prg
testprogs/c128/z80/c128z80timing/45-ld-b_l.z80
testprogs/c128/z80/c128z80timing/46-ld-b_hl.prg
testprogs/c128/z80/c128z80timing/46-ld-b_hl.z80
testprogs/c128/z80/c128z80timing/47-ld-b_a.prg
testprogs/c128/z80/c128z80timing/47-ld-b_a.z80
testprogs/c128/z80/c128z80timing/48-ld-c_b.prg
testprogs/c128/z80/c128z80timing/48-ld-c_b.z80
testprogs/c128/z80/c128z80timing/49-ld-c_c.prg
testprogs/c128/z80/c128z80timing/49-ld-c_c.z80
testprogs/c128/z80/c128z80timing/4a-ld-c_d.prg
testprogs/c128/z80/c128z80timing/4a-ld-c_d.z80
testprogs/c128/z80/c128z80timing/4b-ld-c_e.prg
testprogs/c128/z80/c128z80timing/4b-ld-c_e.z80
testprogs/c128/z80/c128z80timing/4c-ld-c_h.prg
testprogs/c128/z80/c128z80timing/4c-ld-c_h.z80
testprogs/c128/z80/c128z80timing/4d-ld-c_l.prg
testprogs/c128/z80/c128z80timing/4d-ld-c_l.z80
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testprogs/c128/z80/c128z80timing/da-jp-c-f.prg
testprogs/c128/z80/c128z80timing/da-jp-c-f.z80
testprogs/c128/z80/c128z80timing/da-jp-c-t.prg
testprogs/c128/z80/c128z80timing/da-jp-c-t.z80
testprogs/c128/z80/c128z80timing/db-in-a_n.prg
testprogs/c128/z80/c128z80timing/db-in-a_n.z80
testprogs/c128/z80/c128z80timing/dc-call-c-f.prg
testprogs/c128/z80/c128z80timing/dc-call-c-f.z80
testprogs/c128/z80/c128z80timing/dc-call-c-t.prg
testprogs/c128/z80/c128z80timing/dc-call-c-t.z80
testprogs/c128/z80/c128z80timing/dd00-nop.prg
testprogs/c128/z80/c128z80timing/dd00-nop.z80
testprogs/c128/z80/c128z80timing/dd01-ld-bc-nn.prg
testprogs/c128/z80/c128z80timing/dd01-ld-bc-nn.z80
testprogs/c128/z80/c128z80timing/dd02-ld-bc_a.prg
testprogs/c128/z80/c128z80timing/dd02-ld-bc_a.z80
testprogs/c128/z80/c128z80timing/dd03-inc-bc.prg
testprogs/c128/z80/c128z80timing/dd03-inc-bc.z80
testprogs/c128/z80/c128z80timing/dd04-inc-b.prg
testprogs/c128/z80/c128z80timing/dd04-inc-b.z80
testprogs/c128/z80/c128z80timing/dd05-dec-b.prg
testprogs/c128/z80/c128z80timing/dd05-dec-b.z80
testprogs/c128/z80/c128z80timing/dd06-ld-b-n.prg
testprogs/c128/z80/c128z80timing/dd06-ld-b-n.z80
testprogs/c128/z80/c128z80timing/dd07-rlca.prg
testprogs/c128/z80/c128z80timing/dd07-rlca.z80
testprogs/c128/z80/c128z80timing/dd08-ex-af_af.prg
testprogs/c128/z80/c128z80timing/dd08-ex-af_af.z80
testprogs/c128/z80/c128z80timing/dd09-add-ix_bc.prg
testprogs/c128/z80/c128z80timing/dd09-add-ix_bc.z80
testprogs/c128/z80/c128z80timing/dd0a-ld-a_bc.prg
testprogs/c128/z80/c128z80timing/dd0a-ld-a_bc.z80
testprogs/c128/z80/c128z80timing/dd0b-dec-bc.prg
testprogs/c128/z80/c128z80timing/dd0b-dec-bc.z80
testprogs/c128/z80/c128z80timing/dd0c-inc-c.prg
testprogs/c128/z80/c128z80timing/dd0c-inc-c.z80
testprogs/c128/z80/c128z80timing/dd0d-dec-c.prg
testprogs/c128/z80/c128z80timing/dd0d-dec-c.z80
testprogs/c128/z80/c128z80timing/dd0e-ld-c-n.prg
testprogs/c128/z80/c128z80timing/dd0e-ld-c-n.z80
testprogs/c128/z80/c128z80timing/dd0f-rrca.prg
testprogs/c128/z80/c128z80timing/dd0f-rrca.z80
testprogs/c128/z80/c128z80timing/dd10-djnz-f.prg
testprogs/c128/z80/c128z80timing/dd10-djnz-f.z80
testprogs/c128/z80/c128z80timing/dd10-djnz-t.prg
testprogs/c128/z80/c128z80timing/dd10-djnz-t.z80
testprogs/c128/z80/c128z80timing/dd11-ld-de-nn.prg
testprogs/c128/z80/c128z80timing/dd11-ld-de-nn.z80
testprogs/c128/z80/c128z80timing/dd12-ld-de_a.prg
testprogs/c128/z80/c128z80timing/dd12-ld-de_a.z80
testprogs/c128/z80/c128z80timing/dd13-inc-de.prg
testprogs/c128/z80/c128z80timing/dd13-inc-de.z80
testprogs/c128/z80/c128z80timing/dd14-inc-d.prg
testprogs/c128/z80/c128z80timing/dd14-inc-d.z80
testprogs/c128/z80/c128z80timing/dd15-dec-d.prg
testprogs/c128/z80/c128z80timing/dd15-dec-d.z80
testprogs/c128/z80/c128z80timing/dd16-ld-d-n.prg
testprogs/c128/z80/c128z80timing/dd16-ld-d-n.z80
testprogs/c128/z80/c128z80timing/dd17-rla.prg
testprogs/c128/z80/c128z80timing/dd17-rla.z80
testprogs/c128/z80/c128z80timing/dd18-jr.prg
testprogs/c128/z80/c128z80timing/dd18-jr.z80
testprogs/c128/z80/c128z80timing/dd19-add-ix_de.prg
testprogs/c128/z80/c128z80timing/dd19-add-ix_de.z80
testprogs/c128/z80/c128z80timing/dd1a-ld-a_de.prg
testprogs/c128/z80/c128z80timing/dd1a-ld-a_de.z80
testprogs/c128/z80/c128z80timing/dd1b-dec-de.prg
testprogs/c128/z80/c128z80timing/dd1b-dec-de.z80
testprogs/c128/z80/c128z80timing/dd1c-inc-e.prg
testprogs/c128/z80/c128z80timing/dd1c-inc-e.z80
testprogs/c128/z80/c128z80timing/dd1d-dec-e.prg
testprogs/c128/z80/c128z80timing/dd1d-dec-e.z80
testprogs/c128/z80/c128z80timing/dd1e-ld-e-n.prg
testprogs/c128/z80/c128z80timing/dd1e-ld-e-n.z80
testprogs/c128/z80/c128z80timing/dd1f-rra.prg
testprogs/c128/z80/c128z80timing/dd1f-rra.z80
testprogs/c128/z80/c128z80timing/dd20-jr-nz-f.prg
testprogs/c128/z80/c128z80timing/dd20-jr-nz-f.z80
testprogs/c128/z80/c128z80timing/dd20-jr-nz-t.prg
testprogs/c128/z80/c128z80timing/dd20-jr-nz-t.z80
testprogs/c128/z80/c128z80timing/dd21-ld-ix-nn.prg
testprogs/c128/z80/c128z80timing/dd21-ld-ix-nn.z80
testprogs/c128/z80/c128z80timing/dd22-ld-nn_ix.prg
testprogs/c128/z80/c128z80timing/dd22-ld-nn_ix.z80
testprogs/c128/z80/c128z80timing/dd23-inc-ix.prg
testprogs/c128/z80/c128z80timing/dd23-inc-ix.z80
testprogs/c128/z80/c128z80timing/dd24-inc-ixh.prg
testprogs/c128/z80/c128z80timing/dd24-inc-ixh.z80
testprogs/c128/z80/c128z80timing/dd25-dec-ixh.prg
testprogs/c128/z80/c128z80timing/dd25-dec-ixh.z80
testprogs/c128/z80/c128z80timing/dd26-ld-ixh-n.prg
testprogs/c128/z80/c128z80timing/dd26-ld-ixh-n.z80
testprogs/c128/z80/c128z80timing/dd27-daa.prg
testprogs/c128/z80/c128z80timing/dd27-daa.z80
testprogs/c128/z80/c128z80timing/dd28-jr-z-f.prg
testprogs/c128/z80/c128z80timing/dd28-jr-z-f.z80
testprogs/c128/z80/c128z80timing/dd28-jr-z-t.prg
testprogs/c128/z80/c128z80timing/dd28-jr-z-t.z80
testprogs/c128/z80/c128z80timing/dd29-add-ix_ix.prg
testprogs/c128/z80/c128z80timing/dd29-add-ix_ix.z80
testprogs/c128/z80/c128z80timing/dd2a-ld-ix_nn.prg
testprogs/c128/z80/c128z80timing/dd2a-ld-ix_nn.z80
testprogs/c128/z80/c128z80timing/dd2b-dec-ix.prg
testprogs/c128/z80/c128z80timing/dd2b-dec-ix.z80
testprogs/c128/z80/c128z80timing/dd2c-inc-ixl.prg
testprogs/c128/z80/c128z80timing/dd2c-inc-ixl.z80
testprogs/c128/z80/c128z80timing/dd2d-dec-ixl.prg
testprogs/c128/z80/c128z80timing/dd2d-dec-ixl.z80
testprogs/c128/z80/c128z80timing/dd2e-ld-ixl-n.prg
testprogs/c128/z80/c128z80timing/dd2e-ld-ixl-n.z80
testprogs/c128/z80/c128z80timing/dd2f-cpl.prg
testprogs/c128/z80/c128z80timing/dd2f-cpl.z80
testprogs/c128/z80/c128z80timing/dd30-jr-nc-f.prg
testprogs/c128/z80/c128z80timing/dd30-jr-nc-f.z80
testprogs/c128/z80/c128z80timing/dd30-jr-nc-t.prg
testprogs/c128/z80/c128z80timing/dd30-jr-nc-t.z80
testprogs/c128/z80/c128z80timing/dd31-ld-sp-nn.prg
testprogs/c128/z80/c128z80timing/dd31-ld-sp-nn.z80
testprogs/c128/z80/c128z80timing/dd32-ld-nn_a.prg
testprogs/c128/z80/c128z80timing/dd32-ld-nn_a.z80
testprogs/c128/z80/c128z80timing/dd33-inc-sp.prg
testprogs/c128/z80/c128z80timing/dd33-inc-sp.z80
testprogs/c128/z80/c128z80timing/dd34-inc-ixd.prg
testprogs/c128/z80/c128z80timing/dd34-inc-ixd.z80
testprogs/c128/z80/c128z80timing/dd35-dec-ixd.prg
testprogs/c128/z80/c128z80timing/dd35-dec-ixd.z80
testprogs/c128/z80/c128z80timing/dd36-ld-ixd-n.prg
testprogs/c128/z80/c128z80timing/dd36-ld-ixd-n.z80
testprogs/c128/z80/c128z80timing/dd37-scf.prg
testprogs/c128/z80/c128z80timing/dd37-scf.z80
testprogs/c128/z80/c128z80timing/dd38-jr-c-f.prg
testprogs/c128/z80/c128z80timing/dd38-jr-c-f.z80
testprogs/c128/z80/c128z80timing/dd38-jr-c-t.prg
testprogs/c128/z80/c128z80timing/dd38-jr-c-t.z80
testprogs/c128/z80/c128z80timing/dd39-add-ix_sp.prg
testprogs/c128/z80/c128z80timing/dd39-add-ix_sp.z80
testprogs/c128/z80/c128z80timing/dd3a-ld-a_nn.prg
testprogs/c128/z80/c128z80timing/dd3a-ld-a_nn.z80
testprogs/c128/z80/c128z80timing/dd3b-dec-sp.prg
testprogs/c128/z80/c128z80timing/dd3b-dec-sp.z80
testprogs/c128/z80/c128z80timing/dd3c-inc-a.prg
testprogs/c128/z80/c128z80timing/dd3c-inc-a.z80
testprogs/c128/z80/c128z80timing/dd3d-dec-a.prg
testprogs/c128/z80/c128z80timing/dd3d-dec-a.z80
testprogs/c128/z80/c128z80timing/dd3e-ld-a-n.prg
testprogs/c128/z80/c128z80timing/dd3e-ld-a-n.z80
testprogs/c128/z80/c128z80timing/dd3f-ccf.prg
testprogs/c128/z80/c128z80timing/dd3f-ccf.z80
testprogs/c128/z80/c128z80timing/dd40-ld-b_b.prg
testprogs/c128/z80/c128z80timing/dd40-ld-b_b.z80
testprogs/c128/z80/c128z80timing/dd41-ld-b_c.prg
testprogs/c128/z80/c128z80timing/dd41-ld-b_c.z80
testprogs/c128/z80/c128z80timing/dd42-ld-b_d.prg
testprogs/c128/z80/c128z80timing/dd42-ld-b_d.z80
testprogs/c128/z80/c128z80timing/dd43-ld-b_e.prg
testprogs/c128/z80/c128z80timing/dd43-ld-b_e.z80
testprogs/c128/z80/c128z80timing/dd44-ld-b_ixh.prg
testprogs/c128/z80/c128z80timing/dd44-ld-b_ixh.z80
testprogs/c128/z80/c128z80timing/dd45-ld-b_ixl.prg
testprogs/c128/z80/c128z80timing/dd45-ld-b_ixl.z80
testprogs/c128/z80/c128z80timing/dd46-ld-b_ixd.prg
testprogs/c128/z80/c128z80timing/dd46-ld-b_ixd.z80
testprogs/c128/z80/c128z80timing/dd47-ld-b_a.prg
testprogs...
[truncated message content] |
|
From: <old...@us...> - 2024-04-29 21:49:45
|
Revision: 45142
http://sourceforge.net/p/vice-emu/code/45142
Author: oldwoman37
Date: 2024-04-29 21:48:58 +0000 (Mon, 29 Apr 2024)
Log Message:
-----------
Added C128 Z80 timing suite
Added Paths:
-----------
testprogs/c128/z80/c128z80timing/
testprogs/c128/z80/c128z80timing/00-nop.prg
testprogs/c128/z80/c128z80timing/00-nop.z80
testprogs/c128/z80/c128z80timing/01-ld-bc-nn.prg
testprogs/c128/z80/c128z80timing/01-ld-bc-nn.z80
testprogs/c128/z80/c128z80timing/02-ld-bc_a.prg
testprogs/c128/z80/c128z80timing/02-ld-bc_a.z80
testprogs/c128/z80/c128z80timing/03-inc-bc.prg
testprogs/c128/z80/c128z80timing/03-inc-bc.z80
testprogs/c128/z80/c128z80timing/04-inc-b.prg
testprogs/c128/z80/c128z80timing/04-inc-b.z80
testprogs/c128/z80/c128z80timing/05-dec-b.prg
testprogs/c128/z80/c128z80timing/05-dec-b.z80
testprogs/c128/z80/c128z80timing/06-ld-b-n.prg
testprogs/c128/z80/c128z80timing/06-ld-b-n.z80
testprogs/c128/z80/c128z80timing/07-rlca.prg
testprogs/c128/z80/c128z80timing/07-rlca.z80
testprogs/c128/z80/c128z80timing/08-ex-af_af.prg
testprogs/c128/z80/c128z80timing/08-ex-af_af.z80
testprogs/c128/z80/c128z80timing/09-add-hl_bc.prg
testprogs/c128/z80/c128z80timing/09-add-hl_bc.z80
testprogs/c128/z80/c128z80timing/0a-ld-a_bc.prg
testprogs/c128/z80/c128z80timing/0a-ld-a_bc.z80
testprogs/c128/z80/c128z80timing/0b-dec-bc.prg
testprogs/c128/z80/c128z80timing/0b-dec-bc.z80
testprogs/c128/z80/c128z80timing/0c-inc-c.prg
testprogs/c128/z80/c128z80timing/0c-inc-c.z80
testprogs/c128/z80/c128z80timing/0d-dec-c.prg
testprogs/c128/z80/c128z80timing/0d-dec-c.z80
testprogs/c128/z80/c128z80timing/0e-ld-c-n.prg
testprogs/c128/z80/c128z80timing/0e-ld-c-n.z80
testprogs/c128/z80/c128z80timing/0f-rrca.prg
testprogs/c128/z80/c128z80timing/0f-rrca.z80
testprogs/c128/z80/c128z80timing/10-djnz-f.prg
testprogs/c128/z80/c128z80timing/10-djnz-f.z80
testprogs/c128/z80/c128z80timing/10-djnz-t.prg
testprogs/c128/z80/c128z80timing/10-djnz-t.z80
testprogs/c128/z80/c128z80timing/11-ld-de-nn.prg
testprogs/c128/z80/c128z80timing/11-ld-de-nn.z80
testprogs/c128/z80/c128z80timing/12-ld-de_a.prg
testprogs/c128/z80/c128z80timing/12-ld-de_a.z80
testprogs/c128/z80/c128z80timing/13-inc-de.prg
testprogs/c128/z80/c128z80timing/13-inc-de.z80
testprogs/c128/z80/c128z80timing/14-inc-d.prg
testprogs/c128/z80/c128z80timing/14-inc-d.z80
testprogs/c128/z80/c128z80timing/15-dec-d.prg
testprogs/c128/z80/c128z80timing/15-dec-d.z80
testprogs/c128/z80/c128z80timing/16-ld-d-n.prg
testprogs/c128/z80/c128z80timing/16-ld-d-n.z80
testprogs/c128/z80/c128z80timing/17-rla.prg
testprogs/c128/z80/c128z80timing/17-rla.z80
testprogs/c128/z80/c128z80timing/18-jr.prg
testprogs/c128/z80/c128z80timing/18-jr.z80
testprogs/c128/z80/c128z80timing/19-add-hl_de.prg
testprogs/c128/z80/c128z80timing/19-add-hl_de.z80
testprogs/c128/z80/c128z80timing/1a-ld-a_de.prg
testprogs/c128/z80/c128z80timing/1a-ld-a_de.z80
testprogs/c128/z80/c128z80timing/1b-dec-de.prg
testprogs/c128/z80/c128z80timing/1b-dec-de.z80
testprogs/c128/z80/c128z80timing/1c-inc-e.prg
testprogs/c128/z80/c128z80timing/1c-inc-e.z80
testprogs/c128/z80/c128z80timing/1d-dec-e.prg
testprogs/c128/z80/c128z80timing/1d-dec-e.z80
testprogs/c128/z80/c128z80timing/1e-ld-e-n.prg
testprogs/c128/z80/c128z80timing/1e-ld-e-n.z80
testprogs/c128/z80/c128z80timing/1f-rra.prg
testprogs/c128/z80/c128z80timing/1f-rra.z80
testprogs/c128/z80/c128z80timing/20-jr-nz-f.prg
testprogs/c128/z80/c128z80timing/20-jr-nz-f.z80
testprogs/c128/z80/c128z80timing/20-jr-nz-t.prg
testprogs/c128/z80/c128z80timing/20-jr-nz-t.z80
testprogs/c128/z80/c128z80timing/21-ld-hl-nn.prg
testprogs/c128/z80/c128z80timing/21-ld-hl-nn.z80
testprogs/c128/z80/c128z80timing/22-ld-nn_hl.prg
testprogs/c128/z80/c128z80timing/22-ld-nn_hl.z80
testprogs/c128/z80/c128z80timing/23-inc-hl.prg
testprogs/c128/z80/c128z80timing/23-inc-hl.z80
testprogs/c128/z80/c128z80timing/24-inc-h.prg
testprogs/c128/z80/c128z80timing/24-inc-h.z80
testprogs/c128/z80/c128z80timing/25-dec-h.prg
testprogs/c128/z80/c128z80timing/25-dec-h.z80
testprogs/c128/z80/c128z80timing/26-ld-h-n.prg
testprogs/c128/z80/c128z80timing/26-ld-h-n.z80
testprogs/c128/z80/c128z80timing/27-daa.prg
testprogs/c128/z80/c128z80timing/27-daa.z80
testprogs/c128/z80/c128z80timing/28-jr-z-f.prg
testprogs/c128/z80/c128z80timing/28-jr-z-f.z80
testprogs/c128/z80/c128z80timing/28-jr-z-t.prg
testprogs/c128/z80/c128z80timing/28-jr-z-t.z80
testprogs/c128/z80/c128z80timing/29-add-hl_hl.prg
testprogs/c128/z80/c128z80timing/29-add-hl_hl.z80
testprogs/c128/z80/c128z80timing/2a-ld-hl_nn.prg
testprogs/c128/z80/c128z80timing/2a-ld-hl_nn.z80
testprogs/c128/z80/c128z80timing/2b-dec-hl.prg
testprogs/c128/z80/c128z80timing/2b-dec-hl.z80
testprogs/c128/z80/c128z80timing/2c-inc-l.prg
testprogs/c128/z80/c128z80timing/2c-inc-l.z80
testprogs/c128/z80/c128z80timing/2d-dec-l.prg
testprogs/c128/z80/c128z80timing/2d-dec-l.z80
testprogs/c128/z80/c128z80timing/2e-ld-l-n.prg
testprogs/c128/z80/c128z80timing/2e-ld-l-n.z80
testprogs/c128/z80/c128z80timing/2f-cpl.prg
testprogs/c128/z80/c128z80timing/2f-cpl.z80
testprogs/c128/z80/c128z80timing/30-jr-nc-f.prg
testprogs/c128/z80/c128z80timing/30-jr-nc-f.z80
testprogs/c128/z80/c128z80timing/30-jr-nc-t.prg
testprogs/c128/z80/c128z80timing/30-jr-nc-t.z80
testprogs/c128/z80/c128z80timing/31-ld-sp-nn.prg
testprogs/c128/z80/c128z80timing/31-ld-sp-nn.z80
testprogs/c128/z80/c128z80timing/32-ld-nn_a.prg
testprogs/c128/z80/c128z80timing/32-ld-nn_a.z80
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testprogs/c128/z80/c128z80timing/cbf7-set-6-a.z80
testprogs/c128/z80/c128z80timing/cbf8-set-7-b.prg
testprogs/c128/z80/c128z80timing/cbf8-set-7-b.z80
testprogs/c128/z80/c128z80timing/cbf9-set-7-c.prg
testprogs/c128/z80/c128z80timing/cbf9-set-7-c.z80
testprogs/c128/z80/c128z80timing/cbfa-set-7-d.prg
testprogs/c128/z80/c128z80timing/cbfa-set-7-d.z80
testprogs/c128/z80/c128z80timing/cbfb-set-7-e.prg
testprogs/c128/z80/c128z80timing/cbfb-set-7-e.z80
testprogs/c128/z80/c128z80timing/cbfc-set-7-h.prg
testprogs/c128/z80/c128z80timing/cbfc-set-7-h.z80
testprogs/c128/z80/c128z80timing/cbfd-set-7-l.prg
testprogs/c128/z80/c128z80timing/cbfd-set-7-l.z80
testprogs/c128/z80/c128z80timing/cbfe-set-7-hl.prg
testprogs/c128/z80/c128z80timing/cbfe-set-7-hl.z80
testprogs/c128/z80/c128z80timing/cbff-set-7-a.prg
testprogs/c128/z80/c128z80timing/cbff-set-7-a.z80
testprogs/c128/z80/c128z80timing/cc-call-z-f.prg
testprogs/c128/z80/c128z80timing/cc-call-z-f.z80
testprogs/c128/z80/c128z80timing/cc-call-z-t.prg
testprogs/c128/z80/c128z80timing/cc-call-z-t.z80
testprogs/c128/z80/c128z80timing/cd-call.prg
testprogs/c128/z80/c128z80timing/cd-call.z80
testprogs/c128/z80/c128z80timing/ce-adc-a-n.prg
testprogs/c128/z80/c128z80timing/ce-adc-a-n.z80
testprogs/c128/z80/c128z80timing/cf-rst-08.prg
testprogs/c128/z80/c128z80timing/cf-rst-08.z80
testprogs/c128/z80/c128z80timing/d0-retnc-f.prg
testprogs/c128/z80/c128z80timing/d0-retnc-f.z80
testprogs/c128/z80/c128z80timing/d0-retnc-t.prg
testprogs/c128/z80/c128z80timing/d0-retnc-t.z80
testprogs/c128/z80/c128z80timing/d1-pop-de.prg
testprogs/c128/z80/c128z80timing/d1-pop-de.z80
testprogs/c128/z80/c128z80timing/d2-jp-nc-f.prg
testprogs/c128/z80/c128z80timing/d2-jp-nc-f.z80
testprogs/c128/z80/c128z80timing/d2-jp-nc-t.prg
testprogs/c128/z80/c128z80timing/d2-jp-nc-t.z80
testprogs/c128/z80/c128z80timing/d3-out-n_a.prg
testprogs/c128/z80/c128z80timing/d3-out-n_a.z80
testprogs/c128/z80/c128z80timing/d4-call-nc-f.prg
testprogs/c128/z80/c128z80timing/d4-call-nc-f.z80
testprogs/c128/z80/c128z80timing/d4-call-nc-t.prg
testprogs/c128/z80/c128z80timing/d4-call-nc-t.z80
testprogs/c128/z80/c128z80timing/d5-push-de.prg
testprogs/c128/z80/c128z80timing/d5-push-de.z80
testprogs/c128/z80/c128z80timing/d6-sub-n.prg
testprogs/c128/z80/c128z80timing/d6-sub-n.z80
testprogs/c128/z80/c128z80timing/d7-rst-10.prg
testprogs/c128/z80/c128z80timing/d7-rst-10.z80
testprogs/c128/z80/c128z80timing/d8-retc-f.prg
testprogs/c128/z80/c128z80timing/d8-retc-f.z80
testprogs/c128/z80/c128z80timing/d8-retc-t.prg
testprogs/c128/z80/c128z80timing/d8-retc-t.z80
testprogs/c128/z80/c128z80timing/d9-exx.prg
testprogs/c128/z80/c128z80timing/d9-exx.z80
testprogs/c128/z80/c128z80timing/da-jp-c-f.prg
testprogs/c128/z80/c128z80timing/da-jp-c-f.z80
testprogs/c128/z80/c128z80timing/da-jp-c-t.prg
testprogs/c128/z80/c128z80timing/da-jp-c-t.z80
testprogs/c128/z80/c128z80timing/db-in-a_n.prg
testprogs/c128/z80/c128z80timing/db-in-a_n.z80
testprogs/c128/z80/c128z80timing/dc-call-c-f.prg
testprogs/c128/z80/c128z80timing/dc-call-c-f.z80
testprogs/c128/z80/c128z80timing/dc-call-c-t.prg
testprogs/c128/z80/c128z80timing/dc-call-c-t.z80
testprogs/c128/z80/c128z80timing/dd00-nop.prg
testprogs/c128/z80/c128z80timing/dd00-nop.z80
testprogs/c128/z80/c128z80timing/dd01-ld-bc-nn.prg
testprogs/c128/z80/c128z80timing/dd01-ld-bc-nn.z80
testprogs/c128/z80/c128z80timing/dd02-ld-bc_a.prg
testprogs/c128/z80/c128z80timing/dd02-ld-bc_a.z80
testprogs/c128/z80/c128z80timing/dd03-inc-bc.prg
testprogs/c128/z80/c128z80timing/dd03-inc-bc.z80
testprogs/c128/z80/c128z80timing/dd04-inc-b.prg
testprogs/c128/z80/c128z80timing/dd04-inc-b.z80
testprogs/c128/z80/c128z80timing/dd05-dec-b.prg
testprogs/c128/z80/c128z80timing/dd05-dec-b.z80
testprogs/c128/z80/c128z80timing/dd06-ld-b-n.prg
testprogs/c128/z80/c128z80timing/dd06-ld-b-n.z80
testprogs/c128/z80/c128z80timing/dd07-rlca.prg
testprogs/c128/z80/c128z80timing/dd07-rlca.z80
testprogs/c128/z80/c128z80timing/dd08-ex-af_af.prg
testprogs/c128/z80/c128z80timing/dd08-ex-af_af.z80
testprogs/c128/z80/c128z80timing/dd09-add-ix_bc.prg
testprogs/c128/z80/c128z80timing/dd09-add-ix_bc.z80
testprogs/c128/z80/c128z80timing/dd0a-ld-a_bc.prg
testprogs/c128/z80/c128z80timing/dd0a-ld-a_bc.z80
testprogs/c128/z80/c128z80timing/dd0b-dec-bc.prg
testprogs/c128/z80/c128z80timing/dd0b-dec-bc.z80
testprogs/c128/z80/c128z80timing/dd0c-inc-c.prg
testprogs/c128/z80/c128z80timing/dd0c-inc-c.z80
testprogs/c128/z80/c128z80timing/dd0d-dec-c.prg
testprogs/c128/z80/c128z80timing/dd0d-dec-c.z80
testprogs/c128/z80/c128z80timing/dd0e-ld-c-n.prg
testprogs/c128/z80/c128z80timing/dd0e-ld-c-n.z80
testprogs/c128/z80/c128z80timing/dd0f-rrca.prg
testprogs/c128/z80/c128z80timing/dd0f-rrca.z80
testprogs/c128/z80/c128z80timing/dd10-djnz-f.prg
testprogs/c128/z80/c128z80timing/dd10-djnz-f.z80
testprogs/c128/z80/c128z80timing/dd10-djnz-t.prg
testprogs/c128/z80/c128z80timing/dd10-djnz-t.z80
testprogs/c128/z80/c128z80timing/dd11-ld-de-nn.prg
testprogs/c128/z80/c128z80timing/dd11-ld-de-nn.z80
testprogs/c128/z80/c128z80timing/dd12-ld-de_a.prg
testprogs/c128/z80/c128z80timing/dd12-ld-de_a.z80
testprogs/c128/z80/c128z80timing/dd13-inc-de.prg
testprogs/c128/z80/c128z80timing/dd13-inc-de.z80
testprogs/c128/z80/c128z80timing/dd14-inc-d.prg
testprogs/c128/z80/c128z80timing/dd14-inc-d.z80
testprogs/c128/z80/c128z80timing/dd15-dec-d.prg
testprogs/c128/z80/c128z80timing/dd15-dec-d.z80
testprogs/c128/z80/c128z80timing/dd16-ld-d-n.prg
testprogs/c128/z80/c128z80timing/dd16-ld-d-n.z80
testprogs/c128/z80/c128z80timing/dd17-rla.prg
testprogs/c128/z80/c128z80timing/dd17-rla.z80
testprogs/c128/z80/c128z80timing/dd18-jr.prg
testprogs/c128/z80/c128z80timing/dd18-jr.z80
testprogs/c128/z80/c128z80timing/dd19-add-ix_de.prg
testprogs/c128/z80/c128z80timing/dd19-add-ix_de.z80
testprogs/c128/z80/c128z80timing/dd1a-ld-a_de.prg
testprogs/c128/z80/c128z80timing/dd1a-ld-a_de.z80
testprogs/c128/z80/c128z80timing/dd1b-dec-de.prg
testprogs/c128/z80/c128z80timing/dd1b-dec-de.z80
testprogs/c128/z80/c128z80timing/dd1c-inc-e.prg
testprogs/c128/z80/c128z80timing/dd1c-inc-e.z80
testprogs/c128/z80/c128z80timing/dd1d-dec-e.prg
testprogs/c128/z80/c128z80timing/dd1d-dec-e.z80
testprogs/c128/z80/c128z80timing/dd1e-ld-e-n.prg
testprogs/c128/z80/c128z80timing/dd1e-ld-e-n.z80
testprogs/c128/z80/c128z80timing/dd1f-rra.prg
testprogs/c128/z80/c128z80timing/dd1f-rra.z80
testprogs/c128/z80/c128z80timing/dd20-jr-nz-f.prg
testprogs/c128/z80/c128z80timing/dd20-jr-nz-f.z80
testprogs/c128/z80/c128z80timing/dd20-jr-nz-t.prg
testprogs/c128/z80/c128z80timing/dd20-jr-nz-t.z80
testprogs/c128/z80/c128z80timing/dd21-ld-ix-nn.prg
testprogs/c128/z80/c128z80timing/dd21-ld-ix-nn.z80
testprogs/c128/z80/c128z80timing/dd22-ld-nn_ix.prg
testprogs/c128/z80/c128z80timing/dd22-ld-nn_ix.z80
testprogs/c128/z80/c128z80timing/dd23-inc-ix.prg
testprogs/c128/z80/c128z80timing/dd23-inc-ix.z80
testprogs/c128/z80/c128z80timing/dd24-inc-ixh.prg
testprogs/c128/z80/c128z80timing/dd24-inc-ixh.z80
testprogs/c128/z80/c128z80timing/dd25-dec-ixh.prg
testprogs/c128/z80/c128z80timing/dd25-dec-ixh.z80
testprogs/c128/z80/c128z80timing/dd26-ld-ixh-n.prg
testprogs/c128/z80/c128z80timing/dd26-ld-ixh-n.z80
testprogs/c128/z80/c128z80timing/dd27-daa.prg
testprogs/c128/z80/c128z80timing/dd27-daa.z80
testprogs/c128/z80/c128z80timing/dd28-jr-z-f.prg
testprogs/c128/z80/c128z80timing/dd28-jr-z-f.z80
testprogs/c128/z80/c128z80timing/dd28-jr-z-t.prg
testprogs/c128/z80/c128z80timing/dd28-jr-z-t.z80
testprogs/c128/z80/c128z80timing/dd29-add-ix_ix.prg
testprogs/c128/z80/c128z80timing/dd29-add-ix_ix.z80
testprogs/c128/z80/c128z80timing/dd2a-ld-ix_nn.prg
testprogs/c128/z80/c128z80timing/dd2a-ld-ix_nn.z80
testprogs/c128/z80/c128z80timing/dd2b-dec-ix.prg
testprogs/c128/z80/c128z80timing/dd2b-dec-ix.z80
testprogs/c128/z80/c128z80timing/dd2c-inc-ixl.prg
testprogs/c128/z80/c128z80timing/dd2c-inc-ixl.z80
testprogs/c128/z80/c128z80timing/dd2d-dec-ixl.prg
testprogs/c128/z80/c128z80timing/dd2d-dec-ixl.z80
testprogs/c128/z80/c128z80timing/dd2e-ld-ixl-n.prg
testprogs/c128/z80/c128z80timing/dd2e-ld-ixl-n.z80
testprogs/c128/z80/c128z80timing/dd2f-cpl.prg
testprogs/c128/z80/c128z80timing/dd2f-cpl.z80
testprogs/c128/z80/c128z80timing/dd30-jr-nc-f.prg
testprogs/c128/z80/c128z80timing/dd30-jr-nc-f.z80
testprogs/c128/z80/c128z80timing/dd30-jr-nc-t.prg
testprogs/c128/z80/c128z80timing/dd30-jr-nc-t.z80
testprogs/c128/z80/c128z80timing/dd31-ld-sp-nn.prg
testprogs/c128/z80/c128z80timing/dd31-ld-sp-nn.z80
testprogs/c128/z80/c128z80timing/dd32-ld-nn_a.prg
testprogs/c128/z80/c128z80timing/dd32-ld-nn_a.z80
testprogs/c128/z80/c128z80timing/dd33-inc-sp.prg
testprogs/c128/z80/c128z80timing/dd33-inc-sp.z80
testprogs/c128/z80/c128z80timing/dd34-inc-ixd.prg
testprogs/c128/z80/c128z80timing/dd34-inc-ixd.z80
testprogs/c128/z80/c128z80timing/dd35-dec-ixd.prg
testprogs/c128/z80/c128z80timing/dd35-dec-ixd.z80
testprogs/c128/z80/c128z80timing/dd36-ld-ixd-n.prg
testprogs/c128/z80/c128z80timing/dd36-ld-ixd-n.z80
testprogs/c128/z80/c128z80timing/dd37-scf.prg
testprogs/c128/z80/c128z80timing/dd37-scf.z80
testprogs/c128/z80/c128z80timing/dd38-jr-c-f.prg
testprogs/c128/z80/c128z80timing/dd38-jr-c-f.z80
testprogs/c128/z80/c128z80timing/dd38-jr-c-t.prg
testprogs/c128/z80/c128z80timing/dd38-jr-c-t.z80
testprogs/c128/z80/c128z80timing/dd39-add-ix_sp.prg
testprogs/c128/z80/c128z80timing/dd39-add-ix_sp.z80
testprogs/c128/z80/c128z80timing/dd3a-ld-a_nn.prg
testprogs/c128/z80/c128z80timing/dd3a-ld-a_nn.z80
testprogs/c128/z80/c128z80timing/dd3b-dec-sp.prg
testprogs/c128/z80/c128z80timing/dd3b-dec-sp.z80
testprogs/c128/z80/c128z80timing/dd3c-inc-a.prg
testprogs/c128/z80/c128z80timing/dd3c-inc-a.z80
testprogs/c128/z80/c128z80timing/dd3d-dec-a.prg
testprogs/c128/z80/c128z80timing/dd3d-dec-a.z80
testprogs/c128/z80/c128z80timing/dd3e-ld-a-n.prg
testprogs/c128/z80/c128z80timing/dd3e-ld-a-n.z80
testprogs/c128/z80/c128z80timing/dd3f-ccf.prg
testprogs/c128/z80/c128z80timing/dd3f-ccf.z80
testprogs/c128/z80/c128z80timing/dd40-ld-b_b.prg
testprogs/c128/z80/c128z80timing/dd40-ld-b_b.z80
testprogs/c128/z80/c128z80timing/dd41-ld-b_c.prg
testprogs/c128/z80/c128z80timing/dd41-ld-b_c.z80
testprogs/c128/z80/c128z80timing/dd42-ld-b_d.prg
testprogs/c128/z80/c128z80timing/dd42-ld-b_d.z80
testprogs/c128/z80/c128z80timing/dd43-ld-b_e.prg
testprogs/c128/z80/c128z80timing/dd43-ld-b_e.z80
testprogs/c128/z80/c128z80timing/dd44-ld-b_ixh.prg
testprogs/c128/z80/c128z80timing/dd44-ld-b_ixh.z80
testprogs/c128/z80/c128z80timing/dd45-ld-b_ixl.prg
testprogs/c128/z80/c128z80timing/dd45-ld-b_ixl.z80
testprogs/c128/z80/c128z80timing/dd46-ld-b_ixd.prg
testprogs/c128/z80/c128z80timing/dd46-ld-b_ixd.z80
testprogs/c128/z80/c128z80timing/dd47-ld-b_a.prg
testprogs...
[truncated message content] |
|
From: <old...@us...> - 2024-04-29 03:36:55
|
Revision: 45141
http://sourceforge.net/p/vice-emu/code/45141
Author: oldwoman37
Date: 2024-04-29 03:36:52 +0000 (Mon, 29 Apr 2024)
Log Message:
-----------
Added zex128 to C128 testbench
Modified Paths:
--------------
testprogs/testbench/c128-testlist.in
testprogs/testbench/kernal64c128c128-testlist.txt
testprogs/testbench/x128-testlist.txt
testprogs/testbench/z64kc128-testlist.txt
Modified: testprogs/testbench/c128-testlist.in
===================================================================
--- testprogs/testbench/c128-testlist.in 2024-04-29 03:36:04 UTC (rev 45140)
+++ testprogs/testbench/c128-testlist.in 2024-04-29 03:36:52 UTC (rev 45141)
@@ -153,6 +153,144 @@
../c128/z80/outi/,tstouti2.prg,exitcode,7000000
../c128/z80/mmu_zp_sp/,tstz80bk.prg,exitcode,7000000
################################################################################
+# Z80
+################################################################################
+../c128/z80/zex128/,prelim.prg,exitcode,13000000
+../c128/z80/zex128/,adc16.prg,exitcode,1235000000
+../c128/z80/zex128/,add16.prg,exitcode,619000000
+../c128/z80/zex128/,add16x.prg,exitcode,619000000
+../c128/z80/zex128/,add16y.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i.prg,exitcode,298000000
+../c128/z80/zex128/,alu8r.prg,exitcode,10661000000
+../c128/z80/zex128/,alu8rx.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x.prg,exitcode,2650000000
+../c128/z80/zex128/,bitx.prg,exitcode,27000000
+../c128/z80/zex128/,bitz80.prg,exitcode,693000000
+../c128/z80/zex128/,cpd1.prg,exitcode,133000000
+../c128/z80/zex128/,cpi1.prg,exitcode,134000000
+../c128/z80/zex128/,daaop.prg,exitcode,558000000
+../c128/z80/zex128/,inca.prg,exitcode,37000000
+../c128/z80/zex128/,incb.prg,exitcode,37000000
+../c128/z80/zex128/,incbc.prg,exitcode,23000000
+../c128/z80/zex128/,incc.prg,exitcode,37000000
+../c128/z80/zex128/,incd.prg,exitcode,37000000
+../c128/z80/zex128/,incde.prg,exitcode,23000000
+../c128/z80/zex128/,ince.prg,exitcode,37000000
+../c128/z80/zex128/,inch.prg,exitcode,37000000
+../c128/z80/zex128/,inchl.prg,exitcode,23000000
+../c128/z80/zex128/,incix.prg,exitcode,23000000
+../c128/z80/zex128/,inciy.prg,exitcode,23000000
+../c128/z80/zex128/,incl.prg,exitcode,37000000
+../c128/z80/zex128/,incm.prg,exitcode,37000000
+../c128/z80/zex128/,incsp.prg,exitcode,23000000
+../c128/z80/zex128/,incx.prg,exitcode,70000000
+../c128/z80/zex128/,incxh.prg,exitcode,37000000
+../c128/z80/zex128/,incxl.prg,exitcode,37000000
+../c128/z80/zex128/,incyh.prg,exitcode,37000000
+../c128/z80/zex128/,incyl.prg,exitcode,37000000
+../c128/z80/zex128/,ld161.prg,exitcode,8000000
+../c128/z80/zex128/,ld162.prg,exitcode,7000000
+../c128/z80/zex128/,ld163.prg,exitcode,7000000
+../c128/z80/zex128/,ld164.prg,exitcode,7000000
+../c128/z80/zex128/,ld165.prg,exitcode,7000000
+../c128/z80/zex128/,ld166.prg,exitcode,7000000
+../c128/z80/zex128/,ld167.prg,exitcode,7000000
+../c128/z80/zex128/,ld168.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im.prg,exitcode,7000000
+../c128/z80/zex128/,ld16ix.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx.prg,exitcode,107000000
+../c128/z80/zex128/,lda.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2.prg,exitcode,7000000
+../c128/z80/zex128/,negop.prg,exitcode,135000000
+../c128/z80/zex128/,rldop.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080.prg,exitcode,67000000
+../c128/z80/zex128/,rotxy.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80.prg,exitcode,104000000
+../c128/z80/zex128/,srz80.prg,exitcode,106000000
+../c128/z80/zex128/,srzx.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2.prg,exitcode,10000000
+../c128/z80/zex128/,st8ix3.prg,exitcode,7000000
+../c128/z80/zex128/,stabd.prg,exitcode,7000000
+../c128/z80/zex128/,adc16-all.prg,exitcode,1236000000
+../c128/z80/zex128/,add16-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16x-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16y-all.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i-all.prg,exitcode,299000000
+../c128/z80/zex128/,alu8r-all.prg,exitcode,10662000000
+../c128/z80/zex128/,alu8rx-all.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x-all.prg,exitcode,2651000000
+../c128/z80/zex128/,bitx-all.prg,exitcode,28000000
+../c128/z80/zex128/,bitz80-all.prg,exitcode,694000000
+../c128/z80/zex128/,cpd1-all.prg,exitcode,134000000
+../c128/z80/zex128/,cpi1-all.prg,exitcode,134000000
+../c128/z80/zex128/,daaop-all.prg,exitcode,558000000
+../c128/z80/zex128/,inca-all.prg,exitcode,37000000
+../c128/z80/zex128/,incb-all.prg,exitcode,37000000
+../c128/z80/zex128/,incbc-all.prg,exitcode,23000000
+../c128/z80/zex128/,incc-all.prg,exitcode,37000000
+../c128/z80/zex128/,incd-all.prg,exitcode,38000000
+../c128/z80/zex128/,incde-all.prg,exitcode,23000000
+../c128/z80/zex128/,ince-all.prg,exitcode,37000000
+../c128/z80/zex128/,inch-all.prg,exitcode,37000000
+../c128/z80/zex128/,inchl-all.prg,exitcode,23000000
+../c128/z80/zex128/,incix-all.prg,exitcode,23000000
+../c128/z80/zex128/,inciy-all.prg,exitcode,23000000
+../c128/z80/zex128/,incl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incm-all.prg,exitcode,37000000
+../c128/z80/zex128/,incsp-all.prg,exitcode,23000000
+../c128/z80/zex128/,incx-all.prg,exitcode,70000000
+../c128/z80/zex128/,incxh-all.prg,exitcode,37000000
+../c128/z80/zex128/,incxl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incyh-all.prg,exitcode,38000000
+../c128/z80/zex128/,incyl-all.prg,exitcode,37000000
+../c128/z80/zex128/,ld161-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld162-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld163-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld164-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld165-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld166-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld167-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld168-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld16ix-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1-all.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2-all.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr-all.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx-all.prg,exitcode,108000000
+../c128/z80/zex128/,lda-all.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2-all.prg,exitcode,7000000
+../c128/z80/zex128/,negop-all.prg,exitcode,136000000
+../c128/z80/zex128/,rldop-all.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080-all.prg,exitcode,68000000
+../c128/z80/zex128/,rotxy-all.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srzx-all.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1-all.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2-all.prg,exitcode,11000000
+../c128/z80/zex128/,st8ix3-all.prg,exitcode,7000000
+../c128/z80/zex128/,stabd-all.prg,exitcode,8000000
+################################################################################
# VDC
################################################################################
# TODO: make all these automatic
Modified: testprogs/testbench/kernal64c128c128-testlist.txt
===================================================================
--- testprogs/testbench/kernal64c128c128-testlist.txt 2024-04-29 03:36:04 UTC (rev 45140)
+++ testprogs/testbench/kernal64c128c128-testlist.txt 2024-04-29 03:36:52 UTC (rev 45141)
@@ -154,6 +154,144 @@
../c128/z80/outi/,tstouti2.prg,exitcode,7000000
../c128/z80/mmu_zp_sp/,tstz80bk.prg,exitcode,7000000
################################################################################
+# Z80
+################################################################################
+../c128/z80/zex128/,prelim.prg,exitcode,13000000
+../c128/z80/zex128/,adc16.prg,exitcode,1235000000
+../c128/z80/zex128/,add16.prg,exitcode,619000000
+../c128/z80/zex128/,add16x.prg,exitcode,619000000
+../c128/z80/zex128/,add16y.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i.prg,exitcode,298000000
+../c128/z80/zex128/,alu8r.prg,exitcode,10661000000
+../c128/z80/zex128/,alu8rx.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x.prg,exitcode,2650000000
+../c128/z80/zex128/,bitx.prg,exitcode,27000000
+../c128/z80/zex128/,bitz80.prg,exitcode,693000000
+../c128/z80/zex128/,cpd1.prg,exitcode,133000000
+../c128/z80/zex128/,cpi1.prg,exitcode,134000000
+../c128/z80/zex128/,daaop.prg,exitcode,558000000
+../c128/z80/zex128/,inca.prg,exitcode,37000000
+../c128/z80/zex128/,incb.prg,exitcode,37000000
+../c128/z80/zex128/,incbc.prg,exitcode,23000000
+../c128/z80/zex128/,incc.prg,exitcode,37000000
+../c128/z80/zex128/,incd.prg,exitcode,37000000
+../c128/z80/zex128/,incde.prg,exitcode,23000000
+../c128/z80/zex128/,ince.prg,exitcode,37000000
+../c128/z80/zex128/,inch.prg,exitcode,37000000
+../c128/z80/zex128/,inchl.prg,exitcode,23000000
+../c128/z80/zex128/,incix.prg,exitcode,23000000
+../c128/z80/zex128/,inciy.prg,exitcode,23000000
+../c128/z80/zex128/,incl.prg,exitcode,37000000
+../c128/z80/zex128/,incm.prg,exitcode,37000000
+../c128/z80/zex128/,incsp.prg,exitcode,23000000
+../c128/z80/zex128/,incx.prg,exitcode,70000000
+../c128/z80/zex128/,incxh.prg,exitcode,37000000
+../c128/z80/zex128/,incxl.prg,exitcode,37000000
+../c128/z80/zex128/,incyh.prg,exitcode,37000000
+../c128/z80/zex128/,incyl.prg,exitcode,37000000
+../c128/z80/zex128/,ld161.prg,exitcode,8000000
+../c128/z80/zex128/,ld162.prg,exitcode,7000000
+../c128/z80/zex128/,ld163.prg,exitcode,7000000
+../c128/z80/zex128/,ld164.prg,exitcode,7000000
+../c128/z80/zex128/,ld165.prg,exitcode,7000000
+../c128/z80/zex128/,ld166.prg,exitcode,7000000
+../c128/z80/zex128/,ld167.prg,exitcode,7000000
+../c128/z80/zex128/,ld168.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im.prg,exitcode,7000000
+../c128/z80/zex128/,ld16ix.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx.prg,exitcode,107000000
+../c128/z80/zex128/,lda.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2.prg,exitcode,7000000
+../c128/z80/zex128/,negop.prg,exitcode,135000000
+../c128/z80/zex128/,rldop.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080.prg,exitcode,67000000
+../c128/z80/zex128/,rotxy.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80.prg,exitcode,104000000
+../c128/z80/zex128/,srz80.prg,exitcode,106000000
+../c128/z80/zex128/,srzx.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2.prg,exitcode,10000000
+../c128/z80/zex128/,st8ix3.prg,exitcode,7000000
+../c128/z80/zex128/,stabd.prg,exitcode,7000000
+../c128/z80/zex128/,adc16-all.prg,exitcode,1236000000
+../c128/z80/zex128/,add16-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16x-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16y-all.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i-all.prg,exitcode,299000000
+../c128/z80/zex128/,alu8r-all.prg,exitcode,10662000000
+../c128/z80/zex128/,alu8rx-all.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x-all.prg,exitcode,2651000000
+../c128/z80/zex128/,bitx-all.prg,exitcode,28000000
+../c128/z80/zex128/,bitz80-all.prg,exitcode,694000000
+../c128/z80/zex128/,cpd1-all.prg,exitcode,134000000
+../c128/z80/zex128/,cpi1-all.prg,exitcode,134000000
+../c128/z80/zex128/,daaop-all.prg,exitcode,558000000
+../c128/z80/zex128/,inca-all.prg,exitcode,37000000
+../c128/z80/zex128/,incb-all.prg,exitcode,37000000
+../c128/z80/zex128/,incbc-all.prg,exitcode,23000000
+../c128/z80/zex128/,incc-all.prg,exitcode,37000000
+../c128/z80/zex128/,incd-all.prg,exitcode,38000000
+../c128/z80/zex128/,incde-all.prg,exitcode,23000000
+../c128/z80/zex128/,ince-all.prg,exitcode,37000000
+../c128/z80/zex128/,inch-all.prg,exitcode,37000000
+../c128/z80/zex128/,inchl-all.prg,exitcode,23000000
+../c128/z80/zex128/,incix-all.prg,exitcode,23000000
+../c128/z80/zex128/,inciy-all.prg,exitcode,23000000
+../c128/z80/zex128/,incl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incm-all.prg,exitcode,37000000
+../c128/z80/zex128/,incsp-all.prg,exitcode,23000000
+../c128/z80/zex128/,incx-all.prg,exitcode,70000000
+../c128/z80/zex128/,incxh-all.prg,exitcode,37000000
+../c128/z80/zex128/,incxl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incyh-all.prg,exitcode,38000000
+../c128/z80/zex128/,incyl-all.prg,exitcode,37000000
+../c128/z80/zex128/,ld161-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld162-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld163-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld164-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld165-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld166-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld167-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld168-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld16ix-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1-all.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2-all.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr-all.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx-all.prg,exitcode,108000000
+../c128/z80/zex128/,lda-all.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2-all.prg,exitcode,7000000
+../c128/z80/zex128/,negop-all.prg,exitcode,136000000
+../c128/z80/zex128/,rldop-all.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080-all.prg,exitcode,68000000
+../c128/z80/zex128/,rotxy-all.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srzx-all.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1-all.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2-all.prg,exitcode,11000000
+../c128/z80/zex128/,st8ix3-all.prg,exitcode,7000000
+../c128/z80/zex128/,stabd-all.prg,exitcode,8000000
+################################################################################
# VDC
################################################################################
# TODO: make all these automatic
Modified: testprogs/testbench/x128-testlist.txt
===================================================================
--- testprogs/testbench/x128-testlist.txt 2024-04-29 03:36:04 UTC (rev 45140)
+++ testprogs/testbench/x128-testlist.txt 2024-04-29 03:36:52 UTC (rev 45141)
@@ -154,6 +154,144 @@
../c128/z80/outi/,tstouti2.prg,exitcode,7000000
../c128/z80/mmu_zp_sp/,tstz80bk.prg,exitcode,7000000
################################################################################
+# Z80
+################################################################################
+../c128/z80/zex128/,prelim.prg,exitcode,13000000
+../c128/z80/zex128/,adc16.prg,exitcode,1235000000
+../c128/z80/zex128/,add16.prg,exitcode,619000000
+../c128/z80/zex128/,add16x.prg,exitcode,619000000
+../c128/z80/zex128/,add16y.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i.prg,exitcode,298000000
+../c128/z80/zex128/,alu8r.prg,exitcode,10661000000
+../c128/z80/zex128/,alu8rx.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x.prg,exitcode,2650000000
+../c128/z80/zex128/,bitx.prg,exitcode,27000000
+../c128/z80/zex128/,bitz80.prg,exitcode,693000000
+../c128/z80/zex128/,cpd1.prg,exitcode,133000000
+../c128/z80/zex128/,cpi1.prg,exitcode,134000000
+../c128/z80/zex128/,daaop.prg,exitcode,558000000
+../c128/z80/zex128/,inca.prg,exitcode,37000000
+../c128/z80/zex128/,incb.prg,exitcode,37000000
+../c128/z80/zex128/,incbc.prg,exitcode,23000000
+../c128/z80/zex128/,incc.prg,exitcode,37000000
+../c128/z80/zex128/,incd.prg,exitcode,37000000
+../c128/z80/zex128/,incde.prg,exitcode,23000000
+../c128/z80/zex128/,ince.prg,exitcode,37000000
+../c128/z80/zex128/,inch.prg,exitcode,37000000
+../c128/z80/zex128/,inchl.prg,exitcode,23000000
+../c128/z80/zex128/,incix.prg,exitcode,23000000
+../c128/z80/zex128/,inciy.prg,exitcode,23000000
+../c128/z80/zex128/,incl.prg,exitcode,37000000
+../c128/z80/zex128/,incm.prg,exitcode,37000000
+../c128/z80/zex128/,incsp.prg,exitcode,23000000
+../c128/z80/zex128/,incx.prg,exitcode,70000000
+../c128/z80/zex128/,incxh.prg,exitcode,37000000
+../c128/z80/zex128/,incxl.prg,exitcode,37000000
+../c128/z80/zex128/,incyh.prg,exitcode,37000000
+../c128/z80/zex128/,incyl.prg,exitcode,37000000
+../c128/z80/zex128/,ld161.prg,exitcode,8000000
+../c128/z80/zex128/,ld162.prg,exitcode,7000000
+../c128/z80/zex128/,ld163.prg,exitcode,7000000
+../c128/z80/zex128/,ld164.prg,exitcode,7000000
+../c128/z80/zex128/,ld165.prg,exitcode,7000000
+../c128/z80/zex128/,ld166.prg,exitcode,7000000
+../c128/z80/zex128/,ld167.prg,exitcode,7000000
+../c128/z80/zex128/,ld168.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im.prg,exitcode,7000000
+../c128/z80/zex128/,ld16ix.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx.prg,exitcode,107000000
+../c128/z80/zex128/,lda.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2.prg,exitcode,7000000
+../c128/z80/zex128/,negop.prg,exitcode,135000000
+../c128/z80/zex128/,rldop.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080.prg,exitcode,67000000
+../c128/z80/zex128/,rotxy.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80.prg,exitcode,104000000
+../c128/z80/zex128/,srz80.prg,exitcode,106000000
+../c128/z80/zex128/,srzx.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2.prg,exitcode,10000000
+../c128/z80/zex128/,st8ix3.prg,exitcode,7000000
+../c128/z80/zex128/,stabd.prg,exitcode,7000000
+../c128/z80/zex128/,adc16-all.prg,exitcode,1236000000
+../c128/z80/zex128/,add16-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16x-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16y-all.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i-all.prg,exitcode,299000000
+../c128/z80/zex128/,alu8r-all.prg,exitcode,10662000000
+../c128/z80/zex128/,alu8rx-all.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x-all.prg,exitcode,2651000000
+../c128/z80/zex128/,bitx-all.prg,exitcode,28000000
+../c128/z80/zex128/,bitz80-all.prg,exitcode,694000000
+../c128/z80/zex128/,cpd1-all.prg,exitcode,134000000
+../c128/z80/zex128/,cpi1-all.prg,exitcode,134000000
+../c128/z80/zex128/,daaop-all.prg,exitcode,558000000
+../c128/z80/zex128/,inca-all.prg,exitcode,37000000
+../c128/z80/zex128/,incb-all.prg,exitcode,37000000
+../c128/z80/zex128/,incbc-all.prg,exitcode,23000000
+../c128/z80/zex128/,incc-all.prg,exitcode,37000000
+../c128/z80/zex128/,incd-all.prg,exitcode,38000000
+../c128/z80/zex128/,incde-all.prg,exitcode,23000000
+../c128/z80/zex128/,ince-all.prg,exitcode,37000000
+../c128/z80/zex128/,inch-all.prg,exitcode,37000000
+../c128/z80/zex128/,inchl-all.prg,exitcode,23000000
+../c128/z80/zex128/,incix-all.prg,exitcode,23000000
+../c128/z80/zex128/,inciy-all.prg,exitcode,23000000
+../c128/z80/zex128/,incl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incm-all.prg,exitcode,37000000
+../c128/z80/zex128/,incsp-all.prg,exitcode,23000000
+../c128/z80/zex128/,incx-all.prg,exitcode,70000000
+../c128/z80/zex128/,incxh-all.prg,exitcode,37000000
+../c128/z80/zex128/,incxl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incyh-all.prg,exitcode,38000000
+../c128/z80/zex128/,incyl-all.prg,exitcode,37000000
+../c128/z80/zex128/,ld161-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld162-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld163-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld164-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld165-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld166-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld167-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld168-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld16ix-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1-all.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2-all.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr-all.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx-all.prg,exitcode,108000000
+../c128/z80/zex128/,lda-all.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2-all.prg,exitcode,7000000
+../c128/z80/zex128/,negop-all.prg,exitcode,136000000
+../c128/z80/zex128/,rldop-all.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080-all.prg,exitcode,68000000
+../c128/z80/zex128/,rotxy-all.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srzx-all.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1-all.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2-all.prg,exitcode,11000000
+../c128/z80/zex128/,st8ix3-all.prg,exitcode,7000000
+../c128/z80/zex128/,stabd-all.prg,exitcode,8000000
+################################################################################
# VDC
################################################################################
# TODO: make all these automatic
Modified: testprogs/testbench/z64kc128-testlist.txt
===================================================================
--- testprogs/testbench/z64kc128-testlist.txt 2024-04-29 03:36:04 UTC (rev 45140)
+++ testprogs/testbench/z64kc128-testlist.txt 2024-04-29 03:36:52 UTC (rev 45141)
@@ -154,6 +154,144 @@
../c128/z80/outi/,tstouti2.prg,exitcode,7000000
../c128/z80/mmu_zp_sp/,tstz80bk.prg,exitcode,7000000
################################################################################
+# Z80
+################################################################################
+../c128/z80/zex128/,prelim.prg,exitcode,13000000
+../c128/z80/zex128/,adc16.prg,exitcode,1235000000
+../c128/z80/zex128/,add16.prg,exitcode,619000000
+../c128/z80/zex128/,add16x.prg,exitcode,619000000
+../c128/z80/zex128/,add16y.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i.prg,exitcode,298000000
+../c128/z80/zex128/,alu8r.prg,exitcode,10661000000
+../c128/z80/zex128/,alu8rx.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x.prg,exitcode,2650000000
+../c128/z80/zex128/,bitx.prg,exitcode,27000000
+../c128/z80/zex128/,bitz80.prg,exitcode,693000000
+../c128/z80/zex128/,cpd1.prg,exitcode,133000000
+../c128/z80/zex128/,cpi1.prg,exitcode,134000000
+../c128/z80/zex128/,daaop.prg,exitcode,558000000
+../c128/z80/zex128/,inca.prg,exitcode,37000000
+../c128/z80/zex128/,incb.prg,exitcode,37000000
+../c128/z80/zex128/,incbc.prg,exitcode,23000000
+../c128/z80/zex128/,incc.prg,exitcode,37000000
+../c128/z80/zex128/,incd.prg,exitcode,37000000
+../c128/z80/zex128/,incde.prg,exitcode,23000000
+../c128/z80/zex128/,ince.prg,exitcode,37000000
+../c128/z80/zex128/,inch.prg,exitcode,37000000
+../c128/z80/zex128/,inchl.prg,exitcode,23000000
+../c128/z80/zex128/,incix.prg,exitcode,23000000
+../c128/z80/zex128/,inciy.prg,exitcode,23000000
+../c128/z80/zex128/,incl.prg,exitcode,37000000
+../c128/z80/zex128/,incm.prg,exitcode,37000000
+../c128/z80/zex128/,incsp.prg,exitcode,23000000
+../c128/z80/zex128/,incx.prg,exitcode,70000000
+../c128/z80/zex128/,incxh.prg,exitcode,37000000
+../c128/z80/zex128/,incxl.prg,exitcode,37000000
+../c128/z80/zex128/,incyh.prg,exitcode,37000000
+../c128/z80/zex128/,incyl.prg,exitcode,37000000
+../c128/z80/zex128/,ld161.prg,exitcode,8000000
+../c128/z80/zex128/,ld162.prg,exitcode,7000000
+../c128/z80/zex128/,ld163.prg,exitcode,7000000
+../c128/z80/zex128/,ld164.prg,exitcode,7000000
+../c128/z80/zex128/,ld165.prg,exitcode,7000000
+../c128/z80/zex128/,ld166.prg,exitcode,7000000
+../c128/z80/zex128/,ld167.prg,exitcode,7000000
+../c128/z80/zex128/,ld168.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im.prg,exitcode,7000000
+../c128/z80/zex128/,ld16ix.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx.prg,exitcode,107000000
+../c128/z80/zex128/,lda.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2.prg,exitcode,7000000
+../c128/z80/zex128/,negop.prg,exitcode,135000000
+../c128/z80/zex128/,rldop.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080.prg,exitcode,67000000
+../c128/z80/zex128/,rotxy.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80.prg,exitcode,104000000
+../c128/z80/zex128/,srz80.prg,exitcode,106000000
+../c128/z80/zex128/,srzx.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2.prg,exitcode,10000000
+../c128/z80/zex128/,st8ix3.prg,exitcode,7000000
+../c128/z80/zex128/,stabd.prg,exitcode,7000000
+../c128/z80/zex128/,adc16-all.prg,exitcode,1236000000
+../c128/z80/zex128/,add16-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16x-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16y-all.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i-all.prg,exitcode,299000000
+../c128/z80/zex128/,alu8r-all.prg,exitcode,10662000000
+../c128/z80/zex128/,alu8rx-all.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x-all.prg,exitcode,2651000000
+../c128/z80/zex128/,bitx-all.prg,exitcode,28000000
+../c128/z80/zex128/,bitz80-all.prg,exitcode,694000000
+../c128/z80/zex128/,cpd1-all.prg,exitcode,134000000
+../c128/z80/zex128/,cpi1-all.prg,exitcode,134000000
+../c128/z80/zex128/,daaop-all.prg,exitcode,558000000
+../c128/z80/zex128/,inca-all.prg,exitcode,37000000
+../c128/z80/zex128/,incb-all.prg,exitcode,37000000
+../c128/z80/zex128/,incbc-all.prg,exitcode,23000000
+../c128/z80/zex128/,incc-all.prg,exitcode,37000000
+../c128/z80/zex128/,incd-all.prg,exitcode,38000000
+../c128/z80/zex128/,incde-all.prg,exitcode,23000000
+../c128/z80/zex128/,ince-all.prg,exitcode,37000000
+../c128/z80/zex128/,inch-all.prg,exitcode,37000000
+../c128/z80/zex128/,inchl-all.prg,exitcode,23000000
+../c128/z80/zex128/,incix-all.prg,exitcode,23000000
+../c128/z80/zex128/,inciy-all.prg,exitcode,23000000
+../c128/z80/zex128/,incl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incm-all.prg,exitcode,37000000
+../c128/z80/zex128/,incsp-all.prg,exitcode,23000000
+../c128/z80/zex128/,incx-all.prg,exitcode,70000000
+../c128/z80/zex128/,incxh-all.prg,exitcode,37000000
+../c128/z80/zex128/,incxl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incyh-all.prg,exitcode,38000000
+../c128/z80/zex128/,incyl-all.prg,exitcode,37000000
+../c128/z80/zex128/,ld161-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld162-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld163-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld164-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld165-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld166-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld167-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld168-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld16ix-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1-all.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2-all.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr-all.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx-all.prg,exitcode,108000000
+../c128/z80/zex128/,lda-all.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2-all.prg,exitcode,7000000
+../c128/z80/zex128/,negop-all.prg,exitcode,136000000
+../c128/z80/zex128/,rldop-all.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080-all.prg,exitcode,68000000
+../c128/z80/zex128/,rotxy-all.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srzx-all.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1-all.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2-all.prg,exitcode,11000000
+../c128/z80/zex128/,st8ix3-all.prg,exitcode,7000000
+../c128/z80/zex128/,stabd-all.prg,exitcode,8000000
+################################################################################
# VDC
################################################################################
# TODO: make all these automatic
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <old...@us...> - 2024-04-29 03:36:06
|
Revision: 45140
http://sourceforge.net/p/vice-emu/code/45140
Author: oldwoman37
Date: 2024-04-29 03:36:04 +0000 (Mon, 29 Apr 2024)
Log Message:
-----------
Added testlist to zex128
Modified Paths:
--------------
testprogs/c128/z80/zex128/Makefile
testprogs/c128/z80/zex128/start.asm
Added Paths:
-----------
testprogs/c128/z80/zex128/testlist.txt
Modified: testprogs/c128/z80/zex128/Makefile
===================================================================
--- testprogs/c128/z80/zex128/Makefile 2024-04-29 03:31:11 UTC (rev 45139)
+++ testprogs/c128/z80/zex128/Makefile 2024-04-29 03:36:04 UTC (rev 45140)
@@ -3,7 +3,7 @@
PRIPROGS = prelim.prg
-ZEXPROGS = \
+ZEXDOCPROGS = \
adc16.prg \
add16.prg \
add16x.prg \
@@ -70,7 +70,9 @@
st8ix1.prg \
st8ix2.prg \
st8ix3.prg \
- stabd.prg \
+ stabd.prg
+
+ZEXALLPROGS = \
adc16-all.prg \
add16-all.prg \
add16x-all.prg \
@@ -139,11 +141,11 @@
st8ix3-all.prg \
stabd-all.prg
-PROGS = $(PRIPROGS) $(ZEXPROGS)
+PROGS = $(PRIPROGS) $(ZEXDOCPROGS) $(ZEXALLPROGS)
all: $(PROGS) zex128.d81
-prelim.prg: prelim.z80
+prelim.prg: prelim.z80 start.asm
xa -bt `expr $(LA) - 2` -M -O PETSCII -DNAME=\"prelim\" -DNEXT=\"`echo $(basename $(PROGS)) - | awk -v NAME=prelim '{for(i=1;i<=NF;i++) if ($$i==NAME) print $$(i+1);}'`\" -o prelim.prga start.asm
(echo " org 0500h"; cat prelim.z80) | z80asm -i - -o prelim.prgb
cat prelim.prga prelim.prgb > prelim.prg
Modified: testprogs/c128/z80/zex128/start.asm
===================================================================
--- testprogs/c128/z80/zex128/start.asm 2024-04-29 03:31:11 UTC (rev 45139)
+++ testprogs/c128/z80/zex128/start.asm 2024-04-29 03:36:04 UTC (rev 45140)
@@ -152,6 +152,7 @@
next
sta $d020
stx $d7ff
+; bne * ; uncomment if you want testing to stop on failure
; load next module
Added: testprogs/c128/z80/zex128/testlist.txt
===================================================================
--- testprogs/c128/z80/zex128/testlist.txt (rev 0)
+++ testprogs/c128/z80/zex128/testlist.txt 2024-04-29 03:36:04 UTC (rev 45140)
@@ -0,0 +1,135 @@
+../c128/z80/zex128/,prelim.prg,exitcode,13000000
+../c128/z80/zex128/,adc16.prg,exitcode,1235000000
+../c128/z80/zex128/,add16.prg,exitcode,619000000
+../c128/z80/zex128/,add16x.prg,exitcode,619000000
+../c128/z80/zex128/,add16y.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i.prg,exitcode,298000000
+../c128/z80/zex128/,alu8r.prg,exitcode,10661000000
+../c128/z80/zex128/,alu8rx.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x.prg,exitcode,2650000000
+../c128/z80/zex128/,bitx.prg,exitcode,27000000
+../c128/z80/zex128/,bitz80.prg,exitcode,693000000
+../c128/z80/zex128/,cpd1.prg,exitcode,133000000
+../c128/z80/zex128/,cpi1.prg,exitcode,134000000
+../c128/z80/zex128/,daaop.prg,exitcode,558000000
+../c128/z80/zex128/,inca.prg,exitcode,37000000
+../c128/z80/zex128/,incb.prg,exitcode,37000000
+../c128/z80/zex128/,incbc.prg,exitcode,23000000
+../c128/z80/zex128/,incc.prg,exitcode,37000000
+../c128/z80/zex128/,incd.prg,exitcode,37000000
+../c128/z80/zex128/,incde.prg,exitcode,23000000
+../c128/z80/zex128/,ince.prg,exitcode,37000000
+../c128/z80/zex128/,inch.prg,exitcode,37000000
+../c128/z80/zex128/,inchl.prg,exitcode,23000000
+../c128/z80/zex128/,incix.prg,exitcode,23000000
+../c128/z80/zex128/,inciy.prg,exitcode,23000000
+../c128/z80/zex128/,incl.prg,exitcode,37000000
+../c128/z80/zex128/,incm.prg,exitcode,37000000
+../c128/z80/zex128/,incsp.prg,exitcode,23000000
+../c128/z80/zex128/,incx.prg,exitcode,70000000
+../c128/z80/zex128/,incxh.prg,exitcode,37000000
+../c128/z80/zex128/,incxl.prg,exitcode,37000000
+../c128/z80/zex128/,incyh.prg,exitcode,37000000
+../c128/z80/zex128/,incyl.prg,exitcode,37000000
+../c128/z80/zex128/,ld161.prg,exitcode,8000000
+../c128/z80/zex128/,ld162.prg,exitcode,7000000
+../c128/z80/zex128/,ld163.prg,exitcode,7000000
+../c128/z80/zex128/,ld164.prg,exitcode,7000000
+../c128/z80/zex128/,ld165.prg,exitcode,7000000
+../c128/z80/zex128/,ld166.prg,exitcode,7000000
+../c128/z80/zex128/,ld167.prg,exitcode,7000000
+../c128/z80/zex128/,ld168.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im.prg,exitcode,7000000
+../c128/z80/zex128/,ld16ix.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx.prg,exitcode,107000000
+../c128/z80/zex128/,lda.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2.prg,exitcode,7000000
+../c128/z80/zex128/,negop.prg,exitcode,135000000
+../c128/z80/zex128/,rldop.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080.prg,exitcode,67000000
+../c128/z80/zex128/,rotxy.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80.prg,exitcode,104000000
+../c128/z80/zex128/,srz80.prg,exitcode,106000000
+../c128/z80/zex128/,srzx.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2.prg,exitcode,10000000
+../c128/z80/zex128/,st8ix3.prg,exitcode,7000000
+../c128/z80/zex128/,stabd.prg,exitcode,7000000
+../c128/z80/zex128/,adc16-all.prg,exitcode,1236000000
+../c128/z80/zex128/,add16-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16x-all.prg,exitcode,619000000
+../c128/z80/zex128/,add16y-all.prg,exitcode,619000000
+../c128/z80/zex128/,alu8i-all.prg,exitcode,299000000
+../c128/z80/zex128/,alu8r-all.prg,exitcode,10662000000
+../c128/z80/zex128/,alu8rx-all.prg,exitcode,5434000000
+../c128/z80/zex128/,alu8x-all.prg,exitcode,2651000000
+../c128/z80/zex128/,bitx-all.prg,exitcode,28000000
+../c128/z80/zex128/,bitz80-all.prg,exitcode,694000000
+../c128/z80/zex128/,cpd1-all.prg,exitcode,134000000
+../c128/z80/zex128/,cpi1-all.prg,exitcode,134000000
+../c128/z80/zex128/,daaop-all.prg,exitcode,558000000
+../c128/z80/zex128/,inca-all.prg,exitcode,37000000
+../c128/z80/zex128/,incb-all.prg,exitcode,37000000
+../c128/z80/zex128/,incbc-all.prg,exitcode,23000000
+../c128/z80/zex128/,incc-all.prg,exitcode,37000000
+../c128/z80/zex128/,incd-all.prg,exitcode,38000000
+../c128/z80/zex128/,incde-all.prg,exitcode,23000000
+../c128/z80/zex128/,ince-all.prg,exitcode,37000000
+../c128/z80/zex128/,inch-all.prg,exitcode,37000000
+../c128/z80/zex128/,inchl-all.prg,exitcode,23000000
+../c128/z80/zex128/,incix-all.prg,exitcode,23000000
+../c128/z80/zex128/,inciy-all.prg,exitcode,23000000
+../c128/z80/zex128/,incl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incm-all.prg,exitcode,37000000
+../c128/z80/zex128/,incsp-all.prg,exitcode,23000000
+../c128/z80/zex128/,incx-all.prg,exitcode,70000000
+../c128/z80/zex128/,incxh-all.prg,exitcode,37000000
+../c128/z80/zex128/,incxl-all.prg,exitcode,37000000
+../c128/z80/zex128/,incyh-all.prg,exitcode,38000000
+../c128/z80/zex128/,incyl-all.prg,exitcode,37000000
+../c128/z80/zex128/,ld161-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld162-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld163-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld164-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld165-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld166-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld167-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld168-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld16im-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld16ix-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8bd-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8im-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8imx-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8ix1-all.prg,exitcode,12000000
+../c128/z80/zex128/,ld8ix2-all.prg,exitcode,9000000
+../c128/z80/zex128/,ld8ix3-all.prg,exitcode,8000000
+../c128/z80/zex128/,ld8ixy-all.prg,exitcode,7000000
+../c128/z80/zex128/,ld8rr-all.prg,exitcode,55000000
+../c128/z80/zex128/,ld8rrx-all.prg,exitcode,108000000
+../c128/z80/zex128/,lda-all.prg,exitcode,8000000
+../c128/z80/zex128/,ldd1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldd2-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi1-all.prg,exitcode,7000000
+../c128/z80/zex128/,ldi2-all.prg,exitcode,7000000
+../c128/z80/zex128/,negop-all.prg,exitcode,136000000
+../c128/z80/zex128/,rldop-all.prg,exitcode,79000000
+../c128/z80/zex128/,rot8080-all.prg,exitcode,68000000
+../c128/z80/zex128/,rotxy-all.prg,exitcode,12000000
+../c128/z80/zex128/,rotz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srz80-all.prg,exitcode,105000000
+../c128/z80/zex128/,srzx-all.prg,exitcode,12000000
+../c128/z80/zex128/,st8ix1-all.prg,exitcode,19000000
+../c128/z80/zex128/,st8ix2-all.prg,exitcode,11000000
+../c128/z80/zex128/,st8ix3-all.prg,exitcode,7000000
+../c128/z80/zex128/,stabd-all.prg,exitcode,8000000
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <old...@us...> - 2024-04-29 03:31:13
|
Revision: 45139
http://sourceforge.net/p/vice-emu/code/45139
Author: oldwoman37
Date: 2024-04-29 03:31:11 +0000 (Mon, 29 Apr 2024)
Log Message:
-----------
Fixed minor Z80 bug and added cycle limit for Z80 CPU
Modified Paths:
--------------
trunk/vice/src/z80core.c
Modified: trunk/vice/src/z80core.c
===================================================================
--- trunk/vice/src/z80core.c 2024-04-25 16:58:57 UTC (rev 45138)
+++ trunk/vice/src/z80core.c 2024-04-29 03:31:11 UTC (rev 45139)
@@ -923,7 +923,7 @@
LOCAL_SET_HALFCARRY(1); \
LOCAL_SET_ZERO(!tmp); \
LOCAL_SET_PARITY(!tmp); \
- reg_f = (reg_f & !(S_FLAG | U35_FLAG)) | (tmp & S_FLAG) | ((reg_wz >> 8) & U35_FLAG); \
+ reg_f = (reg_f & ~(S_FLAG | U35_FLAG)) | (tmp & S_FLAG) | ((reg_wz >> 8) & U35_FLAG); \
CLK_ADD(CLK, clk_inc2); \
INC_PC(pc_inc); \
} while (0)
@@ -5020,6 +5020,12 @@
cpu_int_status->num_dma_per_opcode = 0;
inst_mode = INST_NONE;
+
+ if (maincpu_clk_limit && (CLK > maincpu_clk_limit)) {
+ log_error(LOG_DEFAULT, "cycle limit reached.");
+ archdep_vice_exit(1);
+ }
+
} while (Z80_LOOP_COND);
export_registers();
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <old...@us...> - 2024-04-25 16:59:02
|
Revision: 45138
http://sourceforge.net/p/vice-emu/code/45138
Author: oldwoman37
Date: 2024-04-25 16:58:57 +0000 (Thu, 25 Apr 2024)
Log Message:
-----------
More changes for bug #1979: Corrected more z80 timing issues, and added WZ reg for improved bit 3 and 5 status register results. x128 Z80 now passes ZEXALL.
Modified Paths:
--------------
trunk/vice/src/c128/z80.c
trunk/vice/src/z80core.c
Modified: trunk/vice/src/c128/z80.c
===================================================================
--- trunk/vice/src/c128/z80.c 2024-04-24 23:35:14 UTC (rev 45137)
+++ trunk/vice/src/c128/z80.c 2024-04-25 16:58:57 UTC (rev 45138)
@@ -83,6 +83,7 @@
z80_reg_pc = (addr); \
z80_bank_base = z80mem_read_base(z80_reg_pc); \
z80_bank_limit = z80mem_read_limit(z80_reg_pc); \
+ reg_wz = addr; \
} while (0)
#define LOAD(addr) ((uint32_t)(*_z80mem_read_tab_ptr[(addr) >> 8])((uint16_t)(addr)))
Modified: trunk/vice/src/z80core.c
===================================================================
--- trunk/vice/src/z80core.c 2024-04-24 23:35:14 UTC (rev 45137)
+++ trunk/vice/src/z80core.c 2024-04-25 16:58:57 UTC (rev 45138)
@@ -67,6 +67,19 @@
static uint8_t halt = 0;
+/* See: https://gist.github.com/drhelius/8497817
+ for proper implementation of the BIT flags.
+ Called either memptr or WZ (reg_wz) */
+static uint16_t reg_wz = 0;
+
+enum INST_MODE_s {
+ INST_NONE,
+ INST_IX,
+ INST_IY
+};
+typedef enum INST_MODE_s INST_MODE_t;
+static INST_MODE_t inst_mode = INST_NONE;
+
static void z80core_reset(void)
{
z80_reg_pc = 0;
@@ -137,8 +150,22 @@
#define IX_WORD() ((reg_ixh << 8) | reg_ixl)
#define IY_WORD() ((reg_iyh << 8) | reg_iyl)
+/* reg_wz needs to be set whenever IX+d or XY+d is used; can't use a macro */
+static inline uint16_t IX_WORD_OFF(int8_t offset)
+{
+ reg_wz = IX_WORD() + (signed char)(offset);
+ return reg_wz;
+}
+
+static inline uint16_t IY_WORD_OFF(int8_t offset)
+{
+ reg_wz = IY_WORD() + (signed char)(offset);
+ return reg_wz;
+}
+#if 0
#define IX_WORD_OFF(offset) (IX_WORD() + (signed char)(offset))
#define IY_WORD_OFF(offset) (IY_WORD() + (signed char)(offset))
+#endif
#define DEC_BC_WORD() \
do { \
@@ -233,6 +260,8 @@
#define Z_FLAG 0x40
#define S_FLAG 0x80
+#define U35_FLAG (U3_FLAG | U5_FLAG)
+
#define LOCAL_SET_CARRY(val) \
do { \
if (val) { \
@@ -294,6 +323,7 @@
#define LOCAL_ZERO() (reg_f & Z_FLAG)
#define LOCAL_SIGN() (reg_f & S_FLAG)
+#if 0
static const uint8_t SZP[256] = {
P_FLAG | Z_FLAG, 0, 0, P_FLAG,
0, P_FLAG, P_FLAG, 0,
@@ -360,6 +390,265 @@
S_FLAG, S_FLAG | P_FLAG, S_FLAG | P_FLAG, S_FLAG,
S_FLAG | P_FLAG, S_FLAG, S_FLAG, S_FLAG | P_FLAG
};
+#endif
+static const uint8_t SZP[256] = {
+ P_FLAG | Z_FLAG,
+ 0,
+ 0,
+ P_FLAG,
+ 0,
+ P_FLAG,
+ P_FLAG,
+ 0,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ 0,
+ P_FLAG,
+ P_FLAG,
+ 0,
+ P_FLAG,
+ 0,
+ 0,
+ P_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ 0,
+ P_FLAG,
+ P_FLAG,
+ 0,
+ P_FLAG,
+ 0,
+ 0,
+ P_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ P_FLAG,
+ 0,
+ 0,
+ P_FLAG,
+ 0,
+ P_FLAG,
+ P_FLAG,
+ 0,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ U3_FLAG,
+ U3_FLAG,
+ U3_FLAG | P_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG,
+ U5_FLAG,
+ U5_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ S_FLAG,
+ S_FLAG,
+ S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG | P_FLAG,
+ U3_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG,
+ U5_FLAG | U3_FLAG | S_FLAG | P_FLAG,
+};
/* ------------------------------------------------------------------------- */
@@ -523,6 +812,7 @@
LOCAL_SET_PARITY((~(reg_h ^ reg_valh)) & (reg_valh ^ (tmp >> 8)) & 0x80); \
reg_h = (uint8_t)(tmp >> 8); \
reg_l = (uint8_t)(tmp & 0xff); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_h & U35_FLAG); \
CLK_ADD(CLK, 15); \
INC_PC(2); \
} while (0)
@@ -533,6 +823,8 @@
\
carry = LOCAL_CARRY(); \
tmp = (uint32_t)((reg_h << 8) + reg_l) + (uint32_t)(reg_sp) + carry; \
+ reg_wz = HL_WORD(); \
+ reg_wz++; \
LOCAL_SET_ZERO(!(tmp & 0xffff)); \
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_SIGN(tmp & 0x8000); \
@@ -541,6 +833,7 @@
LOCAL_SET_PARITY((~(reg_h ^ (reg_sp >> 8))) & ((reg_sp >> 8) ^ (tmp >> 8)) & 0x80); \
reg_h = (uint8_t)(tmp >> 8); \
reg_l = (uint8_t)(tmp & 0xff); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_h & U35_FLAG); \
CLK_ADD(CLK, 15); \
INC_PC(2); \
} while (0)
@@ -569,8 +862,11 @@
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_CARRY(tmp & 0x10000); \
LOCAL_SET_HALFCARRY(((tmp >> 8) ^ reg_valh ^ reg_dsth) & H_FLAG); \
+ reg_wz = (reg_dsth << 8) | reg_dstl; \
+ reg_wz++; \
reg_dsth = (uint8_t)(tmp >> 8); \
reg_dstl = (uint8_t)(tmp & 0xff); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_dsth & U35_FLAG); \
CLK_ADD(CLK, clk_inc); \
INC_PC(pc_inc); \
} while (0)
@@ -583,8 +879,11 @@
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_CARRY(tmp & 0x10000); \
LOCAL_SET_HALFCARRY(((tmp >> 8) ^ (reg_sp >> 8) ^ reg_dsth) & H_FLAG); \
+ reg_wz = (reg_dsth << 8) | reg_dstl; \
+ reg_wz++; \
reg_dsth = (uint8_t)(tmp >> 8); \
reg_dstl = (uint8_t)(tmp & 0xff); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_dsth & U35_FLAG); \
CLK_ADD(CLK, clk_inc); \
INC_PC(pc_inc); \
} while (0)
@@ -599,16 +898,36 @@
INC_PC(pc_inc); \
} while (0)
+/* reg_wz is used here to determine F5 and F3 */
#define BIT(reg_val, value, clk_inc1, clk_inc2, pc_inc) \
do { \
+ uint8_t tmp; \
CLK_ADD(CLK, clk_inc1); \
+ tmp = (reg_val) & (1 << value); \
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_HALFCARRY(1); \
- LOCAL_SET_ZERO(!((reg_val) & (1 << value))); \
+ LOCAL_SET_ZERO(!tmp); \
+ LOCAL_SET_PARITY(!tmp); \
+ reg_f = (reg_f & ~(S_FLAG | U35_FLAG)) | (tmp & S_FLAG) | (reg_val & U35_FLAG); \
CLK_ADD(CLK, clk_inc2); \
INC_PC(pc_inc); \
} while (0)
+/* reg_wz is used here to determine F5 and F3 */
+#define BIT16(reg_val, value, clk_inc1, clk_inc2, pc_inc) \
+ do { \
+ uint8_t tmp; \
+ CLK_ADD(CLK, clk_inc1); \
+ tmp = (reg_val) & (1 << value); \
+ LOCAL_SET_NADDSUB(0); \
+ LOCAL_SET_HALFCARRY(1); \
+ LOCAL_SET_ZERO(!tmp); \
+ LOCAL_SET_PARITY(!tmp); \
+ reg_f = (reg_f & !(S_FLAG | U35_FLAG)) | (tmp & S_FLAG) | ((reg_wz >> 8) & U35_FLAG); \
+ CLK_ADD(CLK, clk_inc2); \
+ INC_PC(pc_inc); \
+ } while (0)
+
#define BRANCH(cond, value, pc_inc) \
do { \
if (cond) { \
@@ -646,15 +965,21 @@
} \
} while (0)
+/* note that bits 5 and 3 are set based on previous flag and A */
+/* this passes zexall, but see:
+ https://github.com/hoglet67/Z80Decoder/wiki/Undocumented-Flags#scfccf
+*/
#define CCF(clk_inc, pc_inc) \
do { \
LOCAL_SET_HALFCARRY((LOCAL_CARRY())); \
LOCAL_SET_CARRY(!(LOCAL_CARRY())); \
LOCAL_SET_NADDSUB(0); \
+ reg_f = reg_f | (reg_a & U35_FLAG); \
CLK_ADD(CLK, clk_inc); \
INC_PC(pc_inc); \
} while (0)
+/* Bits 3 and 5 of flag based on passed value */
#define CP(loadval, clk_inc1, clk_inc2, pc_inc) \
do { \
uint8_t tmp, value; \
@@ -666,14 +991,16 @@
LOCAL_SET_CARRY(value > reg_a); \
LOCAL_SET_HALFCARRY((reg_a ^ value ^ tmp) & H_FLAG); \
LOCAL_SET_PARITY((reg_a ^ value) & (reg_a ^ tmp) & 0x80); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (value & U35_FLAG); \
CLK_ADD(CLK, clk_inc2); \
INC_PC(pc_inc); \
} while (0)
-#define CPDI(HL_FUNC) \
+#define CPDI(HL_FUNC,WZ_FUNC) \
do { \
uint8_t val, tmp; \
\
+ WZ_FUNC; \
CLK_ADD(CLK, 4); \
val = LOAD(HL_WORD()); \
tmp = reg_a - val; \
@@ -682,6 +1009,8 @@
reg_f = N_FLAG | SZP[tmp] | LOCAL_CARRY(); \
LOCAL_SET_HALFCARRY((reg_a ^ val ^ tmp) & H_FLAG); \
LOCAL_SET_PARITY(reg_b | reg_c); \
+ tmp = tmp - (LOCAL_HALFCARRY() ? 1 : 0); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (tmp & U3_FLAG) | ((tmp << 4) & U5_FLAG); \
CLK_ADD(CLK, 12); \
INC_PC(2); \
} while (0)
@@ -696,10 +1025,13 @@
HL_FUNC; \
DEC_BC_WORD(); \
CLK_ADD(CLK, 12); \
+ reg_wz = z80_reg_pc + 1; \
if (!(BC_WORD() && tmp)) { \
reg_f = N_FLAG | SZP[tmp] | LOCAL_CARRY(); \
LOCAL_SET_HALFCARRY((reg_a ^ val ^ tmp) & H_FLAG); \
LOCAL_SET_PARITY(reg_b | reg_c); \
+ tmp = tmp - (LOCAL_HALFCARRY() ? 1 : 0); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (tmp & U3_FLAG) | ((tmp << 4) & U5_FLAG); \
INC_PC(2); \
} else { \
CLK_ADD(CLK, 5); \
@@ -711,6 +1043,7 @@
reg_a ^= 0xff; \
LOCAL_SET_NADDSUB(1); \
LOCAL_SET_HALFCARRY(1); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_a & U35_FLAG); \
CLK_ADD(CLK, clk_inc); \
INC_PC(pc_inc); \
} while (0)
@@ -861,6 +1194,7 @@
reg_valh = LOAD(reg_sp + 1); \
CLK_ADD(CLK, clk_inc2); \
reg_vall = LOAD(reg_sp); \
+ reg_wz = (reg_valh << 8) | reg_vall; \
CLK_ADD(CLK, clk_inc3); \
STORE((reg_sp + 1), tmph); \
CLK_ADD(CLK, clk_inc4); \
@@ -886,9 +1220,12 @@
#define INA(value, clk_inc1, clk_inc2, pc_inc) \
do { \
+ uint16_t tmp; \
CLK_ADD(CLK, clk_inc1); \
- reg_a = IN((reg_a << 8) | value); \
+ tmp = (reg_a << 8) | value; \
+ reg_a = IN(tmp); \
CLK_ADD(CLK, clk_inc2); \
+ reg_wz = tmp + 1; \
INC_PC(pc_inc); \
} while (0)
@@ -900,6 +1237,7 @@
reg_val = IN(BC_WORD()); \
reg_f = SZP[reg_val & 0xffu] | LOCAL_CARRY(); \
CLK_ADD(CLK, (clk_inc2 - tmp) ); \
+ reg_wz = BC_WORD() + 1; \
INC_PC(pc_inc); \
} while (0)
#else
@@ -909,6 +1247,7 @@
reg_val = IN(BC_WORD()); \
reg_f = SZP[reg_val & 0xffu] | LOCAL_CARRY(); \
CLK_ADD(CLK, clk_inc2); \
+ reg_wz = BC_WORD() + 1; \
INC_PC(pc_inc); \
} while (0)
#endif
@@ -920,6 +1259,7 @@
tmp = IN(BC_WORD()); \
reg_f = SZP[tmp] | LOCAL_CARRY(); \
CLK_ADD(CLK, clk_inc2); \
+ reg_wz = BC_WORD() + 1; \
INC_PC(pc_inc); \
} while (0)
@@ -958,6 +1298,7 @@
CLK_ADD(CLK, 4); \
STORE(HL_WORD(), tmp); \
HL_FUNC; \
+ reg_wz = BC_WORD() + 1; \
reg_b--; \
reg_f = N_FLAG; \
LOCAL_SET_ZERO(!reg_b); \
@@ -975,11 +1316,13 @@
STORE(HL_WORD(), tmp); \
HL_FUNC; \
reg_b--; \
+ reg_wz = z80_reg_pc + 1; \
if (!reg_b) { \
CLK_ADD(CLK, 4); \
reg_f = N_FLAG | Z_FLAG; \
INC_PC(2); \
} else { \
+ CLK_ADD(CLK, 9); \
reg_f = N_FLAG; \
} \
CLK_ADD(CLK, 4); \
@@ -1025,6 +1368,8 @@
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_PARITY(reg_b | reg_c); \
LOCAL_SET_HALFCARRY(0); \
+ tmp = tmp + reg_a; \
+ reg_f = (reg_f & ~(U35_FLAG)) | (tmp & U3_FLAG) | ((tmp << 4) & U5_FLAG); \
CLK_ADD(CLK, 8); \
INC_PC(2); \
} while (0)
@@ -1041,10 +1386,13 @@
DE_FUNC; \
HL_FUNC; \
CLK_ADD(CLK, 8); \
+ reg_wz = z80_reg_pc + 1; \
if (!(BC_WORD())) { \
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_PARITY(0); \
LOCAL_SET_HALFCARRY(0); \
+ tmp = tmp + reg_a; \
+ reg_f = (reg_f & ~(U35_FLAG)) | (tmp & U3_FLAG) | ((tmp << 4) & U5_FLAG); \
INC_PC(2); \
} else { \
CLK_ADD(CLK, 5); \
@@ -1058,6 +1406,7 @@
CLK_ADD(CLK, clk_inc2); \
reg_valh = LOAD((val) + 1); \
CLK_ADD(CLK, clk_inc3); \
+ reg_wz = (val) + 1; \
INC_PC(pc_inc); \
} while (0)
@@ -1075,6 +1424,7 @@
reg_sp = LOAD(value); \
CLK_ADD(CLK, clk_inc2); \
reg_sp |= LOAD(value + 1) << 8; \
+ reg_wz = value + 1; \
CLK_ADD(CLK, clk_inc3); \
INC_PC(pc_inc); \
} while (0)
@@ -1090,6 +1440,18 @@
INC_PC(pc_inc); \
} while (0)
+#define LDREGWZ(reg_dest, addr, clk_inc1, clk_inc2, pc_inc) \
+ do { \
+ uint8_t tmp; \
+ \
+ CLK_ADD(CLK, clk_inc1); \
+ tmp = (uint8_t)(LOAD(addr)); \
+ reg_dest = tmp; \
+ CLK_ADD(CLK, clk_inc2); \
+ reg_wz = addr + 1; \
+ INC_PC(pc_inc); \
+ } while (0)
+
#define LDW(value, reg_valh, reg_vall, clk_inc1, clk_inc2, pc_inc) \
do { \
CLK_ADD(CLK, clk_inc1); \
@@ -1143,6 +1505,7 @@
CLK_ADD(CLK, (clk_inc1 + tmp) ); \
OUT(BC_WORD(), value); \
CLK_ADD(CLK, (clk_inc2 - tmp) ); \
+ reg_wz = BC_WORD() + 1; \
INC_PC(pc_inc); \
} while (0)
#else
@@ -1151,6 +1514,7 @@
CLK_ADD(CLK, clk_inc1); \
OUT(BC_WORD(), value); \
CLK_ADD(CLK, clk_inc2); \
+ reg_wz = BC_WORD() + 1; \
INC_PC(pc_inc); \
} while (0)
#endif
@@ -1161,6 +1525,7 @@
\
CLK_ADD(CLK, 4); \
reg_b--; \
+ reg_wz = BC_WORD() + 1; \
tmp = LOAD(HL_WORD()); \
CLK_ADD(CLK, 4); \
OUT(BC_WORD(), tmp); \
@@ -1182,6 +1547,7 @@
CLK_ADD(CLK, 4); \
OUT(BC_WORD(), tmp); \
HL_FUNC; \
+ reg_wz = z80_reg_pc + 1; \
if (!reg_b) { \
reg_f = N_FLAG | Z_FLAG; \
INC_PC(2); \
@@ -1307,6 +1673,7 @@
LOCAL_SET_CARRY(rot); \
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_HALFCARRY(0); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_a & U35_FLAG); \
CLK_ADD(CLK, clk_inc); \
INC_PC(pc_inc); \
} while (0)
@@ -1331,6 +1698,7 @@
LOCAL_SET_CARRY(rot); \
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_HALFCARRY(0); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_a & U35_FLAG); \
CLK_ADD(CLK, clk_inc); \
INC_PC(pc_inc); \
} while (0)
@@ -1370,7 +1738,9 @@
do { \
uint8_t tmp; \
\
- tmp = LOAD(HL_WORD()); \
+ reg_wz = HL_WORD(); \
+ tmp = LOAD(reg_wz); \
+ reg_wz++; \
CLK_ADD(CLK, 8); \
STORE(HL_WORD(), (tmp << 4) | (reg_a & 0x0f)); \
reg_a = (tmp >> 4) | (reg_a & 0xf0); \
@@ -1430,6 +1800,7 @@
LOCAL_SET_CARRY(rot); \
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_HALFCARRY(0); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_a & U35_FLAG); \
CLK_ADD(CLK, clk_inc); \
INC_PC(pc_inc); \
} while (0)
@@ -1454,6 +1825,7 @@
LOCAL_SET_CARRY(rot); \
LOCAL_SET_NADDSUB(0); \
LOCAL_SET_HALFCARRY(0); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_a & U35_FLAG); \
CLK_ADD(CLK, clk_inc); \
INC_PC(pc_inc); \
} while (0)
@@ -1493,7 +1865,9 @@
do { \
uint8_t tmp; \
\
- tmp = LOAD(HL_WORD()); \
+ reg_wz = HL_WORD(); \
+ tmp = LOAD(reg_wz); \
+ reg_wz++; \
CLK_ADD(CLK, 8); \
STORE(HL_WORD(), (tmp >> 4) | (reg_a << 4)); \
reg_a = (tmp & 0x0f) | (reg_a & 0xf0); \
@@ -1540,6 +1914,8 @@
\
carry = LOCAL_CARRY(); \
tmp = (uint32_t)(HL_WORD()) - (uint32_t)((reg_valh << 8) + reg_vall) - (uint32_t)(carry); \
+ reg_wz = HL_WORD(); \
+ reg_wz++; \
reg_f = N_FLAG; \
LOCAL_SET_CARRY(tmp & 0x10000); \
LOCAL_SET_HALFCARRY((reg_h ^ reg_valh ^ (tmp >> 8)) & H_FLAG); \
@@ -1548,6 +1924,7 @@
LOCAL_SET_SIGN(tmp & 0x8000); \
reg_h = (uint8_t)(tmp >> 8); \
reg_l = (uint8_t)(tmp & 0xff); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_h & U35_FLAG); \
CLK_ADD(CLK, 15); \
INC_PC(2); \
} while (0)
@@ -1567,6 +1944,7 @@
LOCAL_SET_SIGN(tmp & 0x8000); \
reg_h = (uint8_t)(tmp >> 8); \
reg_l = (uint8_t)(tmp & 0xff); \
+ reg_f = (reg_f & ~(U35_FLAG)) | (reg_h & U35_FLAG); \
CLK_ADD(CLK, 15); \
INC_PC(2); \
} while (0)
@@ -1588,11 +1966,16 @@
INC_PC(pc_inc); \
} while (0)
+/* note that bits 5 and 3 are set based on previous flag and A */
+/* this passes zexall, but see:
+ https://github.com/hoglet67/Z80Decoder/wiki/Undocumented-Flags#scfccf
+*/
#define SCF(clk_inc, pc_inc) \
do { \
LOCAL_SET_CARRY(1); \
LOCAL_SET_HALFCARRY(0); \
LOCAL_SET_NADDSUB(0); \
+ reg_f = reg_f | (reg_a & U35_FLAG); \
CLK_ADD(CLK, clk_inc); \
INC_PC(pc_inc); \
} while (0)
@@ -1806,6 +2189,7 @@
CLK_ADD(CLK, clk_inc2); \
STORE((uint16_t)(addr + 1), reg_valh); \
CLK_ADD(CLK, clk_inc3); \
+ reg_wz = addr + 1; \
INC_PC(pc_inc); \
} while (0)
@@ -1816,6 +2200,7 @@
CLK_ADD(CLK, clk_inc2); \
STORE((uint16_t)(addr + 1), (reg_sp >> 8)); \
CLK_ADD(CLK, clk_inc3); \
+ reg_wz = addr + 1; \
INC_PC(pc_inc); \
} while (0)
@@ -1827,6 +2212,15 @@
INC_PC(pc_inc); \
} while (0)
+#define STREGWZ(addr, reg_val, clk_inc1, clk_inc2, pc_inc) \
+ do { \
+ CLK_ADD(CLK, clk_inc1); \
+ STORE(addr, reg_val); \
+ CLK_ADD(CLK, clk_inc2); \
+ reg_wz = ((addr + 1) & 0xff) | (reg_val << 8); \
+ INC_PC(pc_inc); \
+ } while (0)
+
#define SUB(loadval, clk_inc1, clk_inc2, pc_inc) \
do { \
uint8_t tmp, value; \
@@ -2071,7 +2465,7 @@
BIT(reg_l, 0, 0, 8, 2);
break;
case 0x46: /* BIT (HL) 0 */
- BIT(LOAD(HL_WORD()), 0, 4, 8, 2);
+ BIT16(LOAD(HL_WORD()), 0, 4, 8, 2);
break;
case 0x47: /* BIT A 0 */
BIT(reg_a, 0, 0, 8, 2);
@@ -2095,7 +2489,7 @@
BIT(reg_l, 1, 0, 8, 2);
break;
case 0x4e: /* BIT (HL) 1 */
- BIT(LOAD(HL_WORD()), 1, 4, 8, 2);
+ BIT16(LOAD(HL_WORD()), 1, 4, 8, 2);
break;
case 0x4f: /* BIT A 1 */
BIT(reg_a, 1, 0, 8, 2);
@@ -2119,7 +2513,7 @@
BIT(reg_l, 2, 0, 8, 2);
break;
case 0x56: /* BIT (HL) 2 */
- BIT(LOAD(HL_WORD()), 2, 4, 8, 2);
+ BIT16(LOAD(HL_WORD()), 2, 4, 8, 2);
break;
case 0x57: /* BIT A 2 */
BIT(reg_a, 2, 0, 8, 2);
@@ -2143,7 +2537,7 @@
BIT(reg_l, 3, 0, 8, 2);
break;
case 0x5e: /* BIT (HL) 3 */
- BIT(LOAD(HL_WORD()), 3, 4, 8, 2);
+ BIT16(LOAD(HL_WORD()), 3, 4, 8, 2);
break;
case 0x5f: /* BIT A 3 */
BIT(reg_a, 3, 0, 8, 2);
@@ -2167,7 +2561,7 @@
BIT(reg_l, 4, 0, 8, 2);
break;
case 0x66: /* BIT (HL) 4 */
- BIT(LOAD(HL_WORD()), 4, 4, 8, 2);
+ BIT16(LOAD(HL_WORD()), 4, 4, 8, 2);
break;
case 0x67: /* BIT A 4 */
BIT(reg_a, 4, 0, 8, 2);
@@ -2191,7 +2585,7 @@
BIT(reg_l, 5, 0, 8, 2);
break;
case 0x6e: /* BIT (HL) 5 */
- BIT(LOAD(HL_WORD()), 5, 4, 8, 2);
+ BIT16(LOAD(HL_WORD()), 5, 4, 8, 2);
break;
case 0x6f: /* BIT A 5 */
BIT(reg_a, 5, 0, 8, 2);
@@ -2215,7 +2609,7 @@
BIT(reg_l, 6, 0, 8, 2);
break;
case 0x76: /* BIT (HL) 6 */
- BIT(LOAD(HL_WORD()), 6, 4, 8, 2);
+ BIT16(LOAD(HL_WORD()), 6, 4, 8, 2);
break;
case 0x77: /* BIT A 6 */
BIT(reg_a, 6, 0, 8, 2);
@@ -2239,7 +2633,7 @@
BIT(reg_l, 7, 0, 8, 2);
break;
case 0x7e: /* BIT (HL) 7 */
- BIT(LOAD(HL_WORD()), 7, 4, 8, 2);
+ BIT16(LOAD(HL_WORD()), 7, 4, 8, 2);
break;
case 0x7f: /* BIT A 7 */
BIT(reg_a, 7, 0, 8, 2);
@@ -2633,202 +3027,243 @@
}
}
-static void opcode_dd_cb(uint8_t iip2, uint8_t iip3, uint16_t iip23)
+#undef INSTS
+#define INSTS(IX,IY) \
+ do { \
+ switch (inst_mode) { \
+ case INST_IX: \
+ IX; \
+ break; \
+ case INST_IY: \
+ IY; \
+ break; \
+ default: \
+ break; \
+ } \
+ } while (0)
+
+#define INSTS_SH(func, XY, cyc, inc) \
+ INSTS(func(IX_##XY, 0, 0, cyc, inc), \
+ func(IY_##XY, 0, 0, cyc, inc));
+
+#define INSTS_SHREG(func, reg, XY, cyc, inc) \
+ INSTS(func(reg, IX_##XY, 0, 0, cyc, inc), \
+ func(reg, IY_##XY, 0 ,0, cyc, inc));
+
+#define INSTS_RS(func, bit, XY, cyc, inc) \
+ INSTS(func(bit, IX_##XY, 0, 0, cyc, inc), \
+ func(bit, IY_##XY, 0, 0, cyc, inc));
+
+#define INSTS_RSREG(func, bit, reg, XY, cyc, inc) \
+ INSTS(func(bit, reg, IX_##XY, 0, 0, cyc, inc), \
+ func(bit, reg, IY_##XY, 0, 0, cyc, inc));
+
+#define INSTS_BIT(XY, bit, cyc, inc) \
+ INSTS(BIT16(LOAD(IX_##XY), bit, 0, cyc, inc), \
+ BIT16(LOAD(IY_##XY), bit, 0, cyc, inc));
+
+/* use macros to reduce source code and make this more managable. */
+/* "Ir" is either IX or IY. The macros above do the code expansion to
+ handle both the IX and IY cases. */
+static void opcode_ddfd_cb(uint8_t iip2, uint8_t iip3, uint16_t iip23)
{
+ /* effecitively read 0xcb */
+ CLK_ADD(CLK, 4);
+ INC_PC(1);
switch (iip3) {
- case 0x00: /* RLC (IX+d),B */
- RLCXXREG(reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x00: /* RLC (Ir+d),B */
+ INSTS_SHREG(RLCXXREG, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x01: /* RLC (IX+d),C */
- RLCXXREG(reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x01: /* RLC (Ir+d),C */
+ INSTS_SHREG(RLCXXREG, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x02: /* RLC (IX+d),D */
- RLCXXREG(reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x02: /* RLC (Ir+d),D */
+ INSTS_SHREG(RLCXXREG, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x03: /* RLC (IX+d),E */
- RLCXXREG(reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x03: /* RLC (Ir+d),E */
+ INSTS_SHREG(RLCXXREG, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x04: /* RLC (IX+d),H */
- RLCXXREG(reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x04: /* RLC (Ir+d),H */
+ INSTS_SHREG(RLCXXREG, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x05: /* RLC (IX+d),L */
- RLCXXREG(reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x05: /* RLC (Ir+d),L */
+ INSTS_SHREG(RLCXXREG, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x06: /* RLC (IX+d) */
- RLCXX(IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x06: /* RLC (Ir+d) */
+ INSTS_SH(RLCXX, WORD_OFF(iip2), 15, 2);
break;
- case 0x07: /* RLC (IX+d),A */
- RLCXXREG(reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x07: /* RLC (Ir+d),A */
+ INSTS_SHREG(RLCXXREG, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x08: /* RRC (IX+d),B */
- RRCXXREG(reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x08: /* RRC (Ir+d),B */
+ INSTS_SHREG(RRCXXREG, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x09: /* RRC (IX+d),C */
- RRCXXREG(reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x09: /* RRC (Ir+d),C */
+ INSTS_SHREG(RRCXXREG, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x0a: /* RRC (IX+d),D */
- RRCXXREG(reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x0a: /* RRC (Ir+d),D */
+ INSTS_SHREG(RRCXXREG, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x0b: /* RRC (IX+d),E */
- RRCXXREG(reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x0b: /* RRC (Ir+d),E */
+ INSTS_SHREG(RRCXXREG, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x0c: /* RRC (IX+d),H */
- RRCXXREG(reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x0c: /* RRC (Ir+d),H */
+ INSTS_SHREG(RRCXXREG, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x0d: /* RRC (IX+d),L */
- RRCXXREG(reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x0d: /* RRC (Ir+d),L */
+ INSTS_SHREG(RRCXXREG, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x0e: /* RRC (IX+d) */
- RRCXX(IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x0e: /* RRC (Ir+d) */
+ INSTS_SH(RRCXX, WORD_OFF(iip2), 15, 2);
break;
- case 0x0f: /* RRC (IX+d),A */
- RRCXXREG(reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x0f: /* RRC (Ir+d),A */
+ INSTS_SHREG(RRCXXREG, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x10: /* RL (IX+d),B */
- RLXXREG(reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x10: /* RL (Ir+d),B */
+ INSTS_SHREG(RLXXREG, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x11: /* RL (IX+d),C */
- RLXXREG(reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x11: /* RL (Ir+d),C */
+ INSTS_SHREG(RLXXREG, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x12: /* RL (IX+d),D */
- RLXXREG(reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x12: /* RL (Ir+d),D */
+ INSTS_SHREG(RLXXREG, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x13: /* RL (IX+d),E */
- RLXXREG(reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x13: /* RL (Ir+d),E */
+ INSTS_SHREG(RLXXREG, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x14: /* RL (IX+d),H */
- RLXXREG(reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x14: /* RL (Ir+d),H */
+ INSTS_SHREG(RLXXREG, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x15: /* RL (IX+d),L */
- RLXXREG(reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x15: /* RL (Ir+d),L */
+ INSTS_SHREG(RLXXREG, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x16: /* RL (IX+d) */
- RLXX(IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x16: /* RL (Ir+d) */
+ INSTS_SH(RLXX, WORD_OFF(iip2), 15, 2);
break;
- case 0x17: /* RL (IX+d),A */
- RLXXREG(reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x17: /* RL (Ir+d),A */
+ INSTS_SHREG(RLXXREG, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x18: /* RR (IX+d),B */
- RRXXREG(reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x18: /* RR (Ir+d),B */
+ INSTS_SHREG(RRXXREG, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x19: /* RR (IX+d),C */
- RRXXREG(reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x19: /* RR (Ir+d),C */
+ INSTS_SHREG(RRXXREG, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x1a: /* RR (IX+d),D */
- RRXXREG(reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x1a: /* RR (Ir+d),D */
+ INSTS_SHREG(RRXXREG, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x1b: /* RR (IX+d),E */
- RRXXREG(reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x1b: /* RR (Ir+d),E */
+ INSTS_SHREG(RRXXREG, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x1c: /* RR (IX+d),H */
- RRXXREG(reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x1c: /* RR (Ir+d),H */
+ INSTS_SHREG(RRXXREG, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x1d: /* RR (IX+d),L */
- RRXXREG(reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x1d: /* RR (Ir+d),L */
+ INSTS_SHREG(RRXXREG, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x1e: /* RR (IX+d) */
- RRXX(IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x1e: /* RR (Ir+d) */
+ INSTS_SH(RRXX, WORD_OFF(iip2), 15, 2);
break;
- case 0x1f: /* RR (IX+d),A */
- RRXXREG(reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x1f: /* RR (Ir+d),A */
+ INSTS_SHREG(RRXXREG, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x20: /* SLA (IX+d),B */
- SLAXXREG(reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x20: /* SLA (Ir+d),B */
+ INSTS_SHREG(SLAXXREG, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x21: /* SLA (IX+d),C */
- SLAXXREG(reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x21: /* SLA (Ir+d),C */
+ INSTS_SHREG(SLAXXREG, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x22: /* SLA (IX+d),D */
- SLAXXREG(reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x22: /* SLA (Ir+d),D */
+ INSTS_SHREG(SLAXXREG, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x23: /* SLA (IX+d),E */
- SLAXXREG(reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x23: /* SLA (Ir+d),E */
+ INSTS_SHREG(SLAXXREG, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x24: /* SLA (IX+d),H */
- SLAXXREG(reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x24: /* SLA (Ir+d),H */
+ INSTS_SHREG(SLAXXREG, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x25: /* SLA (IX+d),L */
- SLAXXREG(reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x25: /* SLA (Ir+d),L */
+ INSTS_SHREG(SLAXXREG, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x26: /* SLA (IX+d) */
- SLAXX(IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x26: /* SLA (Ir+d) */
+ INSTS_SH(SLAXX, WORD_OFF(iip2), 15, 2);
break;
- case 0x27: /* SLA (IX+d),A */
- SLAXXREG(reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x27: /* SLA (Ir+d),A */
+ INSTS_SHREG(SLAXXREG, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x28: /* SRA (IX+d),B */
- SRAXXREG(reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x28: /* SRA (Ir+d),B */
+ INSTS_SHREG(SRAXXREG, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x29: /* SRA (IX+d),C */
- SRAXXREG(reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x29: /* SRA (Ir+d),C */
+ INSTS_SHREG(SRAXXREG, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x2a: /* SRA (IX+d),D */
- SRAXXREG(reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x2a: /* SRA (Ir+d),D */
+ INSTS_SHREG(SRAXXREG, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x2b: /* SRA (IX+d),E */
- SRAXXREG(reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x2b: /* SRA (Ir+d),E */
+ INSTS_SHREG(SRAXXREG, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x2c: /* SRA (IX+d),H */
- SRAXXREG(reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x2c: /* SRA (Ir+d),H */
+ INSTS_SHREG(SRAXXREG, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x2d: /* SRA (IX+d),L */
- SRAXXREG(reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x2d: /* SRA (Ir+d),L */
+ INSTS_SHREG(SRAXXREG, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x2e: /* SRA (IX+d) */
- SRAXX(IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x2e: /* SRA (Ir+d) */
+ INSTS_SH(SRAXX, WORD_OFF(iip2), 15, 2);
break;
- case 0x2f: /* SRA (IX+d),A */
- SRAXXREG(reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x2f: /* SRA (Ir+d),A */
+ INSTS_SHREG(SRAXXREG, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x30: /* SLL (IX+d),B */
- SLLXXREG(reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x30: /* SLL (Ir+d),B */
+ INSTS_SHREG(SLLXXREG, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x31: /* SLL (IX+d),C */
- SLLXXREG(reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x31: /* SLL (Ir+d),C */
+ INSTS_SHREG(SLLXXREG, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x32: /* SLL (IX+d),D */
- SLLXXREG(reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x32: /* SLL (Ir+d),D */
+ INSTS_SHREG(SLLXXREG, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x33: /* SLL (IX+d),E */
- SLLXXREG(reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x33: /* SLL (Ir+d),E */
+ INSTS_SHREG(SLLXXREG, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x34: /* SLL (IX+d),H */
- SLLXXREG(reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x34: /* SLL (Ir+d),H */
+ INSTS_SHREG(SLLXXREG, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x35: /* SLL (IX+d),L */
- SLLXXREG(reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x35: /* SLL (Ir+d),L */
+ INSTS_SHREG(SLLXXREG, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x36: /* SLL (IX+d) */
- SLLXX(IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x36: /* SLL (Ir+d) */
+ INSTS_SH(SLLXX, WORD_OFF(iip2), 15, 2);
break;
- case 0x37: /* SLL (IX+d),A */
- SLLXXREG(reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x37: /* SLL (Ir+d),A */
+ INSTS_SHREG(SLLXXREG, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x38: /* SRL (IX+d),B */
- SRLXXREG(reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x38: /* SRL (Ir+d),B */
+ INSTS_SHREG(SRLXXREG, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x39: /* SRL (IX+d),C */
- SRLXXREG(reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x39: /* SRL (Ir+d),C */
+ INSTS_SHREG(SRLXXREG, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x3a: /* SRL (IX+d),D */
- SRLXXREG(reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x3a: /* SRL (Ir+d),D */
+ INSTS_SHREG(SRLXXREG, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x3b: /* SRL (IX+d),E */
- SRLXXREG(reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x3b: /* SRL (Ir+d),E */
+ INSTS_SHREG(SRLXXREG, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x3c: /* SRL (IX+d),H */
- SRLXXREG(reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x3c: /* SRL (Ir+d),H */
+ INSTS_SHREG(SRLXXREG, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x3d: /* SRL (IX+d),L */
- SRLXXREG(reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x3d: /* SRL (Ir+d),L */
+ INSTS_SHREG(SRLXXREG, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x3e: /* SRL (IX+d) */
- SRLXX(IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x3e: /* SRL (Ir+d) */
+ INSTS_SH(SRLXX, WORD_OFF(iip2), 15, 2);
break;
- case 0x3f: /* SRL (IX+d),A */
- SRLXXREG(reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x3f: /* SRL (Ir+d),A */
+ INSTS_SHREG(SRLXXREG, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x40: /* BIT (IX+d) 0 */
+ case 0x40: /* BIT (Ir+d) 0 */
case 0x41:
case 0x42:
case 0x43:
@@ -2836,9 +3271,9 @@
case 0x45:
case 0x46:
case 0x47:
- BIT(LOAD(IX_WORD_OFF(iip2)), 0, 8, 12, 4);
+ INSTS_BIT(WORD_OFF(iip2), 0, 12, 2);
break;
- case 0x48: /* BIT (IX+d) 1 */
+ case 0x48: /* BIT (Ir+d) 1 */
case 0x49:
case 0x4a:
case 0x4b:
@@ -2846,9 +3281,9 @@
case 0x4d:
case 0x4e:
case 0x4f:
- BIT(LOAD(IX_WORD_OFF(iip2)), 1, 8, 12, 4);
+ INSTS_BIT(WORD_OFF(iip2), 1, 12, 2);
break;
- case 0x50: /* BIT (IX+d) 2 */
+ case 0x50: /* BIT (Ir+d) 2 */
case 0x51:
case 0x52:
case 0x53:
@@ -2856,9 +3291,9 @@
case 0x55:
case 0x56:
case 0x57:
- BIT(LOAD(IX_WORD_OFF(iip2)), 2, 8, 12, 4);
+ INSTS_BIT(WORD_OFF(iip2), 2, 12, 2);
break;
- case 0x58: /* BIT (IX+d) 3 */
+ case 0x58: /* BIT (Ir+d) 3 */
case 0x59:
case 0x5a:
case 0x5b:
@@ -2866,9 +3301,9 @@
case 0x5d:
case 0x5e:
case 0x5f:
- BIT(LOAD(IX_WORD_OFF(iip2)), 3, 8, 12, 4);
+ INSTS_BIT(WORD_OFF(iip2), 3, 12, 2);
break;
- case 0x60: /* BIT (IX+d) 4 */
+ case 0x60: /* BIT (Ir+d) 4 */
case 0x61:
case 0x62:
case 0x63:
@@ -2876,9 +3311,9 @@
case 0x65:
case 0x66:
case 0x67:
- BIT(LOAD(IX_WORD_OFF(iip2)), 4, 8, 12, 4);
+ INSTS_BIT(WORD_OFF(iip2), 4, 12, 2);
break;
- case 0x68: /* BIT (IX+d) 5 */
+ case 0x68: /* BIT (Ir+d) 5 */
case 0x69:
case 0x6a:
case 0x6b:
@@ -2886,9 +3321,9 @@
case 0x6d:
case 0x6e:
case 0x6f:
- BIT(LOAD(IX_WORD_OFF(iip2)), 5, 8, 12, 4);
+ INSTS_BIT(WORD_OFF(iip2), 5, 12, 2);
break;
- case 0x70: /* BIT (IX+d) 6 */
+ case 0x70: /* BIT (Ir+d) 6 */
case 0x71:
case 0x72:
case 0x73:
@@ -2896,9 +3331,9 @@
case 0x75:
case 0x76:
case 0x77:
- BIT(LOAD(IX_WORD_OFF(iip2)), 6, 8, 12, 4);
+ INSTS_BIT(WORD_OFF(iip2), 6, 12, 2);
break;
- case 0x78: /* BIT (IX+d) 7 */
+ case 0x78: /* BIT (Ir+d) 7 */
case 0x79:
case 0x7a:
case 0x7b:
@@ -2906,1043 +3341,395 @@
case 0x7d:
case 0x7e:
case 0x7f:
- BIT(LOAD(IX_WORD_OFF(iip2)), 7, 8, 12, 4);
+ INSTS_BIT(WORD_OFF(iip2), 7, 12, 2);
break;
- case 0x80: /* RES (IX+d),B 0 */
- RESXXREG(0, reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x80: /* RES (Ir+d),B 0 */
+ INSTS_RSREG(RESXXREG, 0, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x81: /* RES (IX+d),C 0 */
- RESXXREG(0, reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x81: /* RES (Ir+d),C 0 */
+ INSTS_RSREG(RESXXREG, 0, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x82: /* RES (IX+d),D 0 */
- RESXXREG(0, reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x82: /* RES (Ir+d),D 0 */
+ INSTS_RSREG(RESXXREG, 0, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x83: /* RES (IX+d),E 0 */
- RESXXREG(0, reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x83: /* RES (Ir+d),E 0 */
+ INSTS_RSREG(RESXXREG, 0, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x84: /* RES (IX+d),H 0 */
- RESXXREG(0, reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x84: /* RES (Ir+d),H 0 */
+ INSTS_RSREG(RESXXREG, 0, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x85: /* RES (IX+d),L 0 */
- RESXXREG(0, reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x85: /* RES (Ir+d),L 0 */
+ INSTS_RSREG(RESXXREG, 0, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x86: /* RES (IX+d) 0 */
- RESXX(0, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x86: /* RES (Ir+d) 0 */
+ INSTS_RS(RESXX, 0, WORD_OFF(iip2), 15, 2);
break;
- case 0x87: /* RES (IX+d),A 0 */
- RESXXREG(0, reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x87: /* RES (Ir+d),A 0 */
+ INSTS_RSREG(RESXXREG, 0, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x88: /* RES (IX+d),B 1 */
- RESXXREG(1, reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x88: /* RES (Ir+d),B 1 */
+ INSTS_RSREG(RESXXREG, 1, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x89: /* RES (IX+d),C 1 */
- RESXXREG(1, reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x89: /* RES (Ir+d),C 1 */
+ INSTS_RSREG(RESXXREG, 1, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x8a: /* RES (IX+d),D 1 */
- RESXXREG(1, reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x8a: /* RES (Ir+d),D 1 */
+ INSTS_RSREG(RESXXREG, 1, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x8b: /* RES (IX+d),E 1 */
- RESXXREG(1, reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x8b: /* RES (Ir+d),E 1 */
+ INSTS_RSREG(RESXXREG, 1, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x8c: /* RES (IX+d),H 1 */
- RESXXREG(1, reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x8c: /* RES (Ir+d),H 1 */
+ INSTS_RSREG(RESXXREG, 1, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x8d: /* RES (IX+d),L 1 */
- RESXXREG(1, reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x8d: /* RES (Ir+d),L 1 */
+ INSTS_RSREG(RESXXREG, 1, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x8e: /* RES (IX+d) 1 */
- RESXX(1, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x8e: /* RES (Ir+d) 1 */
+ INSTS_RS(RESXX, 1, WORD_OFF(iip2), 15, 2);
break;
- case 0x8f: /* RES (IX+d),A 1 */
- RESXXREG(1, reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x8f: /* RES (Ir+d),A 1 */
+ INSTS_RSREG(RESXXREG, 1, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x90: /* RES (IX+d),B 2 */
- RESXXREG(2, reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x90: /* RES (Ir+d),B 2 */
+ INSTS_RSREG(RESXXREG, 2, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x91: /* RES (IX+d),C 2 */
- RESXXREG(2, reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x91: /* RES (Ir+d),C 2 */
+ INSTS_RSREG(RESXXREG, 2, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x92: /* RES (IX+d),D 2 */
- RESXXREG(2, reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x92: /* RES (Ir+d),D 2 */
+ INSTS_RSREG(RESXXREG, 2, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x93: /* RES (IX+d),E 2 */
- RESXXREG(2, reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x93: /* RES (Ir+d),E 2 */
+ INSTS_RSREG(RESXXREG, 2, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x94: /* RES (IX+d),H 2 */
- RESXXREG(2, reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x94: /* RES (Ir+d),H 2 */
+ INSTS_RSREG(RESXXREG, 2, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x95: /* RES (IX+d),L 2 */
- RESXXREG(2, reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x95: /* RES (Ir+d),L 2 */
+ INSTS_RSREG(RESXXREG, 2, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x96: /* RES (IX+d) 2 */
- RESXX(2, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x96: /* RES (Ir+d) 2 */
+ INSTS_RS(RESXX, 2, WORD_OFF(iip2), 15, 2);
break;
- case 0x97: /* RES (IX+d),A 2 */
- RESXXREG(2, reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x97: /* RES (Ir+d),A 2 */
+ INSTS_RSREG(RESXXREG, 2, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0x98: /* RES (IX+d),B 3 */
- RESXXREG(3, reg_b, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x98: /* RES (Ir+d),B 3 */
+ INSTS_RSREG(RESXXREG, 3, reg_b, WORD_OFF(iip2), 15, 2);
break;
- case 0x99: /* RES (IX+d),C 3 */
- RESXXREG(3, reg_c, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x99: /* RES (Ir+d),C 3 */
+ INSTS_RSREG(RESXXREG, 3, reg_c, WORD_OFF(iip2), 15, 2);
break;
- case 0x9a: /* RES (IX+d),D 3 */
- RESXXREG(3, reg_d, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x9a: /* RES (Ir+d),D 3 */
+ INSTS_RSREG(RESXXREG, 3, reg_d, WORD_OFF(iip2), 15, 2);
break;
- case 0x9b: /* RES (IX+d),E 3 */
- RESXXREG(3, reg_e, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x9b: /* RES (Ir+d),E 3 */
+ INSTS_RSREG(RESXXREG, 3, reg_e, WORD_OFF(iip2), 15, 2);
break;
- case 0x9c: /* RES (IX+d),H 3 */
- RESXXREG(3, reg_h, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x9c: /* RES (Ir+d),H 3 */
+ INSTS_RSREG(RESXXREG, 3, reg_h, WORD_OFF(iip2), 15, 2);
break;
- case 0x9d: /* RES (IX+d),L 3 */
- RESXXREG(3, reg_l, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x9d: /* RES (Ir+d),L 3 */
+ INSTS_RSREG(RESXXREG, 3, reg_l, WORD_OFF(iip2), 15, 2);
break;
- case 0x9e: /* RES (IX+d) 3 */
- RESXX(3, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x9e: /* RES (Ir+d) 3 */
+ INSTS_RS(RESXX, 3, WORD_OFF(iip2), 15, 2);
break;
- case 0x9f: /* RES (IX+d),A 3 */
- RESXXREG(3, reg_a, IX_WORD_OFF(iip2), 4, 4, 15, 4);
+ case 0x9f: /* RES (Ir+d),A 3 */
+ INSTS_RSREG(RESXXREG, 3, reg_a, WORD_OFF(iip2), 15, 2);
break;
- case 0xa0: /* RES (IX+d)...
[truncated message content] |
|
From: <old...@us...> - 2024-04-24 23:35:17
|
Revision: 45137
http://sourceforge.net/p/vice-emu/code/45137
Author: oldwoman37
Date: 2024-04-24 23:35:14 +0000 (Wed, 24 Apr 2024)
Log Message:
-----------
ZEX128: A C128 native Z80 tester added
Added Paths:
-----------
testprogs/c128/z80/zex128/
testprogs/c128/z80/zex128/Makefile
testprogs/c128/z80/zex128/adc16-all.prg
testprogs/c128/z80/zex128/adc16-all.z80
testprogs/c128/z80/zex128/adc16.prg
testprogs/c128/z80/zex128/adc16.z80
testprogs/c128/z80/zex128/add16-all.prg
testprogs/c128/z80/zex128/add16-all.z80
testprogs/c128/z80/zex128/add16.prg
testprogs/c128/z80/zex128/add16.z80
testprogs/c128/z80/zex128/add16x-all.prg
testprogs/c128/z80/zex128/add16x-all.z80
testprogs/c128/z80/zex128/add16x.prg
testprogs/c128/z80/zex128/add16x.z80
testprogs/c128/z80/zex128/add16y-all.prg
testprogs/c128/z80/zex128/add16y-all.z80
testprogs/c128/z80/zex128/add16y.prg
testprogs/c128/z80/zex128/add16y.z80
testprogs/c128/z80/zex128/alu8i-all.prg
testprogs/c128/z80/zex128/alu8i-all.z80
testprogs/c128/z80/zex128/alu8i.prg
testprogs/c128/z80/zex128/alu8i.z80
testprogs/c128/z80/zex128/alu8r-all.prg
testprogs/c128/z80/zex128/alu8r-all.z80
testprogs/c128/z80/zex128/alu8r.prg
testprogs/c128/z80/zex128/alu8r.z80
testprogs/c128/z80/zex128/alu8rx-all.prg
testprogs/c128/z80/zex128/alu8rx-all.z80
testprogs/c128/z80/zex128/alu8rx.prg
testprogs/c128/z80/zex128/alu8rx.z80
testprogs/c128/z80/zex128/alu8x-all.prg
testprogs/c128/z80/zex128/alu8x-all.z80
testprogs/c128/z80/zex128/alu8x.prg
testprogs/c128/z80/zex128/alu8x.z80
testprogs/c128/z80/zex128/bitx-all.prg
testprogs/c128/z80/zex128/bitx-all.z80
testprogs/c128/z80/zex128/bitx.prg
testprogs/c128/z80/zex128/bitx.z80
testprogs/c128/z80/zex128/bitz80-all.prg
testprogs/c128/z80/zex128/bitz80-all.z80
testprogs/c128/z80/zex128/bitz80.prg
testprogs/c128/z80/zex128/bitz80.z80
testprogs/c128/z80/zex128/cpd1-all.prg
testprogs/c128/z80/zex128/cpd1-all.z80
testprogs/c128/z80/zex128/cpd1.prg
testprogs/c128/z80/zex128/cpd1.z80
testprogs/c128/z80/zex128/cpi1-all.prg
testprogs/c128/z80/zex128/cpi1-all.z80
testprogs/c128/z80/zex128/cpi1.prg
testprogs/c128/z80/zex128/cpi1.z80
testprogs/c128/z80/zex128/daaop-all.prg
testprogs/c128/z80/zex128/daaop-all.z80
testprogs/c128/z80/zex128/daaop.prg
testprogs/c128/z80/zex128/daaop.z80
testprogs/c128/z80/zex128/end.z80
testprogs/c128/z80/zex128/inca-all.prg
testprogs/c128/z80/zex128/inca-all.z80
testprogs/c128/z80/zex128/inca.prg
testprogs/c128/z80/zex128/inca.z80
testprogs/c128/z80/zex128/incb-all.prg
testprogs/c128/z80/zex128/incb-all.z80
testprogs/c128/z80/zex128/incb.prg
testprogs/c128/z80/zex128/incb.z80
testprogs/c128/z80/zex128/incbc-all.prg
testprogs/c128/z80/zex128/incbc-all.z80
testprogs/c128/z80/zex128/incbc.prg
testprogs/c128/z80/zex128/incbc.z80
testprogs/c128/z80/zex128/incc-all.prg
testprogs/c128/z80/zex128/incc-all.z80
testprogs/c128/z80/zex128/incc.prg
testprogs/c128/z80/zex128/incc.z80
testprogs/c128/z80/zex128/incd-all.prg
testprogs/c128/z80/zex128/incd-all.z80
testprogs/c128/z80/zex128/incd.prg
testprogs/c128/z80/zex128/incd.z80
testprogs/c128/z80/zex128/incde-all.prg
testprogs/c128/z80/zex128/incde-all.z80
testprogs/c128/z80/zex128/incde.prg
testprogs/c128/z80/zex128/incde.z80
testprogs/c128/z80/zex128/ince-all.prg
testprogs/c128/z80/zex128/ince-all.z80
testprogs/c128/z80/zex128/ince.prg
testprogs/c128/z80/zex128/ince.z80
testprogs/c128/z80/zex128/inch-all.prg
testprogs/c128/z80/zex128/inch-all.z80
testprogs/c128/z80/zex128/inch.prg
testprogs/c128/z80/zex128/inch.z80
testprogs/c128/z80/zex128/inchl-all.prg
testprogs/c128/z80/zex128/inchl-all.z80
testprogs/c128/z80/zex128/inchl.prg
testprogs/c128/z80/zex128/inchl.z80
testprogs/c128/z80/zex128/incix-all.prg
testprogs/c128/z80/zex128/incix-all.z80
testprogs/c128/z80/zex128/incix.prg
testprogs/c128/z80/zex128/incix.z80
testprogs/c128/z80/zex128/inciy-all.prg
testprogs/c128/z80/zex128/inciy-all.z80
testprogs/c128/z80/zex128/inciy.prg
testprogs/c128/z80/zex128/inciy.z80
testprogs/c128/z80/zex128/incl-all.prg
testprogs/c128/z80/zex128/incl-all.z80
testprogs/c128/z80/zex128/incl.prg
testprogs/c128/z80/zex128/incl.z80
testprogs/c128/z80/zex128/incm-all.prg
testprogs/c128/z80/zex128/incm-all.z80
testprogs/c128/z80/zex128/incm.prg
testprogs/c128/z80/zex128/incm.z80
testprogs/c128/z80/zex128/incsp-all.prg
testprogs/c128/z80/zex128/incsp-all.z80
testprogs/c128/z80/zex128/incsp.prg
testprogs/c128/z80/zex128/incsp.z80
testprogs/c128/z80/zex128/incx-all.prg
testprogs/c128/z80/zex128/incx-all.z80
testprogs/c128/z80/zex128/incx.prg
testprogs/c128/z80/zex128/incx.z80
testprogs/c128/z80/zex128/incxh-all.prg
testprogs/c128/z80/zex128/incxh-all.z80
testprogs/c128/z80/zex128/incxh.prg
testprogs/c128/z80/zex128/incxh.z80
testprogs/c128/z80/zex128/incxl-all.prg
testprogs/c128/z80/zex128/incxl-all.z80
testprogs/c128/z80/zex128/incxl.prg
testprogs/c128/z80/zex128/incxl.z80
testprogs/c128/z80/zex128/incyh-all.prg
testprogs/c128/z80/zex128/incyh-all.z80
testprogs/c128/z80/zex128/incyh.prg
testprogs/c128/z80/zex128/incyh.z80
testprogs/c128/z80/zex128/incyl-all.prg
testprogs/c128/z80/zex128/incyl-all.z80
testprogs/c128/z80/zex128/incyl.prg
testprogs/c128/z80/zex128/incyl.z80
testprogs/c128/z80/zex128/ld161-all.prg
testprogs/c128/z80/zex128/ld161-all.z80
testprogs/c128/z80/zex128/ld161.prg
testprogs/c128/z80/zex128/ld161.z80
testprogs/c128/z80/zex128/ld162-all.prg
testprogs/c128/z80/zex128/ld162-all.z80
testprogs/c128/z80/zex128/ld162.prg
testprogs/c128/z80/zex128/ld162.z80
testprogs/c128/z80/zex128/ld163-all.prg
testprogs/c128/z80/zex128/ld163-all.z80
testprogs/c128/z80/zex128/ld163.prg
testprogs/c128/z80/zex128/ld163.z80
testprogs/c128/z80/zex128/ld164-all.prg
testprogs/c128/z80/zex128/ld164-all.z80
testprogs/c128/z80/zex128/ld164.prg
testprogs/c128/z80/zex128/ld164.z80
testprogs/c128/z80/zex128/ld165-all.prg
testprogs/c128/z80/zex128/ld165-all.z80
testprogs/c128/z80/zex128/ld165.prg
testprogs/c128/z80/zex128/ld165.z80
testprogs/c128/z80/zex128/ld166-all.prg
testprogs/c128/z80/zex128/ld166-all.z80
testprogs/c128/z80/zex128/ld166.prg
testprogs/c128/z80/zex128/ld166.z80
testprogs/c128/z80/zex128/ld167-all.prg
testprogs/c128/z80/zex128/ld167-all.z80
testprogs/c128/z80/zex128/ld167.prg
testprogs/c128/z80/zex128/ld167.z80
testprogs/c128/z80/zex128/ld168-all.prg
testprogs/c128/z80/zex128/ld168-all.z80
testprogs/c128/z80/zex128/ld168.prg
testprogs/c128/z80/zex128/ld168.z80
testprogs/c128/z80/zex128/ld16im-all.prg
testprogs/c128/z80/zex128/ld16im-all.z80
testprogs/c128/z80/zex128/ld16im.prg
testprogs/c128/z80/zex128/ld16im.z80
testprogs/c128/z80/zex128/ld16ix-all.prg
testprogs/c128/z80/zex128/ld16ix-all.z80
testprogs/c128/z80/zex128/ld16ix.prg
testprogs/c128/z80/zex128/ld16ix.z80
testprogs/c128/z80/zex128/ld8bd-all.prg
testprogs/c128/z80/zex128/ld8bd-all.z80
testprogs/c128/z80/zex128/ld8bd.prg
testprogs/c128/z80/zex128/ld8bd.z80
testprogs/c128/z80/zex128/ld8im-all.prg
testprogs/c128/z80/zex128/ld8im-all.z80
testprogs/c128/z80/zex128/ld8im.prg
testprogs/c128/z80/zex128/ld8im.z80
testprogs/c128/z80/zex128/ld8imx-all.prg
testprogs/c128/z80/zex128/ld8imx-all.z80
testprogs/c128/z80/zex128/ld8imx.prg
testprogs/c128/z80/zex128/ld8imx.z80
testprogs/c128/z80/zex128/ld8ix1-all.prg
testprogs/c128/z80/zex128/ld8ix1-all.z80
testprogs/c128/z80/zex128/ld8ix1.prg
testprogs/c128/z80/zex128/ld8ix1.z80
testprogs/c128/z80/zex128/ld8ix2-all.prg
testprogs/c128/z80/zex128/ld8ix2-all.z80
testprogs/c128/z80/zex128/ld8ix2.prg
testprogs/c128/z80/zex128/ld8ix2.z80
testprogs/c128/z80/zex128/ld8ix3-all.prg
testprogs/c128/z80/zex128/ld8ix3-all.z80
testprogs/c128/z80/zex128/ld8ix3.prg
testprogs/c128/z80/zex128/ld8ix3.z80
testprogs/c128/z80/zex128/ld8ixy-all.prg
testprogs/c128/z80/zex128/ld8ixy-all.z80
testprogs/c128/z80/zex128/ld8ixy.prg
testprogs/c128/z80/zex128/ld8ixy.z80
testprogs/c128/z80/zex128/ld8rr-all.prg
testprogs/c128/z80/zex128/ld8rr-all.z80
testprogs/c128/z80/zex128/ld8rr.prg
testprogs/c128/z80/zex128/ld8rr.z80
testprogs/c128/z80/zex128/ld8rrx-all.prg
testprogs/c128/z80/zex128/ld8rrx-all.z80
testprogs/c128/z80/zex128/ld8rrx.prg
testprogs/c128/z80/zex128/ld8rrx.z80
testprogs/c128/z80/zex128/lda-all.prg
testprogs/c128/z80/zex128/lda-all.z80
testprogs/c128/z80/zex128/lda.prg
testprogs/c128/z80/zex128/lda.z80
testprogs/c128/z80/zex128/ldd1-all.prg
testprogs/c128/z80/zex128/ldd1-all.z80
testprogs/c128/z80/zex128/ldd1.prg
testprogs/c128/z80/zex128/ldd1.z80
testprogs/c128/z80/zex128/ldd2-all.prg
testprogs/c128/z80/zex128/ldd2-all.z80
testprogs/c128/z80/zex128/ldd2.prg
testprogs/c128/z80/zex128/ldd2.z80
testprogs/c128/z80/zex128/ldi1-all.prg
testprogs/c128/z80/zex128/ldi1-all.z80
testprogs/c128/z80/zex128/ldi1.prg
testprogs/c128/z80/zex128/ldi1.z80
testprogs/c128/z80/zex128/ldi2-all.prg
testprogs/c128/z80/zex128/ldi2-all.z80
testprogs/c128/z80/zex128/ldi2.prg
testprogs/c128/z80/zex128/ldi2.z80
testprogs/c128/z80/zex128/macro.z80
testprogs/c128/z80/zex128/modified.zip
testprogs/c128/z80/zex128/negop-all.prg
testprogs/c128/z80/zex128/negop-all.z80
testprogs/c128/z80/zex128/negop.prg
testprogs/c128/z80/zex128/negop.z80
testprogs/c128/z80/zex128/original.zip
testprogs/c128/z80/zex128/prelim.prg
testprogs/c128/z80/zex128/prelim.z80
testprogs/c128/z80/zex128/readme.txt
testprogs/c128/z80/zex128/rldop-all.prg
testprogs/c128/z80/zex128/rldop-all.z80
testprogs/c128/z80/zex128/rldop.prg
testprogs/c128/z80/zex128/rldop.z80
testprogs/c128/z80/zex128/rot8080-all.prg
testprogs/c128/z80/zex128/rot8080-all.z80
testprogs/c128/z80/zex128/rot8080.prg
testprogs/c128/z80/zex128/rot8080.z80
testprogs/c128/z80/zex128/rotxy-all.prg
testprogs/c128/z80/zex128/rotxy-all.z80
testprogs/c128/z80/zex128/rotxy.prg
testprogs/c128/z80/zex128/rotxy.z80
testprogs/c128/z80/zex128/rotz80-all.prg
testprogs/c128/z80/zex128/rotz80-all.z80
testprogs/c128/z80/zex128/rotz80.prg
testprogs/c128/z80/zex128/rotz80.z80
testprogs/c128/z80/zex128/srz80-all.prg
testprogs/c128/z80/zex128/srz80-all.z80
testprogs/c128/z80/zex128/srz80.prg
testprogs/c128/z80/zex128/srz80.z80
testprogs/c128/z80/zex128/srzx-all.prg
testprogs/c128/z80/zex128/srzx-all.z80
testprogs/c128/z80/zex128/srzx.prg
testprogs/c128/z80/zex128/srzx.z80
testprogs/c128/z80/zex128/st8ix1-all.prg
testprogs/c128/z80/zex128/st8ix1-all.z80
testprogs/c128/z80/zex128/st8ix1.prg
testprogs/c128/z80/zex128/st8ix1.z80
testprogs/c128/z80/zex128/st8ix2-all.prg
testprogs/c128/z80/zex128/st8ix2-all.z80
testprogs/c128/z80/zex128/st8ix2.prg
testprogs/c128/z80/zex128/st8ix2.z80
testprogs/c128/z80/zex128/st8ix3-all.prg
testprogs/c128/z80/zex128/st8ix3-all.z80
testprogs/c128/z80/zex128/st8ix3.prg
testprogs/c128/z80/zex128/st8ix3.z80
testprogs/c128/z80/zex128/stabd-all.prg
testprogs/c128/z80/zex128/stabd-all.z80
testprogs/c128/z80/zex128/stabd.prg
testprogs/c128/z80/zex128/stabd.z80
testprogs/c128/z80/zex128/start.asm
testprogs/c128/z80/zex128/start.z80
testprogs/c128/z80/zex128/zex128.d81
Added: testprogs/c128/z80/zex128/Makefile
===================================================================
--- testprogs/c128/z80/zex128/Makefile (rev 0)
+++ testprogs/c128/z80/zex128/Makefile 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,169 @@
+#load address in decimal
+LA = 7169
+
+PRIPROGS = prelim.prg
+
+ZEXPROGS = \
+ adc16.prg \
+ add16.prg \
+ add16x.prg \
+ add16y.prg \
+ alu8i.prg \
+ alu8r.prg \
+ alu8rx.prg \
+ alu8x.prg \
+ bitx.prg \
+ bitz80.prg \
+ cpd1.prg \
+ cpi1.prg \
+ daaop.prg \
+ inca.prg \
+ incb.prg \
+ incbc.prg \
+ incc.prg \
+ incd.prg \
+ incde.prg \
+ ince.prg \
+ inch.prg \
+ inchl.prg \
+ incix.prg \
+ inciy.prg \
+ incl.prg \
+ incm.prg \
+ incsp.prg \
+ incx.prg \
+ incxh.prg \
+ incxl.prg \
+ incyh.prg \
+ incyl.prg \
+ ld161.prg \
+ ld162.prg \
+ ld163.prg \
+ ld164.prg \
+ ld165.prg \
+ ld166.prg \
+ ld167.prg \
+ ld168.prg \
+ ld16im.prg \
+ ld16ix.prg \
+ ld8bd.prg \
+ ld8im.prg \
+ ld8imx.prg \
+ ld8ix1.prg \
+ ld8ix2.prg \
+ ld8ix3.prg \
+ ld8ixy.prg \
+ ld8rr.prg \
+ ld8rrx.prg \
+ lda.prg \
+ ldd1.prg \
+ ldd2.prg \
+ ldi1.prg \
+ ldi2.prg \
+ negop.prg \
+ rldop.prg \
+ rot8080.prg \
+ rotxy.prg \
+ rotz80.prg \
+ srz80.prg \
+ srzx.prg \
+ st8ix1.prg \
+ st8ix2.prg \
+ st8ix3.prg \
+ stabd.prg \
+ adc16-all.prg \
+ add16-all.prg \
+ add16x-all.prg \
+ add16y-all.prg \
+ alu8i-all.prg \
+ alu8r-all.prg \
+ alu8rx-all.prg \
+ alu8x-all.prg \
+ bitx-all.prg \
+ bitz80-all.prg \
+ cpd1-all.prg \
+ cpi1-all.prg \
+ daaop-all.prg \
+ inca-all.prg \
+ incb-all.prg \
+ incbc-all.prg \
+ incc-all.prg \
+ incd-all.prg \
+ incde-all.prg \
+ ince-all.prg \
+ inch-all.prg \
+ inchl-all.prg \
+ incix-all.prg \
+ inciy-all.prg \
+ incl-all.prg \
+ incm-all.prg \
+ incsp-all.prg \
+ incx-all.prg \
+ incxh-all.prg \
+ incxl-all.prg \
+ incyh-all.prg \
+ incyl-all.prg \
+ ld161-all.prg \
+ ld162-all.prg \
+ ld163-all.prg \
+ ld164-all.prg \
+ ld165-all.prg \
+ ld166-all.prg \
+ ld167-all.prg \
+ ld168-all.prg \
+ ld16im-all.prg \
+ ld16ix-all.prg \
+ ld8bd-all.prg \
+ ld8im-all.prg \
+ ld8imx-all.prg \
+ ld8ix1-all.prg \
+ ld8ix2-all.prg \
+ ld8ix3-all.prg \
+ ld8ixy-all.prg \
+ ld8rr-all.prg \
+ ld8rrx-all.prg \
+ lda-all.prg \
+ ldd1-all.prg \
+ ldd2-all.prg \
+ ldi1-all.prg \
+ ldi2-all.prg \
+ negop-all.prg \
+ rldop-all.prg \
+ rot8080-all.prg \
+ rotxy-all.prg \
+ rotz80-all.prg \
+ srz80-all.prg \
+ srzx-all.prg \
+ st8ix1-all.prg \
+ st8ix2-all.prg \
+ st8ix3-all.prg \
+ stabd-all.prg
+
+PROGS = $(PRIPROGS) $(ZEXPROGS)
+
+all: $(PROGS) zex128.d81
+
+prelim.prg: prelim.z80
+ xa -bt `expr $(LA) - 2` -M -O PETSCII -DNAME=\"prelim\" -DNEXT=\"`echo $(basename $(PROGS)) - | awk -v NAME=prelim '{for(i=1;i<=NF;i++) if ($$i==NAME) print $$(i+1);}'`\" -o prelim.prga start.asm
+ (echo " org 0500h"; cat prelim.z80) | z80asm -i - -o prelim.prgb
+ cat prelim.prga prelim.prgb > prelim.prg
+ $(RM) prelim.prga prelim.prgb
+
+%.prg: %.z80 start.asm start.z80 macro.z80 end.z80
+ xa -bt `expr $(LA) - 2` -M -O PETSCII -DNAME=\"$*\" -DNEXT=\"`echo $(basename $(PROGS)) - | awk -v NAME=$* '{for(i=1;i<=NF;i++) if ($$i==NAME) print $$(i+1);}'`\" -o $*.prga start.asm
+ (echo " org 0500h"; echo " include 'start.z80'" ; cat $*.z80 ; echo " include 'end.z80'") | z80asm -i - -o $*.prgb
+ cat $*.prga $*.prgb > $*.prg
+ $(RM) $*.prga $*.prgb
+
+C1541OPTS = -disable-libdebug-output
+
+zex128.d81: $(PROGS)
+ c1541 -format "zex128,80" d81 zex128.d81 $(C1541OPTS) > /dev/null
+ for I in $(basename $(PROGS)); do \
+ c1541 zex128.d81 -write "$$I.prg" `echo "$$I" $(C1541OPTS)` > /dev/null; \
+ done
+# c1541 zex128.d81 -list $(C1541OPTS)
+
+clean:
+ rm -f *.prg
+ rm -f *.d81
Added: testprogs/c128/z80/zex128/adc16-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/adc16-all.prg
===================================================================
--- testprogs/c128/z80/zex128/adc16-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/adc16-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/adc16-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/adc16-all.z80
===================================================================
--- testprogs/c128/z80/zex128/adc16-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/adc16-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; <adc,sbc> hl,<bc,de,hl,sp> (38,912 cycles)
+adc16: flag 0ffh ; flag mask
+ tstr 0edh 042h 0 0 0832ch 04f88h 0f22bh 0b339h 07e1fh 01563h 0d3h 089h 0465eh
+ tstr 0 038h 0 0 0 0 0 0f821h 0 0 0 0 0 ; (1024 cycles)
+ tstr 0 0 0 0 0 0 0 -1 -1 -1 0d7h 0 -1 ; (38 cycles)
+ db 0d4h,08ah,0d5h,019h ; expected crc
+ dm '<adc,sbc> hl,<bc,de,hl,sp> (all)$'
Added: testprogs/c128/z80/zex128/adc16.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/adc16.prg
===================================================================
--- testprogs/c128/z80/zex128/adc16.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/adc16.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/adc16.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/adc16.z80
===================================================================
--- testprogs/c128/z80/zex128/adc16.z80 (rev 0)
+++ testprogs/c128/z80/zex128/adc16.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; <adc,sbc> hl,<bc,de,hl,sp> (38,912 cycles)
+adc16: flag 0c7h ; flag mask
+ tstr 0edh 042h 0 0 0832ch 04f88h 0f22bh 0b339h 07e1fh 01563h 0d3h 089h 0465eh
+ tstr 0 038h 0 0 0 0 0 0f821h 0 0 0 0 0 ; (1024 cycles)
+ tstr 0 0 0 0 0 0 0 -1 -1 -1 0d7h 0 -1 ; (38 cycles)
+ db 0f8h,0b4h,0eah,0a9h ; expected crc
+ dm '<adc,sbc> hl,<bc,de,hl,sp>$'
Added: testprogs/c128/z80/zex128/add16-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/add16-all.prg
===================================================================
--- testprogs/c128/z80/zex128/add16-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/add16-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/add16-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/add16-all.z80
===================================================================
--- testprogs/c128/z80/zex128/add16-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/add16-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; add hl,<bc,de,hl,sp> (19,456 cycles)
+add16: flag 0ffh ; flag mask
+ tstr 9 0 0 0 0c4a5h 0c4c7h 0d226h 0a050h 058eah 08566h 0c6h 0deh 09bc9h
+ tstr 030h 0 0 0 0 0 0 0f821h 0 0 0 0 0 ; (512 cycles)
+ tstr 0 0 0 0 0 0 0 -1 -1 -1 0d7h 0 -1 ; (38 cycles)
+ db 0d9h,0a4h,0cah,005h ; expected crc
+ dm 'add hl,<bc,de,hl,sp> (all)$'
Added: testprogs/c128/z80/zex128/add16.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/add16.prg
===================================================================
--- testprogs/c128/z80/zex128/add16.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/add16.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/add16.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/add16.z80
===================================================================
--- testprogs/c128/z80/zex128/add16.z80 (rev 0)
+++ testprogs/c128/z80/zex128/add16.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; add hl,<bc,de,hl,sp> (19,456 cycles)
+add16: flag 0c7h ; flag mask
+ tstr 9 0 0 0 0c4a5h 0c4c7h 0d226h 0a050h 058eah 08566h 0c6h 0deh 09bc9h
+ tstr 030h 0 0 0 0 0 0 0f821h 0 0 0 0 0 ; (512 cycles)
+ tstr 0 0 0 0 0 0 0 -1 -1 -1 0d7h 0 -1 ; (38 cycles)
+ db 089h,0fdh,0b6h,035h ; expected crc
+ dm 'add hl,<bc,de,hl,sp>$'
Added: testprogs/c128/z80/zex128/add16x-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/add16x-all.prg
===================================================================
--- testprogs/c128/z80/zex128/add16x-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/add16x-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/add16x-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/add16x-all.z80
===================================================================
--- testprogs/c128/z80/zex128/add16x-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/add16x-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; add ix,<bc,de,ix,sp> (19,456 cycles)
+add16x: flag 0ffh ; flag mask
+ tstr 0ddh 9 0 0 0ddach 0c294h 0635bh 033d3h 06a76h 0fa20h 094h 068h 036f5h
+ tstr 0 030h 0 0 0 0 0f821h 0 0 0 0 0 0 ; (512 cycles)
+ tstr 0 0 0 0 0 0 -1 0 -1 -1 0d7h 0 -1 ; (38 cycles)
+ db 0b1h,0dfh,08eh,0c0h ; expected crc
+ dm 'add ix,<bc,de,ix,sp> (all)$'
Added: testprogs/c128/z80/zex128/add16x.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/add16x.prg
===================================================================
--- testprogs/c128/z80/zex128/add16x.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/add16x.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/add16x.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/add16x.z80
===================================================================
--- testprogs/c128/z80/zex128/add16x.z80 (rev 0)
+++ testprogs/c128/z80/zex128/add16x.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; add ix,<bc,de,ix,sp> (19,456 cycles)
+add16x: flag 0c7h ; flag mask
+ tstr 0ddh 9 0 0 0ddach 0c294h 0635bh 033d3h 06a76h 0fa20h 094h 068h 036f5h
+ tstr 0 030h 0 0 0 0 0f821h 0 0 0 0 0 0 ; (512 cycles)
+ tstr 0 0 0 0 0 0 -1 0 -1 -1 0d7h 0 -1 ; (38 cycles)
+ db 0c1h,033h,079h,00bh ; expected crc
+ dm 'add ix,<bc,de,ix,sp>$'
Added: testprogs/c128/z80/zex128/add16y-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/add16y-all.prg
===================================================================
--- testprogs/c128/z80/zex128/add16y-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/add16y-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/add16y-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/add16y-all.z80
===================================================================
--- testprogs/c128/z80/zex128/add16y-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/add16y-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; add iy,<bc,de,iy,sp> (19,456 cycles)
+add16y: flag 0ffh ; flag mask
+ tstr 0fdh 9 0 0 0c7c2h 0f407h 051c1h 03e96h 00bf4h 0510fh 092h 01eh 071eah
+ tstr 0 030h 0 0 0 0f821h 0 0 0 0 0 0 0 ; (512 cycles)
+ tstr 0 0 0 0 0 -1 0 0 -1 -1 0d7h 0 -1 ; (38 cycles)
+ db 039h,0c8h,058h,09bh ; expected crc
+ dm 'add iy,<bc,de,iy,sp> (all)$'
Added: testprogs/c128/z80/zex128/add16y.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/add16y.prg
===================================================================
--- testprogs/c128/z80/zex128/add16y.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/add16y.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/add16y.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/add16y.z80
===================================================================
--- testprogs/c128/z80/zex128/add16y.z80 (rev 0)
+++ testprogs/c128/z80/zex128/add16y.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; add iy,<bc,de,iy,sp> (19,456 cycles)
+add16y: flag 0c7h ; flag mask
+ tstr 0fdh 9 0 0 0c7c2h 0f407h 051c1h 03e96h 00bf4h 0510fh 092h 01eh 071eah
+ tstr 0 030h 0 0 0 0f821h 0 0 0 0 0 0 0 ; (512 cycles)
+ tstr 0 0 0 0 0 -1 0 0 -1 -1 0d7h 0 -1 ; (38 cycles)
+ db 0e8h,081h,07bh,09eh ; expected crc
+ dm 'add iy,<bc,de,iy,sp>$'
Added: testprogs/c128/z80/zex128/alu8i-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/alu8i-all.prg
===================================================================
--- testprogs/c128/z80/zex128/alu8i-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/alu8i-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/alu8i-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/alu8i-all.z80
===================================================================
--- testprogs/c128/z80/zex128/alu8i-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/alu8i-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; aluop a,nn (28,672 cycles)
+alu8i: flag 0ffh ; flag mask
+ tstr 0c6h 0 0 0 009140h 07e3ch 07a67h 0df6dh 05b61h 00b29h 010h 066h 085b2h
+ tstr 038h 0 0 0 0 0 0 0 0 0 0 -1 0 ; (2048 cycles)
+ tstr 0 -1 0 0 0 0 0 0 0 0 0d7h 0 0 ; (14 cycles)
+ db 051h,0c1h,09ch,02eh ; expected crc
+ dm 'aluop a,nn (all)$'
Added: testprogs/c128/z80/zex128/alu8i.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/alu8i.prg
===================================================================
--- testprogs/c128/z80/zex128/alu8i.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/alu8i.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/alu8i.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/alu8i.z80
===================================================================
--- testprogs/c128/z80/zex128/alu8i.z80 (rev 0)
+++ testprogs/c128/z80/zex128/alu8i.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; aluop a,nn (28,672 cycles)
+alu8i: flag 0d7h ; flag mask
+ tstr 0c6h 0 0 0 009140h 07e3ch 07a67h 0df6dh 05b61h 00b29h 010h 066h 085b2h
+ tstr 038h 0 0 0 0 0 0 0 0 0 0 -1 0 ; (2048 cycles)
+ tstr 0 -1 0 0 0 0 0 0 0 0 0d7h 0 0 ; (14 cycles)
+ db 048h,079h,093h,060h ; expected crc
+ dm 'aluop a,nn$'
Added: testprogs/c128/z80/zex128/alu8r-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/alu8r-all.prg
===================================================================
--- testprogs/c128/z80/zex128/alu8r-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/alu8r-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/alu8r-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/alu8r-all.z80
===================================================================
--- testprogs/c128/z80/zex128/alu8r-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/alu8r-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; aluop a,<b,c,d,e,h,l,(hl),a> (753,664 cycles)
+alu8r: flag 0ffh ; flag mask
+ tstr 080h 0 0 0 0c53eh 0573ah 04c4dh msbt 0e309h 0a666h 0d0h 03bh 0adbbh
+ tstr 03fh 0 0 0 0 0 0 0 0 0 0 -1 0 ; (16 384 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 -1 -1 0d7h 0 0 ; (46 cycles)
+ db 006h,0c7h,0aah,08eh ; expected crc
+ dm 'aluop a,<b,c,d,e,h,l,(hl),a> (all)$'
Added: testprogs/c128/z80/zex128/alu8r.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/alu8r.prg
===================================================================
--- testprogs/c128/z80/zex128/alu8r.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/alu8r.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/alu8r.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/alu8r.z80
===================================================================
--- testprogs/c128/z80/zex128/alu8r.z80 (rev 0)
+++ testprogs/c128/z80/zex128/alu8r.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; aluop a,<b,c,d,e,h,l,(hl),a> (753,664 cycles)
+alu8r: flag 0d7h ; flag mask
+ tstr 080h 0 0 0 0c53eh 0573ah 04c4dh msbt 0e309h 0a666h 0d0h 03bh 0adbbh
+ tstr 03fh 0 0 0 0 0 0 0 0 0 0 -1 0 ; (16 384 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 -1 -1 0d7h 0 0 ; (46 cycles)
+ db 0feh,043h,0b0h,016h ; expected crc
+ dm 'aluop a,<b,c,d,e,h,l,(hl),a>$'
Added: testprogs/c128/z80/zex128/alu8rx-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/alu8rx-all.prg
===================================================================
--- testprogs/c128/z80/zex128/alu8rx-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/alu8rx-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/alu8rx-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/alu8rx-all.z80
===================================================================
--- testprogs/c128/z80/zex128/alu8rx-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/alu8rx-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; aluop a,<ixh,ixl,iyh,iyl> (376,832 cycles)
+alu8rx: flag 0ffh ; flag mask
+ tstr 0ddh 084h 0 0 0d6f7h 0c76eh 0accfh 02847h 022ddh 0c035h 0c5h 038h 0234bh
+ tstr 020h 039h 0 0 0 0 0 0 0 0 0 -1 0 ; (8 192 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 -1 -1 0d7h 0 0 ; (46 cycles)
+ db 0a8h,086h,0cch,044h ; expected crc
+ dm 'aluop a,<ixh,ixl,iyh,iyl> (all)$'
Added: testprogs/c128/z80/zex128/alu8rx.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/alu8rx.prg
===================================================================
--- testprogs/c128/z80/zex128/alu8rx.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/alu8rx.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/alu8rx.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/alu8rx.z80
===================================================================
--- testprogs/c128/z80/zex128/alu8rx.z80 (rev 0)
+++ testprogs/c128/z80/zex128/alu8rx.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; aluop a,<ixh,ixl,iyh,iyl> (376,832 cycles)
+alu8rx: flag 0d7h ; flag mask
+ tstr 0ddh 084h 0 0 0d6f7h 0c76eh 0accfh 02847h 022ddh 0c035h 0c5h 038h 0234bh
+ tstr 020h 039h 0 0 0 0 0 0 0 0 0 -1 0 ; (8 192 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 -1 -1 0d7h 0 0 ; (46 cycles)
+ db 0a4h,002h,06dh,05ah ; expected crc
+ dm 'aluop a,<ixh,ixl,iyh,iyl>$'
Added: testprogs/c128/z80/zex128/alu8x-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/alu8x-all.prg
===================================================================
--- testprogs/c128/z80/zex128/alu8x-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/alu8x-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/alu8x-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/alu8x-all.z80
===================================================================
--- testprogs/c128/z80/zex128/alu8x-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/alu8x-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; aluop a,(<ix,iy>+1) (229,376 cycles)
+alu8x: flag 0ffh ; flag mask
+ tstr 0ddh 086h 1 0 090b7h msbt-1 msbt-1 032fdh 0406eh 0c1dch 045h 06eh 0e5fah
+ tstr 020h 038h 0 0 0 1 1 0 0 0 0 -1 0 ; (16 384 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 0 0 0d7h 0 0 ; (14 cycles)
+ db 0d3h,0f2h,0d7h,04ah ; expected crc
+ dm 'aluop a,(<ix,iy>+1) (all)$'
Added: testprogs/c128/z80/zex128/alu8x.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/alu8x.prg
===================================================================
--- testprogs/c128/z80/zex128/alu8x.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/alu8x.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/alu8x.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/alu8x.z80
===================================================================
--- testprogs/c128/z80/zex128/alu8x.z80 (rev 0)
+++ testprogs/c128/z80/zex128/alu8x.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; aluop a,(<ix,iy>+1) (229,376 cycles)
+alu8x: flag 0d7h ; flag mask
+ tstr 0ddh 086h 1 0 090b7h msbt-1 msbt-1 032fdh 0406eh 0c1dch 045h 06eh 0e5fah
+ tstr 020h 038h 0 0 0 1 1 0 0 0 0 -1 0 ; (16 384 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 0 0 0d7h 0 0 ; (14 cycles)
+ db 0e8h,049h,067h,06eh ; expected crc
+ dm 'aluop a,(<ix,iy>+1)$'
Added: testprogs/c128/z80/zex128/bitx-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/bitx-all.prg
===================================================================
--- testprogs/c128/z80/zex128/bitx-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/bitx-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/bitx-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/bitx-all.z80
===================================================================
--- testprogs/c128/z80/zex128/bitx-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/bitx-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; bit n,(<ix,iy>+1) (2048 cycles)
+bitx: flag 0ffh ; flag mask
+ tstr 0ddh 0cbh 1 046h 02075h msbt-1 msbt-1 03cfch 0a79ah 03d74h 051h 027h 0ca14h
+ tstr 020h 0 0 038h 0 0 0 0 0 0 053h 0 0 ; (256 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 0 0 0 0 0 ; (8 cycles)
+ db 083h,053h,04eh,0e1h ; expected crc
+ dm 'bit n,(<ix,iy>+1) (all)$'
Added: testprogs/c128/z80/zex128/bitx.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/bitx.prg
===================================================================
--- testprogs/c128/z80/zex128/bitx.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/bitx.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/bitx.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/bitx.z80
===================================================================
--- testprogs/c128/z80/zex128/bitx.z80 (rev 0)
+++ testprogs/c128/z80/zex128/bitx.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; bit n,(<ix,iy>+1) (2048 cycles)
+bitx: flag 053h ; flag mask
+ tstr 0ddh 0cbh 1 046h 02075h msbt-1 msbt-1 03cfch 0a79ah 03d74h 051h 027h 0ca14h
+ tstr 020h 0 0 038h 0 0 0 0 0 0 053h 0 0 ; (256 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 0 0 0 0 0 ; (8 cycles)
+ db 0a8h,0eeh,008h,067h ; expected crc
+ dm 'bit n,(<ix,iy>+1)$'
Added: testprogs/c128/z80/zex128/bitz80-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/bitz80-all.prg
===================================================================
--- testprogs/c128/z80/zex128/bitz80-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/bitz80-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/bitz80-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/bitz80-all.z80
===================================================================
--- testprogs/c128/z80/zex128/bitz80-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/bitz80-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; bit n,<b,c,d,e,h,l,(hl),a> (49,152 cycles)
+bitz80: flag 0ffh ; flag mask
+ tstr 0cbh 040h 0 0 03ef1h 09dfch 07acch msbt 0be61h 07a86h 050h 024h 01998h
+ tstr 0 03fh 0 0 0 0 0 0 0 0 053h 0 0 ; (1024 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 -1 -1 0 -1 0 ; (48 cycles)
+ db 05eh,002h,00eh,098h ; expected crc
+ dm 'bit n,<b,c,d,e,h,l,(hl),a> (all)$'
Added: testprogs/c128/z80/zex128/bitz80.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/bitz80.prg
===================================================================
--- testprogs/c128/z80/zex128/bitz80.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/bitz80.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/bitz80.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/bitz80.z80
===================================================================
--- testprogs/c128/z80/zex128/bitz80.z80 (rev 0)
+++ testprogs/c128/z80/zex128/bitz80.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; bit n,<b,c,d,e,h,l,(hl),a> (49,152 cycles)
+bitz80: flag 053h ; flag mask
+ tstr 0cbh 040h 0 0 03ef1h 09dfch 07acch msbt 0be61h 07a86h 050h 024h 01998h
+ tstr 0 03fh 0 0 0 0 0 0 0 0 053h 0 0 ; (1024 cycles)
+ tstr 0 0 0 0 0ffh 0 0 0 -1 -1 0 -1 0 ; (48 cycles)
+ db 07bh,055h,0e6h,0c8h ; expected crc
+ dm 'bit n,<b,c,d,e,h,l,(hl),a>$'
Added: testprogs/c128/z80/zex128/cpd1-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/cpd1-all.prg
===================================================================
--- testprogs/c128/z80/zex128/cpd1-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/cpd1-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/cpd1-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/cpd1-all.z80
===================================================================
--- testprogs/c128/z80/zex128/cpd1-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/cpd1-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; cpd<r> (1) (6144 cycles)
+cpd1: flag 0ffh ; flag mask
+ tstr 0edh 0a9h 0 0 0c7b6h 072b4h 018f6h msbt+17 08dbdh 1 0c0h 030h 094a3h
+ tstr 0 010h 0 0 0 0 0 0 0 10 0 -1 0 ; (1024 cycles)
+ tstr 0 0 0 0 0 0 0 0 0 0 0d7h 0 0 ; (6 cycles)
+ db 013h,04bh,062h,02dh ; expected crc
+ dm 'cpd<r> (all)$'
Added: testprogs/c128/z80/zex128/cpd1.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/cpd1.prg
===================================================================
--- testprogs/c128/z80/zex128/cpd1.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/cpd1.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/cpd1.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/cpd1.z80
===================================================================
--- testprogs/c128/z80/zex128/cpd1.z80 (rev 0)
+++ testprogs/c128/z80/zex128/cpd1.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; cpd<r> (1) (6144 cycles)
+cpd1: flag 0d7h ; flag mask
+ tstr 0edh 0a9h 0 0 0c7b6h 072b4h 018f6h msbt+17 08dbdh 1 0c0h 030h 094a3h
+ tstr 0 010h 0 0 0 0 0 0 0 10 0 -1 0 ; (1024 cycles)
+ tstr 0 0 0 0 0 0 0 0 0 0 0d7h 0 0 ; (6 cycles)
+ db 0a8h,07eh,06ch,0fah ; expected crc
+ dm 'cpd<r>$'
Added: testprogs/c128/z80/zex128/cpi1-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/cpi1-all.prg
===================================================================
--- testprogs/c128/z80/zex128/cpi1-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/cpi1-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/cpi1-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/cpi1-all.z80
===================================================================
--- testprogs/c128/z80/zex128/cpi1-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/cpi1-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; cpi<r> (1) (6144 cycles)
+cpi1: flag 0ffh ; flag mask
+ tstr 0edh 0a1h 0 0 04d48h 0af4ah 0906bh msbt 04e71h 1 093h 06ah 0907ch
+ tstr 0 010h 0 0 0 0 0 0 0 10 0 -1 0 ; (1024 cycles)
+ tstr 0 0 0 0 0 0 0 0 0 0 0d7h 0 0 ; (6 cycles)
+ db 02dh,0a4h,02dh,019h ; expected crc
+ dm 'cpi<r> (all)$'
Added: testprogs/c128/z80/zex128/cpi1.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/cpi1.prg
===================================================================
--- testprogs/c128/z80/zex128/cpi1.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/cpi1.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/cpi1.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/cpi1.z80
===================================================================
--- testprogs/c128/z80/zex128/cpi1.z80 (rev 0)
+++ testprogs/c128/z80/zex128/cpi1.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; cpi<r> (1) (6144 cycles)
+cpi1: flag 0d7h ; flag mask
+ tstr 0edh 0a1h 0 0 04d48h 0af4ah 0906bh msbt 04e71h 1 093h 06ah 0907ch
+ tstr 0 010h 0 0 0 0 0 0 0 10 0 -1 0 ; (1024 cycles)
+ tstr 0 0 0 0 0 0 0 0 0 0 0d7h 0 0 ; (6 cycles)
+ db 006h,0deh,0b3h,056h ; expected crc
+ dm 'cpi<r>$'
Added: testprogs/c128/z80/zex128/daaop-all.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/daaop-all.prg
===================================================================
--- testprogs/c128/z80/zex128/daaop-all.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/daaop-all.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/daaop-all.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/daaop-all.z80
===================================================================
--- testprogs/c128/z80/zex128/daaop-all.z80 (rev 0)
+++ testprogs/c128/z80/zex128/daaop-all.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; <daa,cpl,scf,ccf>
+daaop: flag 0ffh ; flag mask
+ tstr 027h 0 0 0 02141h 009fah 01d60h 0a559h 08d5bh 09079h 004h 08eh 0299dh
+ tstr 018h 0 0 0 0 0 0 0 0 0 0d7h -1 0 ; (65 536 cycles)
+ tstr 0 0 0 0 0 0 0 0 0 0 0 0 0 ; (1 cycle)
+ db 06dh,02dh,0d2h,013h ; expected crc
+ dm '<daa,cpl,scf,ccf> (all)$'
Added: testprogs/c128/z80/zex128/daaop.prg
===================================================================
(Binary files differ)
Index: testprogs/c128/z80/zex128/daaop.prg
===================================================================
--- testprogs/c128/z80/zex128/daaop.prg 2024-04-19 13:48:59 UTC (rev 45136)
+++ testprogs/c128/z80/zex128/daaop.prg 2024-04-24 23:35:14 UTC (rev 45137)
Property changes on: testprogs/c128/z80/zex128/daaop.prg
___________________________________________________________________
Added: svn:mime-type
## -0,0 +1 ##
+application/octet-stream
\ No newline at end of property
Added: testprogs/c128/z80/zex128/daaop.z80
===================================================================
--- testprogs/c128/z80/zex128/daaop.z80 (rev 0)
+++ testprogs/c128/z80/zex128/daaop.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,7 @@
+; <daa,cpl,scf,ccf>
+daaop: flag 0d7h ; flag mask
+ tstr 027h 0 0 0 02141h 009fah 01d60h 0a559h 08d5bh 09079h 004h 08eh 0299dh
+ tstr 018h 0 0 0 0 0 0 0 0 0 0d7h -1 0 ; (65 536 cycles)
+ tstr 0 0 0 0 0 0 0 0 0 0 0 0 0 ; (1 cycle)
+ db 09bh,04bh,0a6h,075h ; expected crc
+ dm '<daa,cpl,scf,ccf>$'
Added: testprogs/c128/z80/zex128/end.z80
===================================================================
--- testprogs/c128/z80/zex128/end.z80 (rev 0)
+++ testprogs/c128/z80/zex128/end.z80 2024-04-24 23:35:14 UTC (rev 45137)
@@ -0,0 +1,654 @@
+crcval: equ 0fah ;4
+
+; machine state before test (needs to be at predictably constant address)
+msbt: equ 0103h ;14
+spbt: equ msbt+14 ;2
+msbthi: equ msbt >> 8
+msbtlo: equ msbt & 0ffh
+
+base: equ 0400h
+;cntbit: ds 1
+;cntbyt: ds 2
+cntbit: equ base+2 ;1
+cntbyt: equ cntbit+1 ;2
+;shfbit: ds 1
+;shfbyt: ds 2
+shfbit: equ cntbyt+2 ;1
+shfbyt: equ shfbit+1 ;2
+;counter: ds 40
+;shifter: ds 40
+counter: equ shfbyt+2 ;40
+shifter: equ counter+40 ;40
+; machine state after test
+;msat: ds 14 ; memop,iy,ix,hl,de,bc,af
+;spat: ds 2 ; stack pointer after test
+msat: equ shifter+40 ;14 ; memop,iy,ix,hl,de,bc,af
+spat: equ msat+14 ;2 ; stack pointer after test
+; ZMAC/MAXAM doesn't like ':' after label with EQUs
+flgsat: equ spat-2 ; flags
+;spsav: ds 2 ; saved stack pointer
+spsav: equ spat+2 ;2 ; saved stack pointer
+
+; start test pointed to by (hl)
+stt: ld sp,04ffh
+ ld a,02ah
+ ld (msbt+16),a
+ ld a,006h
+ ld (msbt+17),a
+ ld hl,table+20
+ ld de,counter
+ call initmask
+ ld hl,table+20+20
+ ld de,shifter
+ call initmask
+ ld hl,shifter
+ ld (hl),1 ; first bit
+ ld hl,table
+ ld de,iut ; copy initial instruction under test
+ ld bc,4
+ ldir
+ ld de,msbt ; copy initial machine state
+ ld bc,16
+ ldir
+
+;initcrc: ld hl,crcval
+; ld a,0ffh
+; ld b,4
+;icrclp: ld (hl),a
+; inc hl
+; dec b
+; jp nz,icrclp
+
+; test loop
+tlp: ld a,(iut)
+ cp 076h ; pragmatically avoid halt intructions
+ jp z,tlp2
+ and 0dfh
+ cp 0ddh
+ jp nz,tlp1
+ ld a,(iut+1)
+ cp 076h
+tlp1: call nz,test ; execute the test instruction
+tlp2: call count ; increment the counter
+ call nz,shift ; shift the scan bit
+ jp z,tlp3 ; done if shift returned NZ
+ jp 0ffe0h ;exit
+
+tlp3: ld a,1 ; initialise count and shift scanners
+ ld (cntbit),a
+ ld (shfbit),a
+ ld hl,counter
+ ld (cntbyt),hl
+ ld hl,shifter
+ ld (shfbyt),hl
+
+ ld b,4 ; bytes in iut field
+ ld hl,table
+ ld de,iut
+ call setup ; setup iut
+ ld b,16 ; bytes in machine state
+ ld de,msbt
+ call setup ; setup machine state
+ jp tlp
+
+; setup a field of the test case
+; b = number of bytes
+; hl = pointer to base case
+; de = destination
+setup: call subyte
+ inc hl
+ dec b
+ jp nz,setup
+ ret
+
+subyte: push bc
+ push de
+ push hl
+ ld c,(hl) ; get base byte
+ ld de,20
+ add hl,de ; point to incmask
+ ld a,(hl)
+ cp 0
+ jp z,subshf
+ ld b,8 ; 8 bits
+subclp: rrca
+ push af
+ ld a,0
+ call c,nxtcbit ; get next counter bit if mask bit was set
+ xor c ; flip bit if counter bit was set
+ rrca
+ ld c,a
+ pop af
+ dec b
+ jp nz,subclp
+ ld b,8
+subshf: ld de,20
+ add hl,de ; point to shift mask
+ ld a,(hl)
+ cp 0
+ jp z,substr
+ ld b,8 ; 8 bits
+sbshf1: rrca
+ push af
+ ld a,0
+ call c,nxtsbit ; get next shifter bit if mask bit was set
+ xor c ; flip bit if shifter bit was set
+ rrca
+ ld c,a
+ pop af
+ dec b
+ jp nz,sbshf1
+substr: pop hl
+ pop de
+ ld a,c
+ ld (de),a ; mangled byte to destination
+ inc de
+ pop bc
+ ret
+
+; get next counter bit in low bit of a
+nxtcbit: push bc
+ push hl
+ ld hl,(cntbyt)
+ ld b,(hl)
+ ld hl,cntbit
+ ld a,(hl)
+ ld c,a
+ rlca
+ ld (hl),a
+ cp 1
+ jp nz,ncb1
+ ld hl,(cntbyt)
+ inc hl
+ ld (cntbyt),hl
+ncb1: ld a,b
+ and c
+ pop hl
+ pop bc
+ ret z
+ ld a,1
+ ret
+
+; get next shifter bit in low bit of a
+nxtsbit: push bc
+ push hl
+ ld hl,(shfbyt)
+ ld b,(hl)
+ ld hl,shfbit
+ ld a,(hl)
+ ld c,a
+ rlca
+ ld (hl),a
+ cp 1
+ jp nz,nsb1
+ ld hl,(shfbyt)
+ inc hl
+ ld (shfbyt),hl
+nsb1: ld a,b
+ and c
+ pop hl
+ pop bc
+ ret z
+ ld a,1
+ ret
+
+; initialise counter or shifter
+; de = pointer to work area for counter or shifter
+; hl = pointer to mask
+initmask:
+ push de
+ ex de,hl
+ ld bc,20+20
+; clear memory at hl, bc bytes
+clrmem: push de
+; push hl
+ ld (hl),0
+ ld d,h
+ ld e,l
+ inc de
+ dec bc
+ ldir
+; pop de
+ pop hl
+ ld b,20 ; byte counter
+ ld c,1 ; first bit
+ ld d,0 ; bit counter
+imlp: ld e,(hl)
+imlp1: ld a,e
+ and c
+ jp z,imlp2
+ inc d
+imlp2: ld a,c
+ rlca
+ ld c,a
+ cp 1
+ jp nz,imlp1
+ inc hl
+ dec b
+ jp nz,imlp
+; got number of 1-bits in mask in reg d
+ ld a,d
+ and 0f8h
+ rrca
+ rrca
+ rrca ; divide by 8 (get byte offset)
+ ld l,a
+ ld h,0
+ ld a,d
+ and 7 ; bit offset
+ inc a
+ ld b,a
+ ld a,080h
+imlp3: rlca
+ dec b
+ jp nz,imlp3
+ pop de
+ add hl,de
+ ld de,20
+ add hl,de
+ ld (hl),a
+ ret
+
+; multi-byte counter
+count: push bc
+ push de
+ push hl
+ ld hl,counter ; 20 byte counter starts here
+ ld de,20 ; somewhere in here is the stop bit
+ ex de,hl
+ add hl,de
+ ex de,hl
+cntlp: inc (hl)
+ ld a,(hl)
+ cp 0
+ jp z,cntlp1 ; overflow to next byte
+ ld b,a
+ ld a,(de)
+ and b ; test for terminal value
+ jp z,cntend
+ ld (hl),0 ; reset to zero
+cntend: pop bc
+ pop de
+ pop hl
+ ret
+
+cntlp1: inc hl
+ inc de
+ jp cntlp
+
+
+; multi-byte shifter
+shift: push bc
+ push de
+ push hl
+ ld hl,shifter ; 20 byte shift register starts here
+ ld de,20 ; somewhere in here is the stop bit
+ ex de,hl
+ add hl,de
+ ex de,hl
+shflp: ld a,(hl)
+ or a
+ jp z,shflp1
+ ld b,a
+ ld a,(de)
+ and b
+ jp nz,shlpe
+ ld a,b
+ rlca
+ cp 1
+ jp nz,shflp2
+ ld (hl),0
+ inc hl
+ inc de
+shflp2: ld (hl),a
+ xor a ; set Z
+shlpe: pop hl
+ pop de
+ pop bc
+ ret
+shflp1: inc hl
+ inc de
+ jp shflp
+
+; test harness
+test: push af
+ push bc
+ push de
+ push hl
+ di ; disable interrupts
+ ld (spsav),sp ; save stack pointer
+ ld sp,msbt+2 ; point to test-case machine state
+ pop iy ; and load all regs
+ pop ix
+ pop hl
+ pop de
+ pop bc
+ pop af
+ ld sp,(spbt)
+iut: ds 4 ; max 4 byte instruction under test
+ ld (spat),sp ; save stack pointer
+ ld sp,spat
+ push af ; save other registers
+ push bc
+ push de
+ push hl
+ push ix
+ push iy
+ ld sp,(spsav) ; restore stack pointer
+ ei ; enable interrupts
+ ld hl,(msbt) ; copy memory operand
+ ld (msat),hl
+ ld hl,flgsat ; flags after test
+ ld a,(hl)
+ and flgmsk ; mask-out irrelevant bits (self-modified code!)
+ ld (hl),a
+
+ ld b,16 ; total of 16 bytes of state
+ ld de,msat
+tcrc: ld a,(de)
+ inc de
+
+; 32-bit crc routine
+; entry: a contains next byte, hl points to crc
+; exit: crc updated
+updcrc: push bc
+ push de
+ ld hl,crcval+3
+ xor (hl) ; xor with new byte
+ ld l,a
+ ld h,0
+ add hl,hl ; use result as index into table of 4 byte entries
+ add hl,hl
+ ex de,hl
+ ld hl,crctab
+ add hl,de ; point to selected entry in crctab
+ ex de,hl
+ ld hl,crcval
+ ld a,(de)
+ ld b,(hl)
+ ld (hl),a
+ inc de
+ inc hl
+ ld a,(de)
+ xor b
+ ld b,(hl)
+ ld (hl),a
+ inc de
+ inc hl
+ ld a,(de)
+ xor b
+ ld b,(hl)
+ ld (hl),a
+ inc de
+ inc hl
+ ld a,(de)
+ xor b
+ ld (hl),a
+ pop de
+ pop bc
+
+ dec b
+ jp nz,tcrc
+ pop hl
+ pop de
+ pop bc
+ pop af
+ ret
+
+crctab: db 000h,000h,000h,000h
+ db 077h,007h,030h,096h
+ db 0eeh,00eh,061h,02ch
+ db 099h,009h,051h,0bah
+ db 007h,06dh,0c4h,019h
+ db 070h,06ah,0f4h,08fh
+ db 0e9h,063h,0a5h,035h
+ db 09eh,064h,095h,0a3h
+ db 00eh,0dbh,088h,032h
+ db 079h,0dch,0b8h,0a4h
+ db 0e0h,0d5h,0e9h,01eh
+ db 097h,0d2h,0d9h,088h
+ db 009h,0b6h,04ch,02bh
+ db 07eh,0b1h,07ch,0bdh
+ db 0e7h,0b8h,02dh,007h
+ db 090h,0bfh,01dh,091h
+ db 01dh,0b7h,010h,064h
+ db 06ah,0b0h,020h,0f2h
+ db 0f3h,0b9h,071h,048h
+ db 084h,0beh,041h,0deh
+ db 01ah,0dah,0d4h,07dh
+ db 06dh,0ddh,0e4h,0ebh
+ db 0f4h,0d4h,0b5h,051h
+ db 083h,0d3h,085h,0c7h
+ db 013h,06ch,098h,056h
+ db 064h,06bh,0a8h,0c0h
+ db 0fdh,062h,0f9h,07ah
+ db 08ah,065h,0c9h,0ech
+ db 014h,001h,05ch,04fh
+ db 063h,006h,06ch,0d9h
+ db 0fah,00fh,03dh,063h
+ db 08dh,008h,00dh,0f5h
+ db 03bh,06eh,020h,0c8h
+ db 04ch,069h,010h,05eh
+ db 0d5h,060h,041h,0e4h
+ db 0a2h,067h,071h,072h
+ db 03ch,003h,0e4h,0d1h
+ db 04bh,004h,0d4h,047h
+ db 0d2h,00dh,085h,0fdh
+ db 0a5h,00ah,0b5h,06bh
+ db 035h,0b5h,0a8h,0fah
+ db 042h,0b2h,098h,06ch
+ db 0dbh,0bbh,0c9h,0d6h
+ db 0ach,0bch,0f9h,040h
+ db 032h,0d8h,06ch,0e3h
+ db 045h,0dfh,05ch,075h
+ db 0dch,0d6h,00dh,0cfh
+ db 0abh,0d1h,03dh,059h
+ db 026h,0d9h,030h,0ach
+ db 051h,0deh,000h,03ah
+ db 0c8h,0d7h,051h,080h
+ db 0bfh,0d0h,061h,016h
+ db 021h,0b4h,0f4h,0b5h
+ db 056h,0b3h,0c4h,023h
+ db 0cfh,0bah,095h,099h
+ db 0b8h,0bdh,0a5h,00fh
+ db 028h,002h,0b8h,09eh
+ db 05fh,005h,088h,008h
+ db 0c6h,00ch,0d9h,0b2h
+ db 0b1h,00bh,0e9h,024h
+ db 02fh,06fh,07ch,087h
+ db 058h,068h,04ch,011h
+ db 0c1h,061h,01dh,0abh
+ db 0b6h,066h,02dh,03dh
+ db 076h,0dch,041h,090h
+ db 001h,0dbh,071h,006h
+ db 098h,0d2h,020h,0bch
+ db 0efh,0d5h,010h,02ah
+ db 071h,0b1h,085h,089h
+ db 006h,0b6h,0b5h,01fh
+ db 09fh,0bfh,0e4h,0a5h
+ db 0e8h,0b8h,0d4h,033h
+ db 078h,007h,0c9h,0a2h
+ db 00fh,000h,0f9h,034h
+ db 096h,009h,0a8h,08eh
+ db 0e1h,00eh,098h,018h
+ db 07fh,06ah,00dh,0bbh
+ db 008h,06dh,03dh,02dh
+ db 091h,064h,06ch,097h
+ db 0e6h,063h,05ch,001h
+ db 06bh,06bh,051h,0f4h
+ db 01ch,06ch,061h,062h
+ db 085h,065h,030h,0d8h
+ db 0f2h,062h,000h,04eh
+ db 06ch,006h,095h,0edh
+ db 01bh,001h,0a5h,07bh
+ db 082h,008h,0f4h,0c1h
+ db 0f5h,00fh,0c4h,057h
+ db 065h,0b0h,0d9h,0c6h
+ db 012h,0b7h,0e9h,050h
+ db 08bh,0beh,0b8h,0eah
+ db 0fch,0b9h,088h,07ch
+ db 062h,0ddh,01dh,0dfh
+ db 015h,0dah,02dh,049h
+ db 08ch,0d3h,07ch,0f3h
+ db 0fbh,0d4h,04ch,065h
+ db 04dh,0b2h,061h,058h
+ db 03ah,0b5h,051h,0ceh
+ db 0a3h,0bch,000h,074h
+ db 0d4h,0bbh,030h,0e2h
+ db 04ah,0dfh,0a5h,041h
+ db 03dh,0d8h,095h,0d7h
+ db 0a4h,0d1h,0c4h,06dh
+ db 0d3h,0d6h,0f4h,0fbh
+ db 043h,069h,0e9h,06ah
+ db 034h,06eh,0d9h,0fch
+ db 0adh,067h,088h,046h
+ db 0dah,060h,0b8h,0d0h
+ db 044h,004h,02dh,073h
+ db 033h,003h,01dh,0e5h
+ db 0aah,00ah,04ch,05fh
+ db 0ddh,00dh,07ch,0c9h
+ db 050h,005h,071h,03ch
+ db 027h,002h,041h,0aah
+ db 0beh,00bh,010h,010h
+ db 0c9h,00ch,020h,086h
+ db 057h,068h,0b5h,025h
+ db 020h,06fh,085h,0b3h
+ db 0b9h,066h,0d4h,009h
+ db 0ceh,061h,0e4h,09fh
+ db 05eh,0deh,0f9h,00eh
+ db 029h,0d9h,0c9h,098h
+ db 0b0h,0d0h,098h,022h
+ db 0c7h,0d7h,0a8h,0b4h
+ db 059h,0b3h,03dh,017h
+ db 02eh,0b4h,00dh,081h
+ db 0b7h,0bdh,05ch,03bh
+ db 0c0h,0bah,06ch,0adh
+ db 0edh,0b8h,083h,020h
+ db 09ah,0bfh,0b3h,0b6h
+ db 003h,0b6h,0e2h,00ch
+ db 074h,0b1h,0d2h,09ah
+ db 0eah,0d5h,047h,039h
+ db 09dh,0d2h,077h,0afh
+ db 004h,0dbh,026h,015h
+ db 073h,0dch,016h,083h
+ db 0e3h,063h,00bh,012h
+ db 094h,064h,03bh,084h
+ db 00dh,06dh,06ah,03eh
+ db 07ah,06ah,05ah,0a8h
+ db 0e4h,00eh,0cfh,00bh
+ db 093h,009h,0ffh,09dh
+ db 00ah,000h,0aeh,027h
+ db 07dh,007h,09eh,0b1h
+ db 0f0h,00fh,093h,044h
+ db 087h,008h,0a3h,0d2h
+ db 01eh,001h,0f2h,068h
+ db 069h,006h,0c2h,0feh
+ db 0f7h,062h,057h,05dh
+ db 080h,065h,067h,0cbh
+ db 019h,06ch,036h,071h
+ db 06eh,06bh,006h,0e7h
+ db 0feh,0d4h,01bh,076h
+ db 089h,0d3h,02bh,0e0h
+ db 010h,0dah,07ah,05ah
+ db 067h,0ddh,04ah,0cch
+ db 0f9h,0b9h,0dfh,06fh
+ db 08eh,0beh,0efh,0f9h
+ db 017h,0b7h,0beh,043h
+ db 060h,0b0h,08eh,0d5h
+ db 0d6h,0d6h,0a3h,0e8h
+ db 0a1h,0d1h,093h,07eh
+ db 038h,0d8h,0c2h,0c4h
+ db 04fh,0dfh,0f2h,052h
+ db 0d1h,0bbh,067h,0f1h
+ db 0a6h,0bch,057h,067h
+ db 03fh,0b5h,006h,0ddh
+ db 048h,0b2h,036h,04bh
+ db 0d8h,00dh,02bh,0dah
+ db 0afh,00ah,01bh,04ch
+ db 036h,003h,04ah,0f6h
+ db 041h,004h,07ah,060h
+ db 0dfh,060h,0efh,0c3h
+ db 0a8h,067h,0dfh,055h
+ db 031h,06eh,08eh,0efh
+ db 046h,069h,0beh,079h
+ db 0cbh,061h,0b3h,08ch
+ db 0bch,066h,083h,01ah
+ db 025h,06fh,0d2h,0a0h
+ db 052h,068h,0e2h,036h
+ db 0cch,00ch,077h,095h
+ db 0bbh,00bh,047h,003h
+ db 022h,002h,016h,0b9h
+ db 055h,005h,026h,02fh
+ db 0c5h,0bah,03bh,0beh
+ db 0b2h,0bdh,00bh,028h
+ db 02bh,0b4h,05ah,092h
+ db 05ch,0b3h,06ah,004h
+ db 0c2h,0d7h,0ffh,0a7h
+ db 0b5h,0d0h,0cfh,031h
+ db 02ch,0d9h,09eh,08bh
+ db 05bh,0deh,0aeh,01dh
+ db 09bh,064h,0c2h,0b0h
+ db 0ech,063h,0f2h,026h
+ db 075h,06ah,0a3h,09ch
+ db 002h,06dh,093h,00ah
+ db 09ch,009h,006h,0a9h
+ db 0ebh,00eh,036h,03fh
+ db 072h,007h,067h,085h
+ db 005h,000h,057h,013h
+ db 095h,0bfh,04ah,082h
+ db 0e2h,0b8h,07ah,014h
+ db 07bh,0b1h,02bh,0aeh
+ db 00ch,0b6h,01bh,038h
+ db 092h,0d2h,08eh,09bh
+ db 0e5h,0d5h,0beh,00dh
+ db 07ch,0dch,0efh,0b7h
+ db 00bh,0dbh,0dfh,021h
+ db 086h,0d3h,0d2h,0d4h
+ db 0f1h,0d4h,0e2h,042h
+ db 068h,0ddh,0b3h,0f8h
+ db 01fh,0dah,083h,06eh
+ db 081h,0beh,016h,0cdh
+ db 0f6h,0b9h,026h,05bh
+ db 06fh,0b0h,077h,0e1h
+ db 018h,0b7h,047h,077h
+ db 088h,008h,05ah,0e6h
+ db 0ffh,00fh,06ah,070h
+ db 066h,006h,03bh,0cah
+ db 011h,001h,00bh,05ch
+ db 08fh,065h,09eh,0ffh
+ db 0f8h,062h,0aeh,069h
+ db 061h,06bh,0ffh,0d3h
+ db 016h,06ch,0cfh,045h
+ db 0a0h,00ah,0e2h,078h
+ db 0d7h,00dh,0d2h,0eeh
+ db 04eh,004h,083h,054h
+ db 039h,003h,0b3h,0c2h
+ db 0a7h,067h,026h,061h
+ db 0d0h,060h,016h,0f7h
+ db 049h,069h,047h,04dh
+ db 03eh,06eh,077h,0dbh
+ db 0aeh,0d1h,06ah,04ah
+ db 0d9h...
[truncated message content] |
|
From: <co...@us...> - 2024-04-19 13:49:01
|
Revision: 45136
http://sourceforge.net/p/vice-emu/code/45136
Author: compyx
Date: 2024-04-19 13:48:59 +0000 (Fri, 19 Apr 2024)
Log Message:
-----------
Gtk3: remove _setenv(LANG=C) hack
Enables case-insensitive sorting on Windows, fixing bug #2015, feature request
#429, maybe. The comment accompanying the hack mentioned it was there to avoid
issues with the (VTE) monitor on 32-bit Windows, so we'll see if that comment
is still valid after all our hacking of VTE.
Modified Paths:
--------------
trunk/vice/src/arch/gtk3/gtk3main.c
Modified: trunk/vice/src/arch/gtk3/gtk3main.c
===================================================================
--- trunk/vice/src/arch/gtk3/gtk3main.c 2024-04-18 11:27:24 UTC (rev 45135)
+++ trunk/vice/src/arch/gtk3/gtk3main.c 2024-04-19 13:48:59 UTC (rev 45136)
@@ -55,22 +55,6 @@
int main(int argc, char **argv)
{
/*
- * Ugly hack to make the VTE-based monitor behave on 32-bit Windows.
- *
- * Without this, the monitor outputs all sorts of non-ASCII glyphs resulting
- * in either weird tokens and a red background or a nice crash.
- *
- * The Windows C runtime doesn't actually use this env var, but Gtk/GLib
- * does. Ofcourse properly fixing the monitor code would be better, but I've
- * spent all day trying to figure this out, so it'll have to do for now.
- *
- * --Compyx
- */
-#ifdef WINDOWS_COMPILE
- _putenv("LANG=C");
-#endif
-
- /*
* Each thread in VICE, including main, needs to call this before anything
* else. Basically this is for init COM on Windows.
*/
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <co...@us...> - 2024-04-18 11:27:29
|
Revision: 45135
http://sourceforge.net/p/vice-emu/code/45135
Author: compyx
Date: 2024-04-18 11:27:24 +0000 (Thu, 18 Apr 2024)
Log Message:
-----------
rub out trailing whitespace
Modified Paths:
--------------
trunk/vice/src/arch/shared/archdep_cbmfont.c
Modified: trunk/vice/src/arch/shared/archdep_cbmfont.c
===================================================================
--- trunk/vice/src/arch/shared/archdep_cbmfont.c 2024-04-18 09:27:21 UTC (rev 45134)
+++ trunk/vice/src/arch/shared/archdep_cbmfont.c 2024-04-18 11:27:24 UTC (rev 45135)
@@ -195,7 +195,7 @@
font_files[i]);
} else {
int result = AddFontResourceA(path);
-
+
if (result > 0) {
font_registered = true;
log_message(LOG_DEFAULT,
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <co...@us...> - 2024-04-18 09:27:23
|
Revision: 45134
http://sourceforge.net/p/vice-emu/code/45134
Author: compyx
Date: 2024-04-18 09:27:21 +0000 (Thu, 18 Apr 2024)
Log Message:
-----------
terminate trailing whitespace
Modified Paths:
--------------
trunk/vice/src/arch/shared/archdep_cbmfont.c
Modified: trunk/vice/src/arch/shared/archdep_cbmfont.c
===================================================================
--- trunk/vice/src/arch/shared/archdep_cbmfont.c 2024-04-18 09:07:17 UTC (rev 45133)
+++ trunk/vice/src/arch/shared/archdep_cbmfont.c 2024-04-18 09:27:21 UTC (rev 45134)
@@ -195,7 +195,7 @@
font_files[i]);
} else {
int result = AddFontResourceA(path);
-
+
if (result > 0) {
font_registered = true;
log_message(LOG_DEFAULT,
This was sent by the SourceForge.net collaborative development platform, the world's largest Open Source development site.
|
|
From: <co...@us...> - 2024-04-18 09:07:38
|
Revision: 45133
http://sourceforge.net/p/vice-emu/code/45133
Author: compyx
Date: 2024-04-18 09:07:17 +0000 (Thu, 18 Apr 2024)
Log Message:
-----------
Gtk3: Windows: register the "Pet Me" fonts as well
Use `AddFontResourceA()` to register the "Pet Me" fonts. With Pango 1.52-2 we
can use `AddFontResourceEx()` again to register the CBM Pro Mono font, but that
function reports success for the Pet Me fonts yet those fonts aren't shown in
the monitor font selector.
Tested on Win11 Pro, no idea how any of this behaves on other Windows versions.
Modified Paths:
--------------
trunk/vice/src/arch/shared/archdep_cbmfont.c
Modified: trunk/vice/src/arch/shared/archdep_cbmfont.c
===================================================================
--- trunk/vice/src/arch/shared/archdep_cbmfont.c 2024-04-18 08:15:45 UTC (rev 45132)
+++ trunk/vice/src/arch/shared/archdep_cbmfont.c 2024-04-18 09:07:17 UTC (rev 45133)
@@ -179,19 +179,38 @@
int archdep_register_cbmfont(void)
{
- char *path;
- int result;
+ size_t i;
+ int nfonts = 0;
log_message(LOG_DEFAULT,
- "%s(): Registering CBM font using Pango %s",
+ "%s(): Registering CBM fonts using Pango %s",
__func__, pango_version_string());
- if (sysfile_locate(VICE_CBM_FONT_TTF, "common", &path) < 0) {
- log_error(LOG_ERR, "failed to find resource data '%s'.",
- VICE_CBM_FONT_TTF);
- return 0;
+ for (i = 0; i < sizeof font_files / sizeof font_files[0]; i++) {
+ char *path = NULL;
+
+ if (sysfile_locate(font_files[i], "common", &path) < 0) {
+ log_warning(LOG_DEFAULT,
+ "failed to find resource data '%s', continuing...",
+ font_files[i]);
+ } else {
+ int result = AddFontResourceA(path);
+
+ if (result > 0) {
+ font_registered = true;
+ log_message(LOG_DEFAULT,
+ "succesfully registered %d font(s) from %s.",
+ result, path);
+ lib_free(path);
+ nfonts += result;
+ } else {
+ log_warning(LOG_DEFAULT, "no fonts found in %s.", path);
+ }
+ }
}
+ log_message(LOG_DEFAULT, "registered %d font(s) total.", nfonts);
+#if 0
/* Work around the fact that Pango, starting with 1.50.12, has switched to
(only) using DirectWrite for enumarating fonts, and DirectWrite doesn't
find fonts added with AddFontResourceEx().
@@ -225,7 +244,8 @@
log_warning(LOG_DEFAULT,
"%s(): According to Windows, registering the font failed",
__func__);
- return 0;
+#endif
+ return 1;
}
# else
@@ -247,6 +267,7 @@
void archdep_unregister_cbmfont(void)
{
# ifdef WINDOWS_COMPILE
+#if 0
if (font_registered) {
char *path;
@@ -283,7 +304,8 @@
#endif
}
lib_free(path);
- }
+ }
+#endif
# endif
}
# else /* !USE_GTK3UI */
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|
|
From: <co...@us...> - 2024-04-18 08:15:48
|
Revision: 45132
http://sourceforge.net/p/vice-emu/code/45132
Author: compyx
Date: 2024-04-18 08:15:45 +0000 (Thu, 18 Apr 2024)
Log Message:
-----------
Gtk3: allow setting proper parent for `vice_gtk3_message_confirm` dialogs
Modified Paths:
--------------
trunk/vice/src/arch/gtk3/actions-cartridge.c
trunk/vice/src/arch/gtk3/actions-machine.c
trunk/vice/src/arch/gtk3/actions-settings.c
trunk/vice/src/arch/gtk3/widgets/base/basedialogs.c
trunk/vice/src/arch/gtk3/widgets/base/basedialogs.h
trunk/vice/src/arch/gtk3/widgets/settings_hotkeys.c
trunk/vice/src/arch/gtk3/widgets/vsidplaylistwidget.c
trunk/vice/src/vice.h
Modified: trunk/vice/src/arch/gtk3/actions-cartridge.c
===================================================================
--- trunk/vice/src/arch/gtk3/actions-cartridge.c 2024-04-18 07:48:37 UTC (rev 45131)
+++ trunk/vice/src/arch/gtk3/actions-cartridge.c 2024-04-18 08:15:45 UTC (rev 45132)
@@ -86,12 +86,12 @@
resources_get_int("CartridgeType", &cartid);
if (cartid != CARTRIDGE_NONE) {
/* default is set, ask to remove it */
- vice_gtk3_message_confirm(
- confirm_detach_callback,
- "Detach cartridge",
- "You're detaching the default cartridge.\n\n"
- "Would you also like to unregister this cartridge"
- " as the default cartridge?");
+ vice_gtk3_message_confirm(NULL, /* active window as parent */
+ confirm_detach_callback,
+ "Detach cartridge",
+ "You're detaching the default cartridge.\n\n"
+ "Would you also like to unregister this cartridge"
+ " as the default cartridge?");
} else {
/* no dialog used, finish immediately */
ui_action_finish(ACTION_CART_DETACH);
Modified: trunk/vice/src/arch/gtk3/actions-machine.c
===================================================================
--- trunk/vice/src/arch/gtk3/actions-machine.c 2024-04-18 07:48:37 UTC (rev 45131)
+++ trunk/vice/src/arch/gtk3/actions-machine.c 2024-04-18 08:15:45 UTC (rev 45132)
@@ -82,10 +82,10 @@
return;
}
- vice_gtk3_message_confirm(
- confirm_exit_callback,
- "Exit VICE",
- "Do you really wish to exit VICE?");
+ vice_gtk3_message_confirm(NULL, /* current window as parent */
+ confirm_exit_callback,
+ "Exit VICE",
+ "Do you really wish to exit VICE?");
}
/** \brief Open the monitor action
Modified: trunk/vice/src/arch/gtk3/actions-settings.c
===================================================================
--- trunk/vice/src/arch/gtk3/actions-settings.c 2024-04-18 07:48:37 UTC (rev 45131)
+++ trunk/vice/src/arch/gtk3/actions-settings.c 2024-04-18 08:15:45 UTC (rev 45132)
@@ -100,14 +100,14 @@
*/
static void settings_default_action(ui_action_map_t *self)
{
- vice_gtk3_message_confirm(
- restore_default_callback,
- "Reset all settings to default",
- "Are you sure you wish to reset all settings to their default"
- " values?\n\n"
- "The new settings will not be saved until using the 'Save"
- " settings' menu item, or having 'Save on exit' enabled and"
- " exiting VICE.");
+ vice_gtk3_message_confirm(NULL, /* current emulator window as parent */
+ restore_default_callback,
+ "Reset all settings to default",
+ "Are you sure you wish to reset all settings to"
+ " their default values?\n\n"
+ "The new settings will not be saved until using"
+ " the 'Save settings' menu item, or having"
+ " 'Save on exit' enabled and exiting VICE.");
}
/** \brief Show settings dialog
Modified: trunk/vice/src/arch/gtk3/widgets/base/basedialogs.c
===================================================================
--- trunk/vice/src/arch/gtk3/widgets/base/basedialogs.c 2024-04-18 07:48:37 UTC (rev 45131)
+++ trunk/vice/src/arch/gtk3/widgets/base/basedialogs.c 2024-04-18 08:15:45 UTC (rev 45132)
@@ -42,10 +42,6 @@
static gboolean entry_get_int(GtkWidget *entry, int *value);
-/** \brief Callback function for the confirm dialog
- */
-static void (*confirm_cb)(GtkDialog *, gboolean);
-
/** \brief Callback function for the integer input dialog
*/
static void (*integer_cb)(GtkDialog *, int, gboolean);
@@ -68,15 +64,13 @@
*
* \param[in,out] dialog Info dialog
* \param[in] response_id response ID (ignored)
- * \param[in] data extra event data (ignored)
+ * \param[in] callback user-defined callback
*/
-static void on_response_confirm(GtkDialog *dialog, gint response_id, gpointer data)
+static void on_response_confirm(GtkDialog *dialog, gint response_id, gpointer callback)
{
- if (response_id == GTK_RESPONSE_OK) {
- confirm_cb(dialog, TRUE);
- } else {
- confirm_cb(dialog, FALSE);
- }
+ void (*cb)(GtkDialog *, gboolean) = callback;
+
+ cb(dialog, response_id == GTK_RESPONSE_OK);
gtk_widget_destroy(GTK_WIDGET(dialog));
}
@@ -148,7 +142,7 @@
const char *text)
{
GtkWidget *dialog;
- gboolean no_parent = FALSE;
+ gboolean no_parent = FALSE;
if (parent == NULL) {
/* set up a temporary parent to avoid Gtk warnings */
@@ -225,6 +219,7 @@
/** \brief Create 'confirm' dialog
*
+ * \param[in] parent parent window (can be \c NULL)
* \param[in] callback callback function to accept the dialog's result
* \param[in] title dialog title
* \param[in] fmt message format string and arguments
@@ -231,30 +226,41 @@
*
* \return dialog
*/
-GtkWidget *vice_gtk3_message_confirm(void (*callback)(GtkDialog *, gboolean),
+GtkWidget *vice_gtk3_message_confirm(GtkWindow *parent,
+ void (*callback)(GtkDialog *, gboolean),
const char *title,
const char *fmt, ...)
{
+ GtkWindow *active_window;
GtkWidget *dialog;
- va_list args;
- char *buffer;
+ va_list args;
+ char *buffer;
- confirm_cb = callback;
-
va_start(args, fmt);
buffer = lib_mvsprintf(fmt, args);
va_end(args);
- dialog = create_dialog(NULL, GTK_MESSAGE_QUESTION, GTK_BUTTONS_OK_CANCEL,
+ dialog = create_dialog(parent, GTK_MESSAGE_QUESTION, GTK_BUTTONS_OK_CANCEL,
title, buffer);
-
lib_free(buffer);
- gtk_window_set_transient_for(GTK_WINDOW(dialog), ui_get_active_window());
- gtk_window_set_modal(GTK_WINDOW(dialog), TRUE);
+ if (parent == NULL) {
+ active_window = ui_get_active_window();
+ } else {
+ active_window = parent;
+ }
- g_signal_connect(dialog, "response", G_CALLBACK(on_response_confirm),
- NULL);
+ if (active_window != NULL) {
+ gtk_window_set_transient_for(GTK_WINDOW(dialog), active_window);
+ gtk_window_set_position(GTK_WINDOW(dialog), GTK_WIN_POS_CENTER_ON_PARENT);
+ gtk_window_set_modal(GTK_WINDOW(dialog), TRUE);
+ } else {
+ gtk_window_set_position(GTK_WINDOW(dialog), GTK_WIN_POS_CENTER);
+ }
+ g_signal_connect(G_OBJECT(dialog),
+ "response",
+ G_CALLBACK(on_response_confirm),
+ (gpointer)callback);
gtk_widget_show(dialog);
return dialog;
}
Modified: trunk/vice/src/arch/gtk3/widgets/base/basedialogs.h
===================================================================
--- trunk/vice/src/arch/gtk3/widgets/base/basedialogs.h 2024-04-18 07:48:37 UTC (rev 45131)
+++ trunk/vice/src/arch/gtk3/widgets/base/basedialogs.h 2024-04-18 08:15:45 UTC (rev 45132)
@@ -46,24 +46,24 @@
};
-GtkWidget *vice_gtk3_message_info(GtkWindow *parent,
+GtkWidget *vice_gtk3_message_info(GtkWindow *parent,
const char *title,
const char *fmt, ...) VICE_ATTR_PRINTF3;
-GtkWidget *vice_gtk3_message_confirm(void (*callback)(GtkDialog *, gboolean),
- const char *title,
- const char *fmt, ...) VICE_ATTR_PRINTF3;
+GtkWidget *vice_gtk3_message_confirm(GtkWindow *parent,
+ void (*callback)(GtkDialog *, gboolean),
+ const char *title,
+ const char *fmt, ...) VICE_ATTR_PRINTF4;
GtkWidget *vice_gtk3_message_error(GtkWindow *parent,
const char *title,
const char *fmt, ...) VICE_ATTR_PRINTF3;
-GtkWidget *vice_gtk3_integer_input_box(
- void (*callback)(GtkDialog *, int, gboolean),
- const char *title,
- const char *message,
- int old_value,
- int min,
- int max);
+GtkWidget *vice_gtk3_integer_input_box(void (*callback)(GtkDialog *, int, gboolean),
+ const char *title,
+ const char *message,
+ int old_value,
+ int min,
+ int max);
#endif
Modified: trunk/vice/src/arch/gtk3/widgets/settings_hotkeys.c
===================================================================
--- trunk/vice/src/arch/gtk3/widgets/settings_hotkeys.c 2024-04-18 07:48:37 UTC (rev 45131)
+++ trunk/vice/src/arch/gtk3/widgets/settings_hotkeys.c 2024-04-18 08:15:45 UTC (rev 45132)
@@ -1132,7 +1132,8 @@
*/
static void show_clear_all_confirm_dialog(void)
{
- vice_gtk3_message_confirm(clear_dialog_callback,
+ vice_gtk3_message_confirm(NULL, /* use active emu window as parent */
+ clear_dialog_callback,
"Clear all hotkeys",
"Are you sure you want to clear all hotkeys? "
"This action cannot be undone.");
Modified: trunk/vice/src/arch/gtk3/widgets/vsidplaylistwidget.c
===================================================================
--- trunk/vice/src/arch/gtk3/widgets/vsidplaylistwidget.c 2024-04-18 07:48:37 UTC (rev 45131)
+++ trunk/vice/src/arch/gtk3/widgets/vsidplaylistwidget.c 2024-04-18 08:15:45 UTC (rev 45132)
@@ -753,6 +753,7 @@
{
if (result) {
vsid_playlist_clear();
+ update_current_and_total();
}
gtk_widget_destroy(GTK_WIDGET(dialog));
ui_action_finish(ACTION_PSID_PLAYLIST_CLEAR);
@@ -1506,16 +1507,12 @@
*/
void vsid_playlist_clear(void)
{
- GtkWidget *dialog;
-
mainlock_assert_is_not_vice_thread();
- dialog = vice_gtk3_message_confirm(
- clear_playlist_callback,
- "VSID",
- "Are you sure you wish to clear the playlist?");
- gtk_widget_show_all(dialog);
- update_current_and_total();
+ vice_gtk3_message_confirm(NULL, /* VSID window as parent */
+ clear_playlist_callback,
+ "VSID",
+ "Are you sure you wish to clear the playlist?");
}
Modified: trunk/vice/src/vice.h
===================================================================
--- trunk/vice/src/vice.h 2024-04-18 07:48:37 UTC (rev 45131)
+++ trunk/vice/src/vice.h 2024-04-18 08:15:45 UTC (rev 45132)
@@ -134,6 +134,8 @@
#define VICE_ATTR_PRINTF2 __attribute__((format(printf, 2, 3)))
/* two extra param on the left, func(param, param, format, ...) */
#define VICE_ATTR_PRINTF3 __attribute__((format(printf, 3, 4)))
+/* three extra param on the left, func(param, param, param, format, ...) */
+#define VICE_ATTR_PRINTF4 __attribute__((format(printf, 4, 5)))
/* one extra param after the format, func(format, param, ...) (used for resource sprintf) */
#define VICE_ATTR_RESPRINTF __attribute__((format(printf, 1, 3)))
#else
@@ -140,6 +142,7 @@
#define VICE_ATTR_PRINTF
#define VICE_ATTR_PRINTF2
#define VICE_ATTR_PRINTF3
+#define VICE_ATTR_PRINTF4
#define VICE_ATTR_RESPRINTF
#endif
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|
|
From: <co...@us...> - 2024-04-18 07:48:39
|
Revision: 45131
http://sourceforge.net/p/vice-emu/code/45131
Author: compyx
Date: 2024-04-18 07:48:37 +0000 (Thu, 18 Apr 2024)
Log Message:
-----------
Gtk3: Windows bindist: provide PetMe fonts
Modified Paths:
--------------
trunk/vice/src/arch/gtk3/make-bindist_win32.sh
Modified: trunk/vice/src/arch/gtk3/make-bindist_win32.sh
===================================================================
--- trunk/vice/src/arch/gtk3/make-bindist_win32.sh 2024-04-18 06:56:56 UTC (rev 45130)
+++ trunk/vice/src/arch/gtk3/make-bindist_win32.sh 2024-04-18 07:48:37 UTC (rev 45131)
@@ -240,7 +240,7 @@
mkdir $BUILDPATH/common
mkdir $BUILDPATH/hotkeys
cp $TOPBUILDDIR/data/common/vice.gresource $BUILDPATH/common
-cp $TOPSRCDIR/data/common/C64_Pro_Mono-STYLE.ttf $BUILDPATH/common
+cp $TOPSRCDIR/data/common/*.ttf $BUILDPATH/common
cp $TOPSRCDIR/data/hotkeys/*.vhk $BUILDPATH/hotkeys
#if test x"$HTML_DOCS" = "xyes"; then
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|
|
From: <co...@us...> - 2024-04-18 06:56:58
|
Revision: 45130
http://sourceforge.net/p/vice-emu/code/45130
Author: compyx
Date: 2024-04-18 06:56:56 +0000 (Thu, 18 Apr 2024)
Log Message:
-----------
Gtk3: disable monospace filtering in monitor font chooser
Disable selecting only monospace family fonts in the monitor font selection,
in an attempt to fix bug #2015.
Modified Paths:
--------------
trunk/vice/src/arch/gtk3/widgets/settings_monitor.c
Modified: trunk/vice/src/arch/gtk3/widgets/settings_monitor.c
===================================================================
--- trunk/vice/src/arch/gtk3/widgets/settings_monitor.c 2024-04-17 22:58:47 UTC (rev 45129)
+++ trunk/vice/src/arch/gtk3/widgets/settings_monitor.c 2024-04-18 06:56:56 UTC (rev 45130)
@@ -101,6 +101,8 @@
}
}
+/* temporarily disabled to see if that fixes bug #2015 */
+#if 0
/** \brief Filter function for font selection dialog
*
* \param[in] family font family
@@ -116,8 +118,8 @@
/* we have to cast away const due to shitty API */
return pango_font_family_is_monospace((PangoFontFamily*)family);
}
+#endif
-
/** \brief Create widget to control monitor resources
*
* \param[in] parent parent widget (unused)
@@ -247,10 +249,12 @@
/* create button that pops up a font selector */
font_button = gtk_font_button_new();
+#if 0
gtk_font_chooser_set_filter_func(GTK_FONT_CHOOSER(font_button),
font_button_filter,
NULL, /* extra data */
NULL /* destroy callback for extra data */);
+#endif
gtk_font_button_set_use_font(GTK_FONT_BUTTON(font_button), TRUE);
if (font_name != NULL) {
gtk_font_chooser_set_font(GTK_FONT_CHOOSER(font_button), font_name);
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|
|
From: <gp...@us...> - 2024-04-17 22:58:50
|
Revision: 45129
http://sourceforge.net/p/vice-emu/code/45129
Author: gpz
Date: 2024-04-17 22:58:47 +0000 (Wed, 17 Apr 2024)
Log Message:
-----------
Hack to combat #1994 for the time being. It now uses the a buffer that is at least 5 times as large as required to store one frame worth of instructions.
Modified Paths:
--------------
trunk/vice/src/monitor/mon_memmap.c
Modified: trunk/vice/src/monitor/mon_memmap.c
===================================================================
--- trunk/vice/src/monitor/mon_memmap.c 2024-04-17 21:05:57 UTC (rev 45128)
+++ trunk/vice/src/monitor/mon_memmap.c 2024-04-17 22:58:47 UTC (rev 45129)
@@ -84,7 +84,8 @@
/* CPU history variables */
static cpuhistory_t *cpuhistory = NULL;
-static int cpuhistory_lines = 0;
+static int cpuhistory_buffer_lines = 0; /* actual size of the cyclic buffer */
+static int cpuhistory_show_lines = 0; /* number of lines to show in the monitor */
static int cpuhistory_i = 0;
@@ -102,10 +103,30 @@
return -1;
}
+ cpuhistory_show_lines = lines;
+
+ /* HACK HACK HACK
+ since all CPUs are sharing one cyclic buffer for the history, we must make
+ sure that one CPU can not "flush out" the history of another CPU. For this
+ to work we need to buffer at least one frame, since the emulation is synced
+ at least once per frame.
+
+ 312 lines * 65 cycles makes 20280 cycles per frame, that 10140 NOPs
+
+ For now, we use this number as minimum, and multiply by the number of
+ CPUs when the buffer is actually allocated.
+
+ also see https://sourceforge.net/p/vice-emu/bugs/1994/
+ */
+ if (lines < 10140) {
+ lines = 10140;
+ }
+ lines *= 5;
+
cpuhistory = lib_realloc(cpuhistory, (size_t)lines * sizeof(cpuhistory_t));
/* do we resize the array? */
- if (cpuhistory_lines != lines) {
+ if (cpuhistory_buffer_lines != lines) {
/* Initialize array to avoid mon_memmap_store() using unitialized
* data when reading the RESET vector on boot.
* WHY reading the RESET vector causes a STORE is another issue.
@@ -118,7 +139,7 @@
}
}
- cpuhistory_lines = lines;
+ cpuhistory_buffer_lines = lines;
cpuhistory_i = 0;
return 0;
}
@@ -138,7 +159,7 @@
}
++cpuhistory_i;
- if (cpuhistory_i == cpuhistory_lines) {
+ if (cpuhistory_i == cpuhistory_buffer_lines) {
cpuhistory_i = 0;
}
cpuhistory[cpuhistory_i].cycle = cycle;
@@ -182,8 +203,10 @@
}
/* determine the actual maximum records to go through */
- if ((count < 1) || (count > cpuhistory_lines)) {
- count = cpuhistory_lines;
+ if (count < 1) {
+ count = cpuhistory_show_lines;
+ } else if (count > cpuhistory_buffer_lines) {
+ count = cpuhistory_buffer_lines;
}
/* 'i' is the actual counter */
@@ -204,7 +227,7 @@
}
pos--;
if (pos < 0) {
- pos += cpuhistory_lines;
+ pos += cpuhistory_buffer_lines;
}
/* stop if we hit the starting point */
/* this is totally possible since the emulation runs each CPU in
@@ -218,7 +241,7 @@
/* loop through all entries until we find the number records requested */
while (i > 0) {
/* adjust our buffer circular reference */
- pos = ( pos + 1) % cpuhistory_lines;
+ pos = ( pos + 1) % cpuhistory_buffer_lines;
/* make sure the record matches */
if ((cpuhistory[pos].origin != e_invalid_space)
&& ((filter1 == cpuhistory[pos].origin)
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|
|
From: <gp...@us...> - 2024-04-17 21:06:00
|
Revision: 45128
http://sourceforge.net/p/vice-emu/code/45128
Author: gpz
Date: 2024-04-17 21:05:57 +0000 (Wed, 17 Apr 2024)
Log Message:
-----------
fix typo
Modified Paths:
--------------
trunk/vice/doc/vice.texi
Modified: trunk/vice/doc/vice.texi
===================================================================
--- trunk/vice/doc/vice.texi 2024-04-16 22:16:53 UTC (rev 45127)
+++ trunk/vice/doc/vice.texi 2024-04-17 21:05:57 UTC (rev 45128)
@@ -8893,7 +8893,7 @@
Execute the commands from the file <Name> in the monitor after starting up. All
monitor commands are supported, including playback of other command files via
@code{pb}. By default, the monitor opens and starts executing the commands just
-before the kernal reset routine starts. The kernal starup sequence may interfere
+before the kernal reset routine starts. The kernal startup sequence may interfere
with what you are trying to achieve, for example by clearing any basic listing
you may have loaded. In this case, use the @code{-initbreak} option to control
when the monitor will open and execute your script. You can choose an address,
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|
|
From: <gp...@us...> - 2024-04-16 22:16:55
|
Revision: 45127
http://sourceforge.net/p/vice-emu/code/45127
Author: gpz
Date: 2024-04-16 22:16:53 +0000 (Tue, 16 Apr 2024)
Log Message:
-----------
added read/write as alias for load/store in the monitor (requested by fungus)
Modified Paths:
--------------
trunk/vice/src/monitor/mon_lex.l
Modified: trunk/vice/src/monitor/mon_lex.l
===================================================================
--- trunk/vice/src/monitor/mon_lex.l 2024-04-15 20:49:26 UTC (rev 45126)
+++ trunk/vice/src/monitor/mon_lex.l 2024-04-16 22:16:53 UTC (rev 45127)
@@ -274,6 +274,8 @@
load { yylval.i = e_load; return MEM_OP; }
store { yylval.i = e_store; return MEM_OP; }
+read { yylval.i = e_load; return MEM_OP; }
+write { yylval.i = e_store; return MEM_OP; }
exec { yylval.i = e_exec; return MEM_OP; }
reset { return RESET; }
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|
|
From: <gp...@us...> - 2024-04-15 20:49:28
|
Revision: 45126
http://sourceforge.net/p/vice-emu/code/45126
Author: gpz
Date: 2024-04-15 20:49:26 +0000 (Mon, 15 Apr 2024)
Log Message:
-----------
fix warning
Modified Paths:
--------------
trunk/vice/src/plus4/cart/digiblaster.c
trunk/vice/src/plus4/cart/digiblaster.h
Modified: trunk/vice/src/plus4/cart/digiblaster.c
===================================================================
--- trunk/vice/src/plus4/cart/digiblaster.c 2024-04-15 20:46:19 UTC (rev 45125)
+++ trunk/vice/src/plus4/cart/digiblaster.c 2024-04-15 20:49:26 UTC (rev 45126)
@@ -152,7 +152,7 @@
CARTRIDGE_PLUS4_NAME_DIGIBLASTER, 0, 0, NULL, &digiblaster_fe9e_device, CARTRIDGE_PLUS4_DIGIBLASTER
};
-void digiblaster_set_address(uint16_t addr)
+int digiblaster_set_address(uint16_t addr)
{
if (digiblaster_sound_chip.chip_enabled) {
io_source_unregister(digiblaster_list_item);
@@ -170,6 +170,7 @@
}
}
}
+ return 0;
}
int digiblaster_enabled(void)
Modified: trunk/vice/src/plus4/cart/digiblaster.h
===================================================================
--- trunk/vice/src/plus4/cart/digiblaster.h 2024-04-15 20:46:19 UTC (rev 45125)
+++ trunk/vice/src/plus4/cart/digiblaster.h 2024-04-15 20:49:26 UTC (rev 45126)
@@ -36,6 +36,6 @@
void digiblaster_sound_chip_init(void);
int digiblaster_enabled(void);
-void digiblaster_set_address(uint16_t addr);
+int digiblaster_set_address(uint16_t addr);
#endif
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