From: selvam <sat...@gm...> - 2013-03-25 17:51:47
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Hi, That's great news. I am interested in testing Valgrind on e500 cores (have P2020 RBD box) Could you please share more information about the flags to be enabled/disabled? On 3/25/13, Paralkar Anmol-B07584 <B0...@fr...> wrote: > Hello, > > Freescale is adding support for the e500 (SPE) ISA to Valgrind; would you be > interested in testing the Beta in a couple of weeks? > > For now, you could disable the generation of SPE instructions by compiling > -mno-spe - however, please note that means > recompiling *everything* -mno-spe - system libraries, /lib/ld.so.1, ... as > well. (You'd likely also need to be saying: -msoft-float ) > > Thanks & Regards, > Anmol P. Paralkar > > From: selvam [mailto:sat...@gm...] > Sent: Sunday, March 24, 2013 1:30 PM > To: val...@li... > Subject: [Valgrind-users] Need help for valgrind support in e500 cores > (power PC) > > Hi Team, > > I have cross compiled Valgrind (3.8.1) for powerPC architecture (QorIQ > processor - e500), while running the valgrind, it exited immediately with > error message " unhandled instruction". > Googled for this issue, seems like floating point instructions (SPE and > AltiVec) of e500 are not supported by Valgrind. > > Is there any way to disable these instructions while compiling my > application? > > Basically I am looking for enabling valgrind support on e500 cores. Please > advice. > > -- > Thanks & Regards, > Selvam.T > -- Regards, Selvam.T |