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From: Dave P. <ek...@vo...> - 2002-01-24 14:02:37
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Here's a test image that implements I/O delay between both FDC operations and DMA programming. Hopefully this will fix the problem people have been reporting with the fdc code. bzip2: http://void-core.2y.net/download/img-20020124-0001.bin.bz2 zip: http://void-core.2y.net/download/img-20020124-0001.bin.zip * things to test * test #1: See if you can get to the prompt test #2: run 'dmesg' and see if any error is reported for the fdc. * what to do after testing * If possible, please submit your results via the SF uuu-testing trakcer at http://sourceforge.net/tracker/index.php?group_id=23202&atid=430301 (please log in first if you have a SF account) If you are unable to submit via the tracker you can email me directly. Example of report expected for this test: | change: no | was working before: no | fdc: part of the 82430 VX chipset. Thank you for your help in testing Uuu. Good luck! -- EKS - Dave Poirier (in...@us...) "may the hairs on his toes never fall out" http://uuu.sf.net/ |