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From: Daniel R. <cos...@gm...> - 2006-04-19 17:45:15
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Hello,
I've just uploaded the first part of the UML documentation I was working
on. I'm afraid that it's not really, but I nevertheless hope that it will
help you to get familiar witht the code. I'll add some more as soon as
possible, but as I'll be quite buisy for the next few week, I can't
promise anything.
I also had a look at the current code and made this small list of tasks:
/hal/apic_local: - add support for logical destinations (priorities, etc)
- catch error interrupts (no handling - just hang)
- handle spurious interrupts
- check if there's any way to enable the Apic on a
uniprocessor processors
if it was permanently disabled by the BIOS (warm reset
?,IRM 3: 8.4.3)
/hal/cpu_node: - implement basic task-switching
(todo) - based on tss (stack), ports (I/O bitmap), mmu (cr3) &
systemcall (ring0-3)
- implement scheduling mechanism
/hal/exception: - look up whether an EOI is needed
- provide facilities to route exceptions to the user tasks
/hal/ipi: - develop system for inter processor communication
- provide functions for the TLB shootdown algorithm
/hal/irq: - find some solution for the nested IRQs problem (line
200)
- design systemcalls that allow the dev manager to change
IRQ specs (polarity, level, mask)
- enable irq delivery to user-tasks
/hal/mmu: - implement the missing functions (dirty & access map,
contect switch)
- find some nicer solution for the paging flags
- develop a tlb shootdown algorithm
- make the whole class more objects oriented (built
around the page-directory)
/hal/ports: - same as for the mmu: make the class more object oriented
- implement the missing functionality (I/O bitmap) based
on the TSS class
/hal/systemcall: - design the systemcall interface (Nucleus API)
(todo) - implement a mechanism: interrupt or sysenter/sysexit
- define the final systemcall technique (message register
format, etc)
/hal/timer: - design system of timer delivery (scheduler only ? user
timers ?)
- enable interrupts for timer notifications
/hal/tss: - base class of ports.hpp (I/O bitmap) and cpu_node.hpp
(stack pointers)
(todo) - provides access to the TS segment's data
- creates a new TSS for each processor and initializes it
- no further abstraction for the gdt should be needed as
only TSS have to be added at run-time
/loader/main: - clean the kernel entrypoint up, sperate between
system-wide and per cpu object creation
/loader/grub: - class can be built based on mp_detect, which too parses
a table
(todo) - detection of available memory, VESA support (hack |
GRUB 2.0 | selfmade solution)
/object/*: - memory classes can be developed in parallel with the
hal objetcs
- both, hal objects and memory class, will be the
foundation of the multiplexion layer
In my opinion fixing the local_apic code and writing the GRUB class are
the most urgent tasks right now. The systemcall class should also be easy..
regards,
cosmo86
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