Re: [Trion-kernel-dev] trion reloaded

[Manuel H. <mho...@ph...>]

Hi Daniel,

after having a close look at the sources I have some questions and
suggestions:

- Why does each CPU set up an own GDT, IDT and page tables? The entries in
all the GDT's will be identically, so it would be sufficient to use only
one. The only advantage I can see from multiple GDT's is by putting task
state segments for each CPU in a different GDT - but of course they could
also be located in the same GDT. But I can't see the advantage in having
multiple IDT's (and also multiple interrupt stubs, calling the same
interrupt handler). Finally, multiple page tables allow all CPU's to see the
same virtual memory layout while having their data at different locations
within physical memory, but I wonder whether this justifies the memory
overhead causes by the page tables.

- The kernel entry is not (yet) thread safe. As soon as an AP boots up and
enters main(), it will clobber some global variables (stack, nodestruct and
so on) since they exist only once as part of the kernel.

I'll try to add some mp requirements (locks...) and APIC features (timer,
IPI) during the next days.

Regards,
Manuel