#1 OPCrt & TPCrt RTE 200 on fast CPUs

[Robert AH Prins]

On fast (200+ MHz) CPUs these units will cause an RTE
200 (Division by zero error) due to the fact that the
result of a division no longer fits in a 16-bit register.

Attached are the last official patches from TurboPower's
late ftp site to cure the problem.

Robert

[Robert AH Prins]

Last official fixes from TurboPower

[Jim Shewchuk]

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By replacing the Delay routine with the corresponding
routine used by TurboPower's BTree Filer, the RTE 200 is
squashed even on machines exceeding 3GHz. (Note that this
fix requires editing and reassembly of OpCrt.Asm -- the RTE
200, which is more accurately described as an 'Integer
division overflow', is triggered by the initialization stuff in that
file.)

The first use of 'IsamDelay ()' can last a couple of seconds
while it calibrates on a super-fast machine, but seems to
work afterword provided the specified delay is between 18 mS
and 10 Sec.

Possible downside:
Because IsamDelay requests data from the real-time clock,
it could possibly cause the clock to run slow if heavily used.