Provide structural HDL importers and exporters for the generic netlist. Verilog very desirable.
Basic structural Verilog importing is in place. No rigorous testing or usage yet.
Added support for Verilog concatenations and escaped Verilog identifiers.
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Basic structural Verilog importing is in place. No rigorous testing or usage yet.
Added support for Verilog concatenations and escaped Verilog identifiers.