[Stella-commits] CVS: stella/src/emucore/m6502/src M6502Hi.cxx, 1.24, 1.25

[Steve A. <ste...@us...>]

Update of /cvsroot/stella/stella/src/emucore/m6502/src
In directory fdv4jf1.ch3.sourceforge.com:/tmp/cvs-serv26280/src/emucore/m6502/src

Modified Files:
	M6502Hi.cxx 
Log Message:
Checking in WIP for trace functionality, similar to that produced by z26.

Various other minor code cleanups.


Index: M6502Hi.cxx
===================================================================
RCS file: /cvsroot/stella/stella/src/emucore/m6502/src/M6502Hi.cxx,v
retrieving revision 1.24
retrieving revision 1.25
diff -C2 -d -r1.24 -r1.25
*** M6502Hi.cxx	13 Jan 2009 14:45:34 -0000	1.24
--- M6502Hi.cxx	10 May 2009 20:57:18 -0000	1.25
***************
*** 17,20 ****
--- 17,22 ----
  //============================================================================
  
+ //#define DEBUG_OUTPUT
+ 
  #include "M6502Hi.hxx"
  #include "Serializer.hxx"
***************
*** 37,40 ****
--- 39,48 ----
    myJustHitTrapFlag = false;
  #endif
+ 
+ 
+ 
+ debugStream << "( Fm  Ln Cyc Clk) ( P0  P1  M0  M1  BL)  "
+             << "flags   A  X  Y SP  Code           Disasm" << endl
+             << endl;
  }
  
***************
*** 133,146 ****
  #endif
  
- #ifdef DEBUG
-       debugStream << "PC=" << hex << setw(4) << PC << " ";
- #endif
- 
        // Fetch instruction at the program counter
        IR = peek(PC++);
  
! #ifdef DEBUG
!       debugStream << "IR=" << hex << setw(2) << (int)IR << " ";
!       debugStream << "<" << ourAddressingModeTable[IR] << " ";
  #endif
  
--- 141,162 ----
  #endif
  
        // Fetch instruction at the program counter
        IR = peek(PC++);
  
! #ifdef DEBUG_OUTPUT
!       debugStream << ::hex << setw(2) << (int)A << " "
!                   << ::hex << setw(2) << (int)X << " "
!                   << ::hex << setw(2) << (int)Y << " "
!                   << ::hex << setw(2) << (int)SP << "  "
!                   << setw(4) << (PC-1) << ": "
!                   << setw(2) << (int)IR << "       "
! //      << "<" << ourAddressingModeTable[IR] << " ";
! //      debugStream << hex << setw(4) << operandAddress << " ";
!                   << setw(3) << ourInstructionMnemonicTable[IR]
! 
! //      debugStream << "PS=" << ::hex << setw(2) << (int)PS() << " ";
! 
! //      debugStream << "Cyc=" << dec << mySystem->cycles();
!                   << endl;
  #endif
  
***************
*** 157,173 ****
  
        myTotalInstructionCount++;
- 
- #ifdef DEBUG
-       debugStream << hex << setw(4) << operandAddress << " ";
-       debugStream << setw(4) << ourInstructionMnemonicTable[IR];
-       debugStream << "> ";
-       debugStream << "A=" << ::hex << setw(2) << (int)A << " ";
-       debugStream << "X=" << ::hex << setw(2) << (int)X << " ";
-       debugStream << "Y=" << ::hex << setw(2) << (int)Y << " ";
-       debugStream << "PS=" << ::hex << setw(2) << (int)PS() << " ";
-       debugStream << "SP=" << ::hex << setw(2) << (int)SP << " ";
-       debugStream << "Cyc=" << dec << mySystem->cycles();
-       debugStream << endl;
- #endif
      }
  
--- 173,176 ----