[Spuc-users] OFDM DSP ASIC WLAN
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From: Drewster D <vo...@ho...> - 2005-11-02 17:06:47
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<html><div style='background-color:'><DIV class=RTE>In the event anyone is interested or know of someone that is, please feel free to email or pass along as required:</DIV> <DIV class=RTE> </DIV> <DIV class=RTE>Or contact me at 408-850-1157 </DIV> <DIV class=RTE>Andrew Sanger</DIV> <DIV class=RTE><A href="mailto:an...@ta...">an...@ta...</A></DIV> <DIV class=RTE> </DIV> <DIV class=RTE><FONT face="Lucida Sans Unicode" color=#000080 size=2> </FONT> <P class=MsoNormal style="MARGIN: 0in 0in 0pt"><B style="mso-bidi-font-weight: normal"><SPAN style="FONT-SIZE: 14pt"><FONT size=2>HW/SW Architect: The Bay Area, CA.</FONT></SPAN></B></P> <P class=MsoNormal style="MARGIN: 0in 0in 0pt"><B style="mso-bidi-font-weight: normal"><SPAN style="FONT-SIZE: 14pt"><?xml:namespace prefix = o ns = "urn:schemas-microsoft-com:office:office" /><o:p> </o:p></SPAN></B></P> <P class=MsoNormal style="MARGIN: 0in 0in 0pt">Experience in the development of state-of-the-art wireless communications chips/systems is required. Proven track record in the design of complex DSP algorithms geared towards high-speed wireless modems, and knowledge of C, SystemC, Matlab, Verilog/VHDL, and their respective tools is a must. Candidate should demonstrate knowledge of DSP HW/SW architecture co-design using CPU or DSP based architectures. <BR> <BR>Description <BR> The candidate will be part of a multidisciplinary team developing DSP-based algorithms, architectures, and implementation of wireless communications systems. The candidate will be responsible for modeling designs, developing optimal micro-architectures, and their implementation using HDL language. The candidate must have at least 10 years of experience in this field. An MSEE or PhD EE is required.</P></DIV></div></html> |