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Searchlight panel is a custom turnout control panel for a friend's layout.
Features
- Remote, wall-mounted LED display
- Support at least 32 turnouts or crossovers
- Minimize cabling
- CDU output drive for dual-coil solenoid switch machines
- Expandability to larger layouts.
Discussion
Building a control panel for a large layout requires a lot of wiring. Each remotely controlled turnout requires at least 2 or 3 wires, plus wiring for the LED indicators. This rapidly multiplies into a "rats nest" for even moderately large layouts. My friend's layout has 27 individual turnouts and 4 crossovers, totalling 31 control points. Handling all 31 control points with a single CDU and a set of SPDT switches (using a common return bus wire) will require some 62 wires be run from the panel to the layout.
As an additional feature, my friend wants a wall-mounted LED track schematic display. This will require an additional 62 wires (or more) be run from the control panel to the display panel, if all is done the "simple" way.
There are probably more efficient ways of handling this, in terms of the wiring.
My solution is to introduce a microcontroller into the mix. The micro will use an addressing scheme and a time-multiplexed signal bus (or a set of them, really) to cut down the wiring being passed around. A second simple microcontroller in the display panel will manage the LED display.
The turnouts will be directly driven by small driver cards that handle eight turnouts each. Each card will have an assigned address, and will share an 8-bit control bus back to the micro. The driver cards could each contain their own local CDU (and I may design the board that way), but there will also be provision for a single master CDU for all the turnouts.
The control panel switches will be wired via a bus as inputs to the micro in groups of 8. The micro will poll each group of 8 switches in round-robin fashion to check the position of each switch. When a change in switch position is detected, the micro will address the correct driver card and turnout. This will trigger a FET switch that will direct the CDU output to the correct turnout. At the same time, the micro will send a message to the LED display controller to update the display.
At boot time, it is possible that someone may have manually changed a turnout position. To account for this, the display controller will keep track of which turnouts have been moved since the last time it was powered on. At boot time, for each turnout, it will either light both LEDs or neither, to indicate that the turnout position is unknown. Each time it receives a "turnout change message", it will update its status and light the correct LED for the turnout position. In this fashion the user will be warned of the unknown state at boot, and this will be automatically updated as operations progress.
Note that this is not foolproof. The system still cannot detect if someone manually changes a turnout while the system is active. This issue will have to be addressed in the operating rules for the layout, as without some form of feedback from the turnouts (which is not available at this time), run-time manual turnout moves cannot be detected.
Block Diagram
- Blue = Switch input bus
- Red = Output control bus
- Turquoise = LED panel interface
Bus Definitions
Here are proposed definitions for the various buses in the system
Cabling Standards
All defined bus cables are multi-wire flat ribbon cable with IDC headers. Standard spec is 24ga. but larger wire is allowable. Cable connectors are 0.10" dual row IDC female, mating to matching pin-headers on the boards.
Switch input bus
(News: After toying with the logic required to implement a daisy-chained SPI bus, I'm going with what was Alternate 2)
The switch input bus is a 6-pin ribbon cable that connects all of the switch input boards to the microcontroller. The microcontroller has a user setting on the board that tells it how many input boards are connected. All of the input boards are in a daisy-chain, so the master simply clocks all the pin data through the chain to collect it.
Alternately, the slaves can all power up to a "all zeroes" state, and the master can clock a magic word through the chain in order to measure its length at runtime. Once this is complete, the master can clock a reset value out that will cause the input boards to load their switch states onto the bus. This would eliminate the need for a user setting on the bus size.
Logic HIGH indicates diverging route (switch is thrown), LOW indicates main line route (switch is closed).
Pin Description
1
+5V
2
MISO
3
MOSI
4
SCLK
5
SSn
6
GND
In this case, the boards are all connected in daisy chain fashion (each board's MOSI is the next board's MOSI). The master clocks however many bits it expects to see (as indicated by the "how many boards" setting). If there are 4 boards installed, the master will clock 32 bits, and gather the switch states of all 4 boards in one read.
The daisy chain can be single-ended if the last board has a jumper set or installed to loop back the return path.
For expandability, all slaves will have 16 bit SPI bus ports. Unconnected ports will always return '0'.
Output Control Bus
NOTE: This bus, like the Input bus, is about to receive an overhaul to a SPI based serial interface with fewer pins.
This bus runs from the microcontroller to the output modules. Each output module has an assigned address, and responds only if the address lines match its address. This bus is clocked. Changes are only made on the rising edge of the CLK line (which is really a latch enable).
The bus transaction appears as follows:
- Processor places Output Module address on BD_ADDR
- Processor places TO Number (encoded) on OP_ADDR
- Processor pulses CLK high.
- Output Module connects CDU to the selected switch output
- CDU pulse completes
- Output Module disconnects all switch outputs from the CDU
When CLK is driven high, the CDU output is routed to the appropriate turnout output. When CLK goes low, all outputs are disconnected from the CDU.
A "digital safe" version of the CDU pulse is returned to the processor via the CDU_FB pin, for timing. The processor will not issue another pulse until a specified recharge time after the previous pulse.
Alt: A "digital safe" version of the CDU pulse is routed as an input to the module logic, and the outputs are not disconnected until the pulse itself is finished. This makes the clock rising-edge-only.
Pin Description
1
+5V
2
CDU_POS
3
CDU_GND
4
OP_ADDR_0
5
OP_ADDR_1
6
OP_ADDR_2
7
BD_ADDR_0
8
BD_ADDR_1
9
BD_ADDR_2
10
BD_ADDR_3
11
Reserved
12
TO_POS
13
CLK
14
CDU_FB
15
GND
16
GND
BD_ADDR selects an output module from among all the modules on the bus. OP_ADDR selects one of the 8 outputs on the selected module. TO_POS contains the new turnout position for that specific output. CLK triggers the output change event, and CDU_POS/CDU_GND carries the CDU pulse. There is no memory on the output module.
LED Display Interface
The remote LED display board contains its own small microcontroller. This allows us to use a simple serial interface between the boards. Because of the possibly long cable routing, RS-232 +/-12V signaling will be used. We will evaluate whether a different, simpler interface could be used, since it is desirable to provide a LocoNet interface, and multiple UART microcontrollers are hard to find these days. Other options are SPI, I2C or CAN bus, or a simple clocked serial interface.
Pin Description
1
+5V
2
MC_TxD
3
MC_RxD
4
GND
MC_TxD and MC_RxD are defined from the perspective of the primary microcontroller. That is, the LED controller transmits on RxD and receives on TxD. This convention is indicated by the "MC_" prefix. +5V is supplied by the primary controller, and is optional. The LED controller need not use it.
Core Module Definition
The Core Module provides the core logic for the system. It is intended to be installed in a central location. It need not be in the operator panel.
The core module is (tentatively) based on the Atmel AT89C51CC03 (or equivalent) Microcontroller in the PLCC52 or VQFP64 package. Relevant features:
- CAN Port (for OpenLCB)
- UART Port (for remote LED display)
- SPI Port (for Input and Output controllers)
The dual SPI ports will be created by generating separate SSn selects and sharing the MISO/MOSI/CLK IO.
Block Diagram
Input Module Definition
The Input module provides the interface between the control panel switches and the main processor. It will also provide optional direct local LED feedback of the switch state.
Block Diagram
Functional Description
The Input Module provides connection for up to eight electrical switches for controlling eight turnouts (or turnout pairs), as well as LED indicator outputs for local panel indication. It is designed to be installed inside a control panel and connected to a master control processor via a ribbon cable.
The boards are connected in a "daisy chain" via a series of 6-pin ribbon cables. The underlying bus is SPI.
The switches are connected via a second ribbon cable (which can be separated for routing to the panel switches). Either SPDT or SPST switches can be used. For SPDT operation, the center lead of the switch is connected to the switch input, while +5V and GND are connected to the outer leads. When the switch is thrown, the board input is tied to +5V or GND, and the logic is able to read the switch position. For use with SPST switches, pullups to +5V are provided on the board. The switch is wired from the board input to GND, and the open position represents +5V.
By convention, +5V indicates the diverging turnout position (turnout switch "thrown"), and GND indicates the "through" turnout position (turnout switch "closed").
The Master processor continually polls all the boards on the ribbon cable bus. Each time the SSn signal is driven active (low), the Input Module will load the current state of its switches into its shift register. The Master processor will then clock out all of the switch conditions, and deassert SSn.
Local panel LEDs are automatically driven by the input switch position.
Due to the daisy-chain nature of the processor bus, a theoretically unlimited number of Input Boards can be connected. However, timing places a practical limit (TBD) on the number of supported boards. The Input Boards and Output Boards (and therefore the panel switch -> turnout relationship) are associated by their relative position in the daisy chain.
Tenative Module BOM
Item Description Mfg P/N Or Equiv? Qty Unit $ Net $ Notes
1
Core Logic CPLD
Xilinx
XC2C64A-VQ44
N
1
$2.45
$2.45
2
6x1 header
Molex
22-03-2061
Y
2
$0.74
$1.48
Bus connectors
3
4x1 header
Molex
22-03-4041
Y
1
$0.32
$0.32
JTAG Header
4
2x1 jumper
Molex
22-03-2021
Y
1
$0.44
$0.44
Bus Terminator
5
5x2 header
Molex
90131-0125
Y
1
$1.07
$1.07
Switch inputs
6
9x2 header
Molex
90131-0129
Y
1
$1.93
$1.93
LED outputs
7
74xx541
Fairchild
74LCX541WM
Y
2
$0.61
$1.22
LED drivers
8
220Ω RPAK-4
Vishay
CRA06S083220RJTA
Y
4
$0.023
$0.23
LED pullups (Min order 10)
9
5KΩ RPAK-4
Vishay
CRA06S0835K10JTA
Y
2
$0.023
$0.23
Switch pullups (Min order 10)
10
5KΩ Resistor
Panasonic
ERJ-3GEYJ512V
Y
1
$0.03
$0.03
Terminator pullup
11
10pF Cap
TDK
C1608C0G1H100D
Y
10?
$0.024
$0.24
isolation caps (Min order 10)
12
Clock Circuit (TBD)
TBD
TBD
Y
1
$$
$$
Design TBD
13
PCB
Sunstone
N/A
Y
1
$24.00
$18.00
Est 4x1.5 @ $3/sq.in.
14
PCB NRE
Sunstone
N/A
Y
1
$25.00
$25.00
Current total cost estimate per board = $27.41 + NRE + Clock circuit
Output Module Definition
Block Diagram
Functional Description
Related
