TLCS
From the TLCS-90, the TLCS-870 and TLCS-900 families are derived. The latter is a 16/32-bit architecture, while the former is 8/16 bit, like the TLCS-90.
SDCC currently supports the TLCS-90 via the tlcs90 port. The only variant currently (2025) in production is the TLCS-870/C1 (and the TLCS-870/C1E, but it uses the same core as the TLCS-870/C1, so they would be supported by the same SDCC port).
Documentation for the TLCS devices is hard to find, often incomplete.
However, documentation lists the number of "instruction types" and "basic instructions". The former apparently corresponding to a mnemonic, and the latter corresponding to the combinations of mnemonics with addressing modes:
| Device | instruction types | basic instructions |
|---|---|---|
| TLCS-90 | 163 | |
| TLCS-870 | 129 | 412 |
| TLCS-870/X | 842 | |
| TLCS-870/C | 132 | 731 |
| TLCS-870/C1 | 133 | 732 |
The large number of basic instructions in later devices is mostly due to exotic addressing modes, that would rarely be needed by SDCC. There was also some renaming of mnemonics and jump conditions - when we add support int he assembler we need to decide if we want to stick with the more Z80-like ones of the TLCS-90 or use the ones from TLCS-870/C documentation.
It probably would make sense to have SDCC ports for the TLCS-870/C and TLCS-870/C1, since the latter is still in production., and we could support the TLCS-870/C relatively easily in the compiler since its instruction set is a superset of TLCS-90 and a subset of to-be-supported TLCS-870/C1. However, there are differences in instruction timing between TLCS-870/C and TLCS-870/C1, so there is extra work required in the simulator and in the cost function for the register allocator.
The TLCS-90 has the same register set as the Z80 (however, some TLCS-90 devices apparently have 4-bit BX and BY registers that for some instructions combine with IX and IY to make a 20-bit address). Compared to the Z80 and TLCS-90, the TLCS-870 lacks the IX and IY registers, but adds a W register. All futherTLCS-870 variants keep the W registers, but also have the IX and IY registers. However, for TLCS-870/X only, the IX, IY, SP and PC registers are 20 bits wide, instead of 16 bits.
It is probably not worth adding support for the no-longer available TLCS-870/X and any TLCS-900 devices. TLCS-870 support should be feasible by combining existing support for targets lacking IX and IY with infrastructure from the TLCS-90 and TLCS-870C support.
Compared to TLCS-870/C, the TLCS-870/C1 only adds a single instruction (selecting the register set, via the new rbs flag), and changes the semantics of the a(pc) addressing mode. The instruction encoding stays the same, but there are substantial differences in timing. The TLCS-870/C1 is the only variant that has an alternate register set. This includes all data registers (i.e. unlike for Z80, IX' and IY' also exist). Unlike other Z80 variants, it doesn't really have instructions to directly transfer data between the register sets, though). But SDCC currently does not use the alternate register set on any z80-related port anyway. Like for other z80-related ports, users might want to use the alternate register set for assembler-implemented low-latency interrupt handler.
Preliminary plan:
tlcs90 port for TLCS-90: add __far pointer support, add correct code size in cost function (instead of using Z80 one). Otherwise keep this low-effort -emphasis on correctness, not optimization, since this port most likely has very few users. Complete English instruction set documentation is available as .pdf.
tlcs870 port for TLCS-870: support it, since in codegen we usually can treat like either sm83 or tlcs870c, might as well give it entries in the cost function for code size and cycle counts if we need to make changes there anyway. Otherwise keep this low-effort -emphasis on correctness, not optimization, since this port most likely has very few users. Complete English instruction set documentation is available on paper.
tlcs870x port for TLCS-870/X: Don't bother supporting it. Port would likely have very few users, but require substantial effort. Apparently no instruction set documentation available.
tlcs870c port for TLCS-870/C: support it, since in the compiler we could just treat it like tlcs870c, apart from the cycle counts in the cost function. While this port likely has very few users, we should get quite good code, even with optimization is geared towards TLCS-870/C1. Incomplete English instruction set documentation is available as .pdf.
tlcs870c1 port for TLCS-870/C1: this is where the main effort should go, since these are still in production. We should go all the way - cost function for code size and cycle counts, ensure that we make good use of the instruction set in cod generation. Complete Japanese instruction set documentation is available as .pdf.
For all TLCs-870 variants, we could mostly just ignore the W register for now - it is only really important to generate efficient TLCS-870 code, much less important for TLCS-870/C and TLCS-870/C1. The difference (vs. other Z80 variants, including TLCS-90) in flag handling is substantial, though - all TLCS-870 variants do not use an af register, and many instructions affect additional flags.
