From: List <li...@sw...> - 2008-05-28 04:52:54
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Great, thanks, I'm usind the C8051F060DK and a design of my own. Both of them have the problem. System clock is 11.0592MHz with an external clock. or double (DK) with internal clock divider by 2 activated. Dani Maarten Brock wrote: > Dani, > > I would be willing to help you, yet I do not have access > to an F06x. What are you using yourself? A SiLabs > C8051F060DK demokit or the smaller C8051F064EK > evaluation kit or a design of your own? And how are you > clocking it? > > Maarten > > > >> Dear List, >> >> is there anybody who can please provide me an example using both ADC0 >> and 1 on the C8051F06x accessing on-chip XRAM? I think there is really a >> problem with my DMA controller setting. Sometime the MOVX A,@DPTR >> instruction is not correctly executed which leads to wrong ACC content >> after the instruction. I know the example from the Silabs IDE,but that >> uses the off-chip xram. >> >> best regards >> >> Dani >> >> ------------------------------------------------------------------------- >> This SF.net email is sponsored by: Microsoft >> Defy all challenges. Microsoft(R) Visual Studio 2008. >> http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ >> _______________________________________________ >> Sdcc-user mailing list >> Sdc...@li... >> https://lists.sourceforge.net/lists/listinfo/sdcc-user >> >> > > > > ------------------------------------------------------------------------- > This SF.net email is sponsored by: Microsoft > Defy all challenges. Microsoft(R) Visual Studio 2008. > http://clk.atdmt.com/MRT/go/vse0120000070mrt/direct/01/ > _______________________________________________ > Sdcc-user mailing list > Sdc...@li... > https://lists.sourceforge.net/lists/listinfo/sdcc-user > > |