[sdcc-devel] [ sdcc-Bugs-1034701 ] buggy banksel-directive generation

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Bugs item #1034701, was opened at 2004-09-25 18:51
Message generated for change (Tracker Item Submitted) made by Item Submitter
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Category: pic16 target
Group: None
Status: Open
Resolution: None
Priority: 5
Submitted By: ccsporters (tecodev)
Assigned to: Nobody/Anonymous (nobody)
Summary: buggy banksel-directive generation

Initial Comment:
Unfortunately the banksel-generation fails if two
skip-statements follow each other in the assembler file:

BTFSC STATUS,0
INCFSZ (var1),W,B
ADDWF (var2),F,B

is turned into

BTFSS STATUS,0
GOTO label_1
BANKSEL (var1)
INCFSNZ (var1),W,B
label_1:
GOTO label_2
BANKSEL (var2)
ADDWF (var2),F,B
label_2:

I fixed this by inserting the GOTO after the (new,
inverted) SKIP-statement, but inserting the banksel (as
before) after pc->prev.
This leeps the GOTO statement before the label
perceeding pc's instruction while inserting the BANKSEL
instruction after the label.

The change has to be done in pcode.c, line 6121, patch
attached.

Raphael Neider


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