#4075 uCsim incorrect STA ZP,X for HuC6280

[Gabriele Gorla]

STA ZP,X
stores the value at 0x0000,X instead of 0x2000,X
According to

Stop at 0x002229: (109) stepped 2 ticks
A= $00   0   +0 .  X= $01   1   +1 .  Y= $0e  14  +14 .  
P= 00000100
   NVTBDIZC
S= 0x21ff 22 cf 32 f6 f0 6c 71 3e ".2..lq>
0x2229    95 00                STA    $0000,X            ; [$0001]=$00
F 0x002229
0> 

Stop at 0x00222b: (109) stepped 4 ticks
A= $00   0   +0 .  X= $01   1   +1 .  Y= $0e  14  +14 .  
P= 00000100
   NVTBDIZC
S= 0x21ff 22 cf 32 f6 f0 6c 71 3e ".2..lq>
0x222b    e8                   INX
F 0x00222b

0> dump /x 0x2000 0x2008
0x2000 70 2c 87 6e 1f 88 cf 0a p,.n....

according to:
http://www.shu.sheldows.com/shu/download/pcedocs/pce_memory.html

The Instructions for accessing the zero-page or the stack will always work on segment F8.

regardless of the MPR1 setting

[Daniel Drotos]

[r16871] Place of ZP is configurable with ZPh variable, on 6280 it's 0x2000 by default. Manual of the 6280 doesn't say that MPR1 is not used for ZP... This revision still uses mapping, but at 0x2000.

[Gabriele Gorla]

The official HuC documentation is inconsistent with what I found on the internet.

For example (according to MAME sources at https://github.com/mamedev/mame/blob/master/src/devices/cpu/h6280/h6280.cpp):
SBC should use the T flags (docs say only ADC, OR, EOR and AND use T flag).
this reference instead claims that SBC is not supported by the T flag http://dreamjam.co.uk/emuviews/txt/pcetech.txt

This page claims that ZP is always from segment 0xF8:
http://www.shu.sheldows.com/shu/download/pcedocs/pce_memory.html
this page also claims that ZP and stack are not affected by MPR:
https://chibiakumas.com/6502/pcengine.php?noui=1
MAME uses MPR for the zero page and stack.

Not really sure who is correct as I don;t know the HW to verify.