#1375 LexVHDL.cxx allow <'> (apostrophe) as word start

[el-coder]

Hi,

as discussed at other places (see links below), it would be great to allow/detect <'> (apostrophe) as word start of vhdl keyword.

Background:
There exist keywords in vhdl which can be used with and without leading <'>, beeing a different kind of keyword in each case (e.g. range and 'range).

A quick look at LexVHDL.cxx makes me believe that this could be a minimal change in IsAWordStart(). But may be there are side effects I do not see.

If further background is needed:
https://github.com/notepad-plus-plus/notepad-plus-plus/issues/8511

https://community.notepad-plus-plus.org/topic/19944/langs-xml-distinguish-between-range-and-range-apostrophe/2

[Neil Hodgson]

That will conflict with character literals.
https://vhdl.renerta.com/mobile/source/vhd00041.htm

[el-coder]

Ohh, yes you are right!
OK, so this would require deeper changes like additional look-behind assertion.

I could understand if this does not get high priority as the benefit is not that big.
However if anyone could spend some time on it, this would be fine.

[Neil Hodgson]

VHDL is like Ada and the Ada lexer has an apostropheStartsAttribute variable that gets passed everywhere to track this.

In general, there isn't anyone that works on lexers. Its up to people that use lexers to maintain them.

[el-coder]

Thank´s for that advice. I wasn´t aware of the similarity of these languages.

OK, as I´m not a SW-Developer we will see what happens first: Anyone with more SW skills implements it (I can assist with my VHDL knowledge) or I get a huge amount of time to do so.