Re: AW: [ros-kernel]Fw: Boot problem with CVS changes from friday/saturday.

[<we...@cw...>]

Quoting Hartmut Birr <har...@te...>:

> I get the some crash at bochs and on real hardware withe adifferent
> error 
> message. The problem comes from the changes in ntoskrnl/ke/i386/irq.c,
> 
> ntoskrnl\ps\idle.c and hal\halx86\irql.c.
> 
Yes, I agree. The problem is that the irq is unmasked then the interrupt
flag is set then we go on to do a lot more processing. For a quick fix we could 
move the cli/enable interrupt/sti sequence after the DPC/thread processing but
then the latency of individual interrupts would increase. The long term
solution is to process interrupts as NT (or at least the uniprocessor HAL) 
does; never touch the ISA PIC after initialization, set a flag during an
interrupt prolog set a flag saying that the handler is active and then enable 
interrupts, if another interrupt occurs while the handler is active then 
queue the interrupt up to be executed by the original handler, after the
original device handler and all queued interrupts have executed clear the flag
and do any non-interrupt specific processing like executing DPCs:-

1. Set per-interrupt flag.
2. If per-interrupt flag was already set, increment per-interrupt counter and
return.
3. Enable interrupts.
4. Call device handler.
5. Check the per-interrupt counter, if greater than zero then goto to step 4.
6. Clear the per-interrupt flag.
7. Execute DPCs, APCs and thread dispatching.