From: Amaninder S. <ama...@gm...> - 2013-02-15 14:49:19
|
Hi there Please accept this cover letter and resume as my formal application for a position as R&D Engineer in circuit simulation. I am a Canadian citizen and recently finished my Master of Applied Science (MASc.) in Electrical Engineering from Carleton University. During my Masters, I had an opportunity to work with one of the best EDA research groups in a world. We focus on circuit simulators, modeling of interconnects and signal integrity issues. Here I learned about graph theory, graph partitioning and Elmore delay. I received A+ in all linear algebra courses. My area of research is related to an analysis of transmission line interconnects. This research is applied in timing optimization of critical paths of a circuit. As the feature size of VLSI devices is getting smaller and operating frequency is getting higher the circuit simulation time has become a critical factor. Circuit simulation time is affected by level of accuracy required that is set by numerical integration method. If the circuit is non-linear then the Newton-Raphson method is also used. I would be happy to meet you to further discuss your requirements and my qualifications. I believe the skills and knowledge I possess would be a good fit with the work that Qucs does. A demonstration code of my own SPICE like simulator is available at www.doe.carleton.ca/~assaini/CAD_Demo/CAD_Code_Demo.htm Sincerely, Amaninder Saini ama...@gm... |