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#196 Simulation becomes very slow if SPAR and TRAN active on same schematic

0.0.19
closed-invalid
nobody
None
1
2016-12-30
2016-12-29
No

Simulation becomes very slow if S-parameter and transient simulation block active on same schematic:

Example: <<ORT-1200_prj.zip>>
  1. please simulate "top_spar.sch" -> fast S-parameter simulation
  2. please simulate "top_tran.sch" -> fast transient simulation
  3. please simulate "top.sch" -> slow simulation of transient and S-parameter (why?)

There should be no reason why the combined S-parameter and transient simulation of the same circuit becomes very slow.

Best regards,
Werner

1 Attachments

Discussion

  • Werner Simbuerger

    "top_1.sch" is the better combined schematic to simulate both S-parameter and transient of same circuit

     
  • Werner Simbuerger

    Update: I found the error, unfortunately it was my fault - sorry - I forgot to set the port power to zero, which did cause transient exitation at 1 GHz

    Please close or delete this case... Thx, Werner

     
  • Claudio Girardi

    Claudio Girardi - 2016-12-30
    • status: open --> closed-invalid
     
  • Claudio Girardi

    Claudio Girardi - 2016-12-30

    no problem, good to know that now it works fine :)

     

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