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#17 Transient simulation broken
Well i draw a schematic of a cmos inverter under Qucs
0.0.9. It's work, result are as i hope. And i try on
the last version 0.0.10 where the simulation hang :
simulation status didn't progress. qucsator is using
100% of cpu time.
Is there something wrong with my circuit ?
I also notice that there is no backward compatibility
between this 2 releases. Qucs 0.0.10 add some new tags
in the sch file. So a preview version cannot load a
file created by a new version of Qucs...
Cmos inverter schematic create with Qucs 0.0.9
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Hi there! There have been two changes between the releases
which may influence the behaviour of your circuit. The
rectangular source got rise/fall times. Set these to zero
to get the previous behaviour. Also the transient
simulation has now an "initialDC" property. Set this
to "no" to get the previous behaviour. I assume setting
Tr/Tf to zero will do the job...
Hope this helps, Stefan.
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Hi
I am not simulation expert but set tr and tf to 1 ns is not
someting absurd.
In this condition (i let tr and tf to 1 ns) and with
initialDC to no the simulation seem very very long i ask a
calcul for 11 values and it ask more than 20 minutes (i say
20 minites but the progress bar is at 63%) on a simplest
circuit on a centrino@1,7Ghz...
So i am wondering about performance ...
There is warning message in the simulation box like :
delta rejected at t= 6.000e-3, h= 1.000e-16(no convergence)
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Hi there!
These problem you encounter are convergence problems in the
transient analysis due to the "high-impedance node" called
output. With a 10MOhm shunt to ground the problems
disappear I assume...
Hope this helps, Stefan.
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The shunt resistor explicitly set the high impedence node
,the simulation work, it seems that calcul converge now ? (i
get expected result), but i still have this warning message
of no convergence... so there is still something wrong...
extract of log.txt:
[...]
netlist content
1 R instances
1 Vdc instances
1 Vrect instances
2 MOSFET instances
1 TR instances
creating netlist...
NOTIFY: TR1: creating node list for transient analysis
NOTIFY: TR1: solving transient netlist
WARNING: adjust Pb, Nsub or Cj to get a valid square
junction capacitance
NOTIFY: Cox=3.45313e-16, Beta=2e-05 Ga=0, Phi=0.6, Vto=1
WARNING: adjust Pb, Nsub or Cj to get a valid square
junction capacitance
NOTIFY: Cox=3.45313e-16, Beta=2e-05 Ga=0, Phi=0.6, Vto=-1
NOTIFY: TR1: average time-step 3.42114e-06, 839 rejections
NOTIFY: TR1: average NR-iterations 3.09819, 97 non-convergences
_net0.Vt = [12;12;12;12;12;12;12;12;12;12;12]
output.Vt =
[11.9945;2.22268e-08;11.9945;2.11759e-08;11.9945;2.16306e-08;11.9945;2.1944e-08;11.9945;2.16264e-08;11.9945]
input.Vt = [0;12;0;12;0;12;0;12;0;12;0]
V1.It =
[-1.19946e-06;3.57211e-05;-1.38508e-05;-1.22173e-05;-1.70516e-05;-9.30526e-06;-1.42792e-05;1.09614e-05;-1.72125e-05;9.04394e-06;-1.3389e-05]
V2.It =
[2.09153e-20;-7.18668e-05;2.40028e-05;2.41283e-05;3.19899e-05;1.67032e-05;2.50977e-05;-2.15865e-05;3.2431e-05;-1.60787e-05;2.27859e-05]
time =
[0;0.001;0.002;0.003;0.004;0.005;0.006;0.007;0.008;0.009;0.01]
kB = 1.38065e-23
e = 2.71828
pi = 3.14159
Simulation terminée lelun 04. sep 2006 à 17:45:47
Prêt.
Erreurs :
----------
WARNING: delta rejected at t = 4.992e-10, h = 3.887e-13 (no
convergence)
WARNING: delta rejected at t = 4.998e-10, h = 2.212e-14 (no
convergence)
WARNING: delta rejected at t = 4.998e-10, h = 9.479e-15 (no
convergence)
WARNING: delta rejected at t = 4.998e-10, h = 7.738e-15 (no
convergence)
WARNING: delta rejected at t = 4.998e-10, h = 2.866e-15 (no
convergence)
WARNING: delta rejected at t = 4.998e-10, h = 1.433e-15 (no
convergence)
[...]
Tanks for the tip.
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Hi there!
Consider these warnings as "normal" for circuits containing
MOSFET devices, as they are currently implemented.
Do you consider the behaviour still as a bug?
Cheers, Stefan.
this bug is very old. please reopen if still applicable