[perfmon2] [PATCH 1/5] Code cleanup: whitespace changes only
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[perfmon2] [PATCH 1/5] Code cleanup: whitespace changes only
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From: Robert R. <rob...@am...> - 2008-05-16 18:18:10
|
Signed-off-by: Robert Richter <rob...@am...>
---
arch/ia64/kernel/process.c | 2 +-
arch/ia64/kernel/sys_ia64.c | 3 +-
arch/ia64/oprofile/perfmon.c | 2 +-
arch/ia64/perfmon/perfmon.c | 12 +-
arch/ia64/perfmon/perfmon_compat.c | 60 +++++-----
arch/ia64/perfmon/perfmon_default_smpl.c | 20 ++--
arch/ia64/perfmon/perfmon_generic.c | 38 +++---
arch/ia64/perfmon/perfmon_itanium.c | 103 ++++++++--------
arch/ia64/perfmon/perfmon_mckinley.c | 155 ++++++++++++-----------
arch/ia64/perfmon/perfmon_montecito.c | 194 +++++++++++++++--------------
arch/mips/kernel/signal.c | 12 +-
arch/mips/perfmon/perfmon.c | 44 ++++----
arch/mips/perfmon/perfmon_mips64.c | 48 ++++----
arch/powerpc/perfmon/perfmon_power4.c | 6 +-
arch/powerpc/perfmon/perfmon_power5.c | 16 ++--
arch/powerpc/perfmon/perfmon_power6.c | 66 +++++-----
arch/sparc64/kernel/cpu.c | 2 +-
arch/sparc64/kernel/traps.c | 6 +-
arch/sparc64/perfmon/perfmon.c | 16 ++--
arch/x86/perfmon/perfmon.c | 18 ++--
arch/x86/perfmon/perfmon_amd64.c | 10 +-
arch/x86/perfmon/perfmon_intel_arch.c | 52 ++++----
arch/x86/perfmon/perfmon_intel_core.c | 26 ++--
arch/x86/perfmon/perfmon_p4.c | 124 +++++++++---------
arch/x86/perfmon/perfmon_p6.c | 34 +++---
arch/x86/perfmon/perfmon_pebs_core_smpl.c | 18 ++--
arch/x86/perfmon/perfmon_pebs_p4_smpl.c | 15 +--
include/asm-ia64/perfmon.h | 2 +-
include/asm-ia64/perfmon_default_smpl.h | 2 +-
include/asm-ia64/perfmon_kern.h | 2 +-
include/asm-mips/perfmon_kern.h | 94 +++++++-------
include/asm-powerpc/perfmon_kern.h | 4 +-
include/asm-sparc64/perfmon_kern.h | 4 +-
include/asm-x86/cpufeature_32.h | 2 +-
include/asm-x86/perfmon_kern.h | 4 +-
include/linux/perfmon_fmt.h | 2 +-
include/linux/perfmon_kern.h | 16 ++--
include/linux/perfmon_pmu.h | 6 +-
perfmon/perfmon_attach.c | 4 +-
perfmon/perfmon_ctx.c | 6 +-
perfmon/perfmon_ctxsw.c | 8 +-
perfmon/perfmon_debugfs.c | 6 +-
perfmon/perfmon_dfl_smpl.c | 32 +++---
perfmon/perfmon_file.c | 14 +-
perfmon/perfmon_fmt.c | 6 +-
perfmon/perfmon_hotplug.c | 2 +-
perfmon/perfmon_intr.c | 8 +-
perfmon/perfmon_msg.c | 10 +-
perfmon/perfmon_pmu.c | 6 +-
perfmon/perfmon_res.c | 2 +-
perfmon/perfmon_rw.c | 8 +-
perfmon/perfmon_sets.c | 6 +-
perfmon/perfmon_smpl.c | 38 +++---
perfmon/perfmon_sysfs.c | 46 ++++----
54 files changed, 730 insertions(+), 712 deletions(-)
diff --git a/arch/ia64/kernel/process.c b/arch/ia64/kernel/process.c
index dbdb7c4..4befe1d 100644
--- a/arch/ia64/kernel/process.c
+++ b/arch/ia64/kernel/process.c
@@ -705,7 +705,7 @@ exit_thread (void)
ia64_drop_fpu(current);
- /* if needed, stop monitoring and flush state to perfmon context */
+ /* if needed, stop monitoring and flush state to perfmon context */
pfm_exit_thread();
/* free debug register resources */
diff --git a/arch/ia64/kernel/sys_ia64.c b/arch/ia64/kernel/sys_ia64.c
index a6b48cc..3b1c303 100644
--- a/arch/ia64/kernel/sys_ia64.c
+++ b/arch/ia64/kernel/sys_ia64.c
@@ -286,7 +286,8 @@ sys_pciconfig_write (unsigned long bus, unsigned long dfn, unsigned long off, un
#endif /* CONFIG_PCI */
#ifndef CONFIG_IA64_PERFMON_COMPAT
-asmlinkage long sys_perfmonctl (int fd, int cmd, void __user *arg, int count)
+asmlinkage long
+sys_perfmonctl (int fd, int cmd, void __user *arg, int count)
{
return -ENOSYS;
}
diff --git a/arch/ia64/oprofile/perfmon.c b/arch/ia64/oprofile/perfmon.c
index d481a47..2472c29 100644
--- a/arch/ia64/oprofile/perfmon.c
+++ b/arch/ia64/oprofile/perfmon.c
@@ -19,7 +19,7 @@ static int allow_ints;
static int
perfmon_handler(void *buf, struct pfm_ovfl_arg *arg,
- unsigned long ip, u64 stamp, void *data)
+ unsigned long ip, u64 stamp, void *data)
{
struct pt_regs *regs = data;
int event = arg->pmd_eventid;
diff --git a/arch/ia64/perfmon/perfmon.c b/arch/ia64/perfmon/perfmon.c
index 3d29f39..9e55fdf 100644
--- a/arch/ia64/perfmon/perfmon.c
+++ b/arch/ia64/perfmon/perfmon.c
@@ -370,9 +370,9 @@ int pfm_arch_setfl_sane(struct pfm_context *ctx, u32 flags)
PFM_ITA_SETFL_EXCL_INTR)
/* exclude return value field */
-#define PFM_SETFL_ALL_MASK ( PFM_ITA_SETFL_BOTH_INTR \
- | PFM_SETFL_BOTH_SWITCH \
- | PFM_ITA_SETFL_IDLE_EXCL)
+#define PFM_SETFL_ALL_MASK (PFM_ITA_SETFL_BOTH_INTR \
+ | PFM_SETFL_BOTH_SWITCH \
+ | PFM_ITA_SETFL_IDLE_EXCL)
if ((flags & ~PFM_SETFL_ALL_MASK)) {
PFM_DBG("invalid flags=0x%x", flags);
@@ -448,7 +448,7 @@ void pfm_arch_mask_monitoring(struct pfm_context *ctx, struct pfm_event_set *set
* registers only starting at PMC4.
*/
mask = arch_info->mask_pmcs[0] >> PFM_ITA_FCNTR;
- for(i = PFM_ITA_FCNTR; mask; i++, mask >>=1) {
+ for (i = PFM_ITA_FCNTR; mask; i++, mask >>= 1) {
if (likely(mask & 0x1))
ia64_set_pmc(i, set->pmcs[i] & ~0xfUL);
}
@@ -528,7 +528,7 @@ void pfm_arch_restore_pmcs(struct pfm_context *ctx, struct pfm_event_set *set)
for (i = PFM_ITA_FCNTR;
impl_mask;
- i++, impl_mask >>=1, mask_pmcs >>=1) {
+ i++, impl_mask >>= 1, mask_pmcs >>= 1) {
if (likely(impl_mask & 0x1)) {
mask2 = mask_pmcs & 0x1 ? plm : ~0;
val = set->pmcs[i] & mask2;
@@ -913,7 +913,7 @@ EXPORT_SYMBOL(pfm_ia64_mark_dbregs_used);
char *pfm_arch_get_pmu_module_name(void)
{
- switch(local_cpu_data->family) {
+ switch (local_cpu_data->family) {
case 0x07:
return "perfmon_itanium";
case 0x1f:
diff --git a/arch/ia64/perfmon/perfmon_compat.c b/arch/ia64/perfmon/perfmon_compat.c
index 907d418..43140f4 100644
--- a/arch/ia64/perfmon/perfmon_compat.c
+++ b/arch/ia64/perfmon/perfmon_compat.c
@@ -44,10 +44,10 @@ extern ssize_t __pfm_read(struct pfm_context *ctx,
* passed via the PMC, now they are passed via the PMD.
*/
static int pfm_compat_update_pmd(struct pfm_context *ctx, u16 set_id, u16 cnum,
- u32 rflags,
- unsigned long *smpl_pmds,
- unsigned long *reset_pmds,
- u64 eventid)
+ u32 rflags,
+ unsigned long *smpl_pmds,
+ unsigned long *reset_pmds,
+ u64 eventid)
{
struct pfm_event_set *set;
int is_counting;
@@ -648,7 +648,7 @@ int pfm_smpl_buf_alloc_compat(struct pfm_context *ctx, size_t rsize,
* partially initialize the vma for the sampling buffer
*/
vma->vm_mm = mm;
- vma->vm_flags = VM_READ| VM_MAYREAD |VM_RESERVED;
+ vma->vm_flags = VM_READ | VM_MAYREAD | VM_RESERVED;
vma->vm_page_prot = PAGE_READONLY;
vma->vm_ops = &pfm_buf_map_vm_ops;
vma->vm_file = filp;
@@ -836,7 +836,7 @@ static long pfm_create_context_old(int fd, void __user *ureq, int count)
usmpl_arg = ureq+sizeof(req_old);
ret = pfm_get_smpl_arg_old(req_old.ctx_smpl_buf_id, usmpl_arg, -1,
- &smpl_arg, &fmt);
+ &smpl_arg, &fmt);
if (ret)
return ret;
@@ -889,7 +889,7 @@ static long pfm_debug_old(int fd, void __user *arg, int count)
if (count != 1)
return -EINVAL;
- if (get_user(m, (int __user*)arg))
+ if (get_user(m, (int __user *)arg))
return -EFAULT;
@@ -900,7 +900,7 @@ static long pfm_debug_old(int fd, void __user *arg, int count)
if (m == 0)
for_each_online_cpu(m) {
- memset(&per_cpu(pfm_stats,m), 0,
+ memset(&per_cpu(pfm_stats, m), 0,
sizeof(struct pfm_stats));
}
return 0;
@@ -964,7 +964,7 @@ struct pfm_cmd_desc {
{ .cmd_func = NULL \
}
-static struct pfm_cmd_desc pfm_cmd_tab[]={
+static struct pfm_cmd_desc pfm_cmd_tab[] = {
/* 0 */PFM_CMD_NONE,
/* 1 */PFM_CMD(pfm_write_pmcs_old),
/* 2 */PFM_CMD(pfm_write_pmds_old),
@@ -1005,7 +1005,7 @@ static struct pfm_cmd_desc pfm_cmd_tab[]={
/*
* system-call entry point (must return long)
*/
-asmlinkage long sys_perfmonctl (int fd, int cmd, void __user *arg, int count)
+asmlinkage long sys_perfmonctl(int fd, int cmd, void __user *arg, int count)
{
if (perfmon_disabled)
return -ENOSYS;
@@ -1066,27 +1066,27 @@ ssize_t pfm_arch_compat_read(struct pfm_context *ctx,
o_msg = &old_msg_buf.pfm_ovfl_msg;
n_msg = &msg_buf.pfm_ovfl_msg;
- switch(msg_buf.type) {
- case PFM_MSG_OVFL:
- o_msg->msg_type = PFM_MSG_OVFL;
- o_msg->msg_ctx_fd = 0;
- o_msg->msg_active_set = n_msg->msg_active_set;
- o_msg->msg_tstamp = 0;
-
- o_msg->msg_ovfl_pmds[0] = n_msg->msg_ovfl_pmds[0];
- o_msg->msg_ovfl_pmds[1] = n_msg->msg_ovfl_pmds[1];
- o_msg->msg_ovfl_pmds[2] = n_msg->msg_ovfl_pmds[2];
- o_msg->msg_ovfl_pmds[3] = n_msg->msg_ovfl_pmds[3];
- break;
- case PFM_MSG_END:
- o_msg->msg_type = PFM_MSG_END;
- o_msg->msg_ctx_fd = 0;
- o_msg->msg_tstamp = 0;
- break;
- default:
- PFM_DBG("unknown msg type=%d", msg_buf.type);
+ switch (msg_buf.type) {
+ case PFM_MSG_OVFL:
+ o_msg->msg_type = PFM_MSG_OVFL;
+ o_msg->msg_ctx_fd = 0;
+ o_msg->msg_active_set = n_msg->msg_active_set;
+ o_msg->msg_tstamp = 0;
+
+ o_msg->msg_ovfl_pmds[0] = n_msg->msg_ovfl_pmds[0];
+ o_msg->msg_ovfl_pmds[1] = n_msg->msg_ovfl_pmds[1];
+ o_msg->msg_ovfl_pmds[2] = n_msg->msg_ovfl_pmds[2];
+ o_msg->msg_ovfl_pmds[3] = n_msg->msg_ovfl_pmds[3];
+ break;
+ case PFM_MSG_END:
+ o_msg->msg_type = PFM_MSG_END;
+ o_msg->msg_ctx_fd = 0;
+ o_msg->msg_tstamp = 0;
+ break;
+ default:
+ PFM_DBG("unknown msg type=%d", msg_buf.type);
}
- if(copy_to_user(buf, &old_msg_buf, sizeof(old_msg_buf)))
+ if (copy_to_user(buf, &old_msg_buf, sizeof(old_msg_buf)))
ret = -EFAULT;
PFM_DBG_ovfl("ret=%d", ret);
return ret;
diff --git a/arch/ia64/perfmon/perfmon_default_smpl.c b/arch/ia64/perfmon/perfmon_default_smpl.c
index 0347ddd..da0c312 100644
--- a/arch/ia64/perfmon/perfmon_default_smpl.c
+++ b/arch/ia64/perfmon/perfmon_default_smpl.c
@@ -55,8 +55,7 @@ static int pfm_default_fmt_validate(u32 flags, u16 npmds, void *data)
* compute min buf size. All PMD are manipulated as 64bit entities
*/
min_buf_size = sizeof(struct pfm_default_smpl_hdr)
- + (sizeof(struct pfm_default_smpl_entry)
- + (npmds*sizeof(u64)));
+ + (sizeof(struct pfm_default_smpl_entry) + (npmds*sizeof(u64)));
PFM_DBG("validate flags=0x%x npmds=%u min_buf_size=%lu "
"buf_size=%lu CPU%d", flags, npmds, min_buf_size,
@@ -65,7 +64,8 @@ static int pfm_default_fmt_validate(u32 flags, u16 npmds, void *data)
/*
* must hold at least the buffer header + one minimally sized entry
*/
- if (arg->buf_size < min_buf_size) return -EINVAL;
+ if (arg->buf_size < min_buf_size)
+ return -EINVAL;
return 0;
}
@@ -126,7 +126,8 @@ static int pfm_default_fmt_handler(void *buf, struct pfm_ovfl_arg *arg,
/*
* precheck for sanity
*/
- if ((last - cur) < PFM_DEFAULT_MAX_ENTRY_SIZE) goto full;
+ if ((last - cur) < PFM_DEFAULT_MAX_ENTRY_SIZE)
+ goto full;
npmds = arg->num_smpl_pmds;
@@ -178,7 +179,7 @@ static int pfm_default_fmt_handler(void *buf, struct pfm_ovfl_arg *arg,
*/
if (npmds) {
u64 *val = arg->smpl_pmds_values;
- for(i=0; i < npmds; i++) {
+ for (i = 0; i < npmds; i++) {
*e++ = *val++;
}
}
@@ -192,7 +193,8 @@ static int pfm_default_fmt_handler(void *buf, struct pfm_ovfl_arg *arg,
/*
* post check to avoid losing the last sample
*/
- if ((last - cur) < PFM_DEFAULT_MAX_ENTRY_SIZE) goto full;
+ if ((last - cur) < PFM_DEFAULT_MAX_ENTRY_SIZE)
+ goto full;
/*
* reset before returning from interrupt handler
@@ -213,7 +215,7 @@ full:
* request notification and masking of monitoring.
* Notification is still subject to the overflowed
*/
- arg->ovfl_ctrl = PFM_OVFL_CTRL_NOTIFY| PFM_OVFL_CTRL_MASK;
+ arg->ovfl_ctrl = PFM_OVFL_CTRL_NOTIFY | PFM_OVFL_CTRL_MASK;
return -ENOBUFS; /* we are full, sorry */
}
@@ -237,7 +239,7 @@ static int pfm_default_fmt_exit(void *buf)
return 0;
}
-static struct pfm_smpl_fmt default_fmt={
+static struct pfm_smpl_fmt default_fmt = {
.fmt_name = "default-old",
.fmt_version = 0x10000,
.fmt_arg_size = sizeof(struct pfm_default_smpl_arg),
@@ -248,7 +250,7 @@ static struct pfm_smpl_fmt default_fmt={
.fmt_restart = pfm_default_fmt_restart,
.fmt_exit = pfm_default_fmt_exit,
.fmt_flags = FMT_FLAGS,
- .owner= THIS_MODULE
+ .owner = THIS_MODULE
};
static int pfm_default_fmt_init_module(void)
diff --git a/arch/ia64/perfmon/perfmon_generic.c b/arch/ia64/perfmon/perfmon_generic.c
index 7dfba84..36417b6 100644
--- a/arch/ia64/perfmon/perfmon_generic.c
+++ b/arch/ia64/perfmon/perfmon_generic.c
@@ -36,11 +36,11 @@ MODULE_LICENSE("GPL");
/* forward declaration */
static struct pfm_pmu_config pfm_ia64gen_pmu_conf;
-static struct pfm_arch_pmu_info pfm_ia64gen_pmu_info={
+static struct pfm_arch_pmu_info pfm_ia64gen_pmu_info = {
.mask_pmcs = {PFM_IA64GEN_MASK_PMCS,},
};
-static struct pfm_regmap_desc pfm_ia64gen_pmc_desc[]={
+static struct pfm_regmap_desc pfm_ia64gen_pmc_desc[] = {
/* pmc0 */ PMX_NA,
/* pmc1 */ PMX_NA,
/* pmc2 */ PMX_NA,
@@ -52,7 +52,7 @@ static struct pfm_regmap_desc pfm_ia64gen_pmc_desc[]={
};
#define PFM_IA64GEN_NUM_PMCS ARRAY_SIZE(pfm_ia64gen_pmc_desc)
-static struct pfm_regmap_desc pfm_ia64gen_pmd_desc[]={
+static struct pfm_regmap_desc pfm_ia64gen_pmd_desc[] = {
/* pmd0 */ PMX_NA,
/* pmd1 */ PMX_NA,
/* pmd2 */ PMX_NA,
@@ -66,28 +66,28 @@ static struct pfm_regmap_desc pfm_ia64gen_pmd_desc[]={
static int pfm_ia64gen_pmc_check(struct pfm_context *ctx,
struct pfm_event_set *set,
- struct pfarg_pmc *req)
+ struct pfarg_pmc *req)
{
-#define PFM_IA64GEN_PMC_PM_POS6 (1UL<< 6)
+#define PFM_IA64GEN_PMC_PM_POS6 (1UL<<6)
u64 tmpval;
int is_system;
is_system = ctx->flags.system;
tmpval = req->reg_value;
- switch(req->reg_num) {
- case 4:
- case 5:
- case 6:
- case 7:
- /* set pmc.oi for 64-bit emulation */
- tmpval |= 1UL << 5;
+ switch (req->reg_num) {
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ /* set pmc.oi for 64-bit emulation */
+ tmpval |= 1UL << 5;
- if (is_system)
- tmpval |= PFM_IA64GEN_PMC_PM_POS6;
- else
- tmpval &= ~PFM_IA64GEN_PMC_PM_POS6;
- break;
+ if (is_system)
+ tmpval |= PFM_IA64GEN_PMC_PM_POS6;
+ else
+ tmpval &= ~PFM_IA64GEN_PMC_PM_POS6;
+ break;
}
req->reg_value = tmpval;
@@ -118,7 +118,7 @@ static int pfm_ia64gen_probe_pmu(void)
/*
* impl_pmcs, impl_pmds are computed at runtime to minimize errors!
*/
-static struct pfm_pmu_config pfm_ia64gen_pmu_conf={
+static struct pfm_pmu_config pfm_ia64gen_pmu_conf = {
.pmu_name = "Generic IA-64",
.counter_width = 0, /* computed from PAL_PERFMON_INFO */
.pmd_desc = pfm_ia64gen_pmd_desc,
@@ -130,7 +130,7 @@ static struct pfm_pmu_config pfm_ia64gen_pmu_conf={
.version = "1.0",
.flags = PFM_PMU_BUILTIN_FLAG,
.owner = THIS_MODULE,
- .pmu_info = & pfm_ia64gen_pmu_info
+ .pmu_info = &pfm_ia64gen_pmu_info
/* no read/write checkers */
};
diff --git a/arch/ia64/perfmon/perfmon_itanium.c b/arch/ia64/perfmon/perfmon_itanium.c
index c5c3b55..6670321 100644
--- a/arch/ia64/perfmon/perfmon_itanium.c
+++ b/arch/ia64/perfmon/perfmon_itanium.c
@@ -33,7 +33,7 @@ MODULE_LICENSE("GPL");
#define PFM_ITA_NO64 (1ULL<<5)
-static struct pfm_arch_pmu_info pfm_ita_pmu_info={
+static struct pfm_arch_pmu_info pfm_ita_pmu_info = {
.mask_pmcs = {PFM_ITA_MASK_PMCS,},
};
/* reserved bits are 1 in the mask */
@@ -44,7 +44,7 @@ static struct pfm_arch_pmu_info pfm_ita_pmu_info={
* but this is fine because they are handled separately in the IA-64 specific
* code.
*/
-static struct pfm_regmap_desc pfm_ita_pmc_desc[]={
+static struct pfm_regmap_desc pfm_ita_pmc_desc[] = {
/* pmc0 */ PMX_NA,
/* pmc1 */ PMX_NA,
/* pmc2 */ PMX_NA,
@@ -61,36 +61,36 @@ static struct pfm_regmap_desc pfm_ita_pmc_desc[]={
/* pmc13 */ PMC_D(PFM_REG_W , "PMC13", 0x3ffff00000001UL, 0xfffffffffffffffeUL, 0, 13),
/* pmc14 */ PMX_NA,
/* pmc15 */ PMX_NA,
-/* pmc16 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc24 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc32 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc40 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc48 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc56 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc64 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc72 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc80 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc88 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc96 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc104 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc112 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc120 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc128 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc136 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc144 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc152 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc160 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc168 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc176 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc184 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc192 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc200 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc208 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc216 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc224 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc232 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc240 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc248 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
+/* pmc16 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc24 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc32 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc40 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc48 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc56 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc64 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc72 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc80 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc88 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc96 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc104 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc112 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc120 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc128 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc136 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc144 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc152 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc160 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc168 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc176 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc184 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc192 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc200 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc208 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc216 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc224 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc232 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc240 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc248 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
/* pmc256 */ PMC_D(PFM_REG_W , "IBR0", 0x0, 0, 0, 0),
/* pmc257 */ PMC_D(PFM_REG_W , "IBR1", 0x0, 0x8000000000000000UL, 0, 1),
/* pmc258 */ PMC_D(PFM_REG_W , "IBR2", 0x0, 0, 0, 2),
@@ -110,7 +110,7 @@ static struct pfm_regmap_desc pfm_ita_pmc_desc[]={
};
#define PFM_ITA_NUM_PMCS ARRAY_SIZE(pfm_ita_pmc_desc)
-static struct pfm_regmap_desc pfm_ita_pmd_desc[]={
+static struct pfm_regmap_desc pfm_ita_pmd_desc[] = {
/* pmd0 */ PMD_D(PFM_REG_I , "PMD0", 0),
/* pmd1 */ PMD_D(PFM_REG_I , "PMD1", 1),
/* pmd2 */ PMD_D(PFM_REG_I , "PMD2", 2),
@@ -136,7 +136,7 @@ static int pfm_ita_pmc_check(struct pfm_context *ctx,
struct pfm_event_set *set,
struct pfarg_pmc *req)
{
-#define PFM_ITA_PMC_PM_POS6 (1UL<< 6)
+#define PFM_ITA_PMC_PM_POS6 (1UL<<6)
struct pfm_arch_context *ctx_arch;
u64 tmpval;
u16 cnum;
@@ -147,18 +147,19 @@ static int pfm_ita_pmc_check(struct pfm_context *ctx,
ctx_arch = pfm_ctx_arch(ctx);
is_system = ctx->flags.system;
- switch(cnum) {
- case 4:
- case 5:
- case 6:
- case 7:
- case 10:
- case 11:
- case 12: if (is_system)
- tmpval |= PFM_ITA_PMC_PM_POS6;
- else
- tmpval &= ~PFM_ITA_PMC_PM_POS6;
- break;
+ switch (cnum) {
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ case 10:
+ case 11:
+ case 12:
+ if (is_system)
+ tmpval |= PFM_ITA_PMC_PM_POS6;
+ else
+ tmpval &= ~PFM_ITA_PMC_PM_POS6;
+ break;
}
/*
@@ -170,7 +171,8 @@ static int pfm_ita_pmc_check(struct pfm_context *ctx,
&& ctx_arch->flags.use_dbr == 0) {
PFM_DBG("pmc13 has pmc13.ta cleared, clearing ibr");
ret = pfm_ia64_mark_dbregs_used(ctx, set);
- if (ret) return ret;
+ if (ret)
+ return ret;
}
/*
@@ -178,11 +180,12 @@ static int pfm_ita_pmc_check(struct pfm_context *ctx,
* before they are written (fl_using_dbreg==0) to avoid picking up
* stale information.
*/
- if (cnum == 11 && ((tmpval >> 28)& 0x1) == 0
+ if (cnum == 11 && ((tmpval >> 28) & 0x1) == 0
&& ctx_arch->flags.use_dbr == 0) {
PFM_DBG("pmc11 has pmc11.pt cleared, clearing dbr");
ret = pfm_ia64_mark_dbregs_used(ctx, set);
- if (ret) return ret;
+ if (ret)
+ return ret;
}
req->reg_value = tmpval;
@@ -199,7 +202,7 @@ static int pfm_ita_probe_pmu(void)
/*
* impl_pmcs, impl_pmds are computed at runtime to minimize errors!
*/
-static struct pfm_pmu_config pfm_ita_pmu_conf={
+static struct pfm_pmu_config pfm_ita_pmu_conf = {
.pmu_name = "Itanium",
.counter_width = 32,
.pmd_desc = pfm_ita_pmd_desc,
diff --git a/arch/ia64/perfmon/perfmon_mckinley.c b/arch/ia64/perfmon/perfmon_mckinley.c
index cb1914f..efa43cf 100644
--- a/arch/ia64/perfmon/perfmon_mckinley.c
+++ b/arch/ia64/perfmon/perfmon_mckinley.c
@@ -33,7 +33,7 @@ MODULE_LICENSE("GPL");
#define PFM_MCK_NO64 (1UL<<5)
-static struct pfm_arch_pmu_info pfm_mck_pmu_info={
+static struct pfm_arch_pmu_info pfm_mck_pmu_info = {
.mask_pmcs = {PFM_MCK_MASK_PMCS,},
};
@@ -46,7 +46,7 @@ static struct pfm_arch_pmu_info pfm_mck_pmu_info={
* but this is fine because they are handled separately in the IA-64 specific
* code.
*/
-static struct pfm_regmap_desc pfm_mck_pmc_desc[]={
+static struct pfm_regmap_desc pfm_mck_pmc_desc[] = {
/* pmc0 */ PMX_NA,
/* pmc1 */ PMX_NA,
/* pmc2 */ PMX_NA,
@@ -63,36 +63,36 @@ static struct pfm_regmap_desc pfm_mck_pmc_desc[]={
/* pmc13 */ PMC_D(PFM_REG_W , "PMC13", 0x2078fefefefeUL, 0xfffe1fffe7e7e7e7UL, 0, 13),
/* pmc14 */ PMC_D(PFM_REG_W , "PMC14", 0x0db60db60db60db6UL, 0xffffffffffffdb6dUL, 0, 14),
/* pmc15 */ PMC_D(PFM_REG_W , "PMC15", 0xfffffff0UL, 0xfffffffffffffff0UL, 0, 15),
-/* pmc16 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc24 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc32 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc40 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc48 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc56 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc64 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc72 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc80 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc88 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc96 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc104 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc112 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc120 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc128 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc136 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc144 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc152 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc160 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc168 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc176 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc184 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc192 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc200 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc208 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc216 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc224 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc232 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc240 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc248 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
+/* pmc16 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc24 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc32 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc40 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc48 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc56 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc64 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc72 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc80 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc88 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc96 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc104 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc112 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc120 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc128 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc136 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc144 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc152 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc160 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc168 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc176 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc184 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc192 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc200 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc208 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc216 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc224 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc232 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc240 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc248 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
/* pmc256 */ PMC_D(PFM_REG_W , "IBR0", 0x0, 0, 0, 0),
/* pmc257 */ PMC_D(PFM_REG_W , "IBR1", 0x0, 0x8000000000000000UL, 0, 1),
/* pmc258 */ PMC_D(PFM_REG_W , "IBR2", 0x0, 0, 0, 2),
@@ -112,7 +112,7 @@ static struct pfm_regmap_desc pfm_mck_pmc_desc[]={
};
#define PFM_MCK_NUM_PMCS ARRAY_SIZE(pfm_mck_pmc_desc)
-static struct pfm_regmap_desc pfm_mck_pmd_desc[]={
+static struct pfm_regmap_desc pfm_mck_pmd_desc[] = {
/* pmd0 */ PMD_D(PFM_REG_I, "PMD0", 0),
/* pmd1 */ PMD_D(PFM_REG_I, "PMD1", 1),
/* pmd2 */ PMD_D(PFM_REG_I, "PMD2", 2),
@@ -150,46 +150,49 @@ static int pfm_mck_pmc_check(struct pfm_context *ctx,
ctx_arch = pfm_ctx_arch(ctx);
is_system = ctx->flags.system;
-#define PFM_MCK_PMC_PM_POS6 (1UL<< 6)
-#define PFM_MCK_PMC_PM_POS4 (1UL<< 4)
+#define PFM_MCK_PMC_PM_POS6 (1UL<<6)
+#define PFM_MCK_PMC_PM_POS4 (1UL<<4)
- switch(cnum) {
- case 4:
- case 5:
- case 6:
- case 7:
- case 11:
- case 12: if (is_system)
- tmpval |= PFM_MCK_PMC_PM_POS6;
- else
- tmpval &= ~PFM_MCK_PMC_PM_POS6;
- break;
+ switch (cnum) {
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ case 11:
+ case 12:
+ if (is_system)
+ tmpval |= PFM_MCK_PMC_PM_POS6;
+ else
+ tmpval &= ~PFM_MCK_PMC_PM_POS6;
+ break;
- case 8: val8 = tmpval;
- val13 = set->pmcs[13];
- val14 = set->pmcs[14];
- check_case1 = 1;
- break;
+ case 8:
+ val8 = tmpval;
+ val13 = set->pmcs[13];
+ val14 = set->pmcs[14];
+ check_case1 = 1;
+ break;
- case 10: if (is_system)
- tmpval |= PFM_MCK_PMC_PM_POS4;
- else
- tmpval &= ~PFM_MCK_PMC_PM_POS4;
- break;
+ case 10:
+ if (is_system)
+ tmpval |= PFM_MCK_PMC_PM_POS4;
+ else
+ tmpval &= ~PFM_MCK_PMC_PM_POS4;
+ break;
- case 13:
- val8 = set->pmcs[8];
- val13 = tmpval;
- val14 = set->pmcs[14];
- check_case1 = 1;
- break;
+ case 13:
+ val8 = set->pmcs[8];
+ val13 = tmpval;
+ val14 = set->pmcs[14];
+ check_case1 = 1;
+ break;
- case 14:
- val8 = set->pmcs[8];
- val13 = set->pmcs[13];
- val14 = tmpval;
- check_case1 = 1;
- break;
+ case 14:
+ val8 = set->pmcs[8];
+ val13 = set->pmcs[13];
+ val14 = tmpval;
+ check_case1 = 1;
+ break;
}
/*
@@ -198,13 +201,13 @@ static int pfm_mck_pmc_check(struct pfm_context *ctx,
*/
if (check_case1) {
ret = (((val13 >> 45) & 0xf) == 0 && ((val8 & 0x1) == 0))
- && ((((val14>>1) & 0x3) == 0x2 || ((val14>>1) & 0x3) == 0x0)
- ||(((val14>>4) & 0x3) == 0x2 || ((val14>>4) & 0x3) == 0x0));
+ && ((((val14>>1) & 0x3) == 0x2 || ((val14>>1) & 0x3) == 0x0)
+ || (((val14>>4) & 0x3) == 0x2 || ((val14>>4) & 0x3) == 0x0));
if (ret) {
PFM_DBG("perfmon: invalid config pmc8=0x%lx "
- "pmc13=0x%lx pmc14=0x%lx",
- val8, val13, val14);
+ "pmc13=0x%lx pmc14=0x%lx",
+ val8, val13, val14);
return -EINVAL;
}
}
@@ -230,7 +233,8 @@ static int pfm_mck_pmc_check(struct pfm_context *ctx,
&& ctx_arch->flags.use_dbr == 0) {
PFM_DBG("pmc13=0x%lx active", tmpval);
ret = pfm_ia64_mark_dbregs_used(ctx, set);
- if (ret) return ret;
+ if (ret)
+ return ret;
}
/*
@@ -240,7 +244,8 @@ static int pfm_mck_pmc_check(struct pfm_context *ctx,
&& ctx_arch->flags.use_dbr == 0) {
PFM_DBG("pmc14=0x%lx active", tmpval);
ret = pfm_ia64_mark_dbregs_used(ctx, set);
- if (ret) return ret;
+ if (ret)
+ return ret;
}
req->reg_value = tmpval;
@@ -256,7 +261,7 @@ static int pfm_mck_probe_pmu(void)
/*
* impl_pmcs, impl_pmds are computed at runtime to minimize errors!
*/
-static struct pfm_pmu_config pfm_mck_pmu_conf={
+static struct pfm_pmu_config pfm_mck_pmu_conf = {
.pmu_name = "Itanium 2",
.counter_width = 47,
.pmd_desc = pfm_mck_pmd_desc,
diff --git a/arch/ia64/perfmon/perfmon_montecito.c b/arch/ia64/perfmon/perfmon_montecito.c
index ca9d234..8d0110a 100644
--- a/arch/ia64/perfmon/perfmon_montecito.c
+++ b/arch/ia64/perfmon/perfmon_montecito.c
@@ -36,7 +36,7 @@ MODULE_LICENSE("GPL");
#define PFM_MONT_NO64 (1UL<<5)
-static struct pfm_arch_pmu_info pfm_mont_pmu_info={
+static struct pfm_arch_pmu_info pfm_mont_pmu_info = {
.mask_pmcs = {PFM_MONT_MASK_PMCS,},
};
@@ -50,7 +50,7 @@ static struct pfm_arch_pmu_info pfm_mont_pmu_info={
*
* For PMC4-PMC15, PMC40: we force pmc.ism=2 (IA-64 mode only)
*/
-static struct pfm_regmap_desc pfm_mont_pmc_desc[]={
+static struct pfm_regmap_desc pfm_mont_pmc_desc[] = {
/* pmc0 */ PMX_NA,
/* pmc1 */ PMX_NA,
/* pmc2 */ PMX_NA,
@@ -94,33 +94,33 @@ static struct pfm_regmap_desc pfm_mont_pmc_desc[]={
/* pmc40 */ PMC_D(PFM_REG_W , "PMC40", 0x2000000UL, 0xfffffffffff0fe30UL, 0, 40),
/* pmc41 */ PMC_D(PFM_REG_W , "PMC41", 0x00002078fefefefeUL, 0xfffe1fffe7e7e7e7UL, 0, 41),
/* pmc42 */ PMC_D(PFM_REG_W , "PMC42", 0x0, 0xfff800b0UL, 0, 42),
-/* pmc43 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc48 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc56 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc64 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc72 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc80 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc88 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc96 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc104 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc112 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc120 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc128 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc136 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc144 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc152 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc160 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc168 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc176 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc184 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc192 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc200 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc208 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc216 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc224 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc232 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc240 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
-/* pmc248 */ PMX_NA, PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,PMX_NA,
+/* pmc43 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc48 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc56 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc64 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc72 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc80 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc88 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc96 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc104 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc112 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc120 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc128 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc136 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc144 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc152 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc160 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc168 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc176 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc184 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc192 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc200 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc208 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc216 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc224 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc232 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc240 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
+/* pmc248 */ PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA, PMX_NA,
/* pmc256 */ PMC_D(PFM_REG_W, "IBR0", 0x0, 0, 0, 0),
/* pmc257 */ PMC_D(PFM_REG_W, "IBR1", 0x0, 0x8000000000000000UL, 0, 1),
/* pmc258 */ PMC_D(PFM_REG_W, "IBR2", 0x0, 0, 0, 2),
@@ -140,7 +140,7 @@ static struct pfm_regmap_desc pfm_mont_pmc_desc[]={
};
#define PFM_MONT_NUM_PMCS ARRAY_SIZE(pfm_mont_pmc_desc)
-static struct pfm_regmap_desc pfm_mont_pmd_desc[]={
+static struct pfm_regmap_desc pfm_mont_pmd_desc[] = {
/* pmd0 */ PMX_NA,
/* pmd1 */ PMX_NA,
/* pmd2 */ PMX_NA,
@@ -229,69 +229,75 @@ static int pfm_mont_pmc_check(struct pfm_context *ctx,
#define PFM_MONT_PMC_PM_POS6 (1UL<<6)
#define PFM_MONT_PMC_PM_POS4 (1UL<<4)
- switch(cnum) {
- case 4:
- case 5:
- case 6:
- case 7:
- case 8:
- case 9: if (is_system)
- tmpval |= PFM_MONT_PMC_PM_POS6;
- else
- tmpval &= ~PFM_MONT_PMC_PM_POS6;
- break;
- case 10:
- case 11:
- case 12:
- case 13:
- case 14:
- case 15: if ((req->reg_flags & PFM_REGFL_NO_EMUL64) == 0) {
- if (pfm_mont_has_ht) {
- PFM_INFO("perfmon: Errata 121 PMD10/PMD15 cannot be used to overflow"
- "when threads on on");
- return -EINVAL;
- }
- }
- if (is_system)
- tmpval |= PFM_MONT_PMC_PM_POS6;
- else
- tmpval &= ~PFM_MONT_PMC_PM_POS6;
- break;
- case 39:
- case 40:
- case 42: if (pfm_mont_has_ht && ((req->reg_value >> 8) & 0x7) == 4) {
- PFM_INFO("perfmon: Errata 120: IP-EAR not available when threads are on");
- return -EINVAL;
- }
- if (is_system)
- tmpval |= PFM_MONT_PMC_PM_POS6;
- else
- tmpval &= ~PFM_MONT_PMC_PM_POS6;
- break;
+ switch (cnum) {
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ case 8:
+ case 9:
+ if (is_system)
+ tmpval |= PFM_MONT_PMC_PM_POS6;
+ else
+ tmpval &= ~PFM_MONT_PMC_PM_POS6;
+ break;
+ case 10:
+ case 11:
+ case 12:
+ case 13:
+ case 14:
+ case 15:
+ if ((req->reg_flags & PFM_REGFL_NO_EMUL64) == 0) {
+ if (pfm_mont_has_ht) {
+ PFM_INFO("perfmon: Errata 121 PMD10/PMD15 cannot be used to overflow"
+ "when threads on on");
+ return -EINVAL;
+ }
+ }
+ if (is_system)
+ tmpval |= PFM_MONT_PMC_PM_POS6;
+ else
+ tmpval &= ~PFM_MONT_PMC_PM_POS6;
+ break;
+ case 39:
+ case 40:
+ case 42:
+ if (pfm_mont_has_ht && ((req->reg_value >> 8) & 0x7) == 4) {
+ PFM_INFO("perfmon: Errata 120: IP-EAR not available when threads are on");
+ return -EINVAL;
+ }
+ if (is_system)
+ tmpval |= PFM_MONT_PMC_PM_POS6;
+ else
+ tmpval &= ~PFM_MONT_PMC_PM_POS6;
+ break;
- case 32: val32 = tmpval;
- val38 = set->pmcs[38];
- val41 = set->pmcs[41];
- check_case1 = 1;
- break;
+ case 32:
+ val32 = tmpval;
+ val38 = set->pmcs[38];
+ val41 = set->pmcs[41];
+ check_case1 = 1;
+ break;
- case 37:
- if (is_system)
- tmpval |= PFM_MONT_PMC_PM_POS4;
- else
- tmpval &= ~PFM_MONT_PMC_PM_POS4;
- break;
+ case 37:
+ if (is_system)
+ tmpval |= PFM_MONT_PMC_PM_POS4;
+ else
+ tmpval &= ~PFM_MONT_PMC_PM_POS4;
+ break;
- case 38: val38 = tmpval;
- val32 = set->pmcs[32];
- val41 = set->pmcs[41];
- check_case1 = 1;
- break;
- case 41: val41 = tmpval;
- val32 = set->pmcs[32];
- val38 = set->pmcs[38];
- check_case1 = 1;
- break;
+ case 38:
+ val38 = tmpval;
+ val32 = set->pmcs[32];
+ val41 = set->pmcs[41];
+ check_case1 = 1;
+ break;
+ case 41:
+ val41 = tmpval;
+ val32 = set->pmcs[32];
+ val38 = set->pmcs[38];
+ check_case1 = 1;
+ break;
}
if (check_case1) {
@@ -327,7 +333,8 @@ static int pfm_mont_pmc_check(struct pfm_context *ctx,
&& ctx_arch->flags.use_dbr == 0) {
PFM_DBG("pmc41=0x%lx active, clearing dbr", tmpval);
ret = pfm_ia64_mark_dbregs_used(ctx, set);
- if (ret) return ret;
+ if (ret)
+ return ret;
}
/*
* we must clear the (instruction) debug registers if:
@@ -339,7 +346,8 @@ static int pfm_mont_pmc_check(struct pfm_context *ctx,
&& ctx_arch->flags.use_dbr == 0) {
PFM_DBG("pmc38=0x%lx active pmc38, clearing ibr", tmpval);
ret = pfm_ia64_mark_dbregs_used(ctx, set);
- if (ret) return ret;
+ if (ret)
+ return ret;
}
req->reg_value = tmpval;
@@ -375,7 +383,7 @@ static int pfm_mont_probe_pmu(void)
/*
* impl_pmcs, impl_pmds are computed at runtime to minimize errors!
*/
-static struct pfm_pmu_config pfm_mont_pmu_conf={
+static struct pfm_pmu_config pfm_mont_pmu_conf = {
.pmu_name = "Montecito",
.counter_width = 47,
.pmd_desc = pfm_mont_pmd_desc,
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c
index 449d4b4..ea95747 100644
--- a/arch/mips/kernel/signal.c
+++ b/arch/mips/kernel/signal.c
@@ -268,7 +268,7 @@ int install_sigtramp(unsigned int __user *tramp, unsigned int syscall)
*/
err = __put_user(0x24020000 + syscall, tramp + 0);
- err |= __put_user(0x0000000c , tramp + 1);
+ err |= __put_user(0x0000000c, tramp + 1);
if (ICACHE_REFILLS_WORKAROUND_WAR) {
err |= __put_user(0, tramp + 2);
err |= __put_user(0, tramp + 3);
@@ -538,11 +538,11 @@ static int setup_rt_frame(struct k_sigaction * ka, struct pt_regs *regs,
err |= __put_user(0, &frame->rs_uc.uc_flags);
err |= __put_user(NULL, &frame->rs_uc.uc_link);
err |= __put_user((void __user *)current->sas_ss_sp,
- &frame->rs_uc.uc_stack.ss_sp);
+ &frame->rs_uc.uc_stack.ss_sp);
err |= __put_user(sas_ss_flags(regs->regs[29]),
- &frame->rs_uc.uc_stack.ss_flags);
+ &frame->rs_uc.uc_stack.ss_flags);
err |= __put_user(current->sas_ss_size,
- &frame->rs_uc.uc_stack.ss_size);
+ &frame->rs_uc.uc_stack.ss_size);
err |= setup_sigcontext(regs, &frame->rs_uc.uc_mcontext);
err |= __copy_to_user(&frame->rs_uc.uc_sigmask, set, sizeof(*set));
@@ -695,9 +695,9 @@ static void do_signal(struct pt_regs *regs)
* - triggered by the TIF_WORK_MASK flags
*/
asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused,
- __u32 thread_info_flags)
+ __u32 thread_info_flags)
{
- if (thread_info_flags & _TIF_PERFMON_WORK)
+ if (thread_info_flags & _TIF_PERFMON_WORK)
pfm_handle_work(regs);
/* deal with pending signal delivery */
diff --git a/arch/mips/perfmon/perfmon.c b/arch/mips/perfmon/perfmon.c
index 2c35398..d06dde4 100644
--- a/arch/mips/perfmon/perfmon.c
+++ b/arch/mips/perfmon/perfmon.c
@@ -61,7 +61,7 @@ static void __pfm_get_ovfl_pmds(struct pfm_context *ctx, struct pfm_event_set *s
i, (unsigned long long)new_val,
(new_val&wmask) ? 1 : 0);
- if (new_val & wmask) {
+ if (new_val & wmask) {
__set_bit(i, set->povfl_pmds);
set->npend_ovfls++;
}
@@ -70,7 +70,7 @@ static void __pfm_get_ovfl_pmds(struct pfm_context *ctx, struct pfm_event_set *s
}
static void pfm_stop_active(struct task_struct *task, struct pfm_context *ctx,
- struct pfm_event_set *set)
+ struct pfm_event_set *set)
{
unsigned int i, max;
@@ -81,7 +81,7 @@ static void pfm_stop_active(struct task_struct *task, struct pfm_context *ctx,
*/
for (i = 0; i < max; i++) {
if (test_bit(i, set->used_pmcs))
- pfm_arch_write_pmc(ctx, i,0);
+ pfm_arch_write_pmc(ctx, i, 0);
}
if (set->npend_ovfls)
@@ -183,7 +183,7 @@ void pfm_arch_start(struct task_struct *task, struct pfm_context *ctx)
for (i = 0; i < max_pmc; i++) {
if (test_bit(i, set->used_pmcs))
- pfm_arch_write_pmc(ctx, i, set->pmcs[i]);
+ pfm_arch_write_pmc(ctx, i, set->pmcs[i]);
}
}
@@ -261,7 +261,7 @@ void pfm_arch_restore_pmcs(struct pfm_context *ctx, struct pfm_event_set *set)
char *pfm_arch_get_pmu_module_name(void)
{
- switch(cpu_data->cputype) {
+ switch (cpu_data->cputype) {
#ifndef CONFIG_SMP
case CPU_34K:
#if defined(CPU_74K)
@@ -275,23 +275,23 @@ char *pfm_arch_get_pmu_module_name(void)
case CPU_24K:
case CPU_20KC:
case CPU_5KC:
- return "perfmon_mips64";
+ return "perfmon_mips64";
default:
- return NULL;
+ return NULL;
}
return NULL;
}
int perfmon_perf_irq(void)
{
- /* BLATANTLY STOLEN FROM OPROFILE, then modified */
- struct pt_regs *regs;
- unsigned int counters = pfm_pmu_conf->regs.max_pmc;
- unsigned int control;
- unsigned int counter;
-
- regs = get_irq_regs();
- switch (counters) {
+ /* BLATANTLY STOLEN FROM OPROFILE, then modified */
+ struct pt_regs *regs;
+ unsigned int counters = pfm_pmu_conf->regs.max_pmc;
+ unsigned int control;
+ unsigned int counter;
+
+ regs = get_irq_regs();
+ switch (counters) {
#define HANDLE_COUNTER(n) \
case n + 1: \
control = read_c0_perfctrl ## n(); \
@@ -299,15 +299,15 @@ int perfmon_perf_irq(void)
if ((control & MIPS64_PMC_INT_ENABLE_MASK) && \
(counter & MIPS64_PMD_INTERRUPT)) { \
pfm_interrupt_handler(instruction_pointer(regs),\
- regs); \
+ regs); \
return(1); \
}
- HANDLE_COUNTER(3)
- HANDLE_COUNTER(2)
- HANDLE_COUNTER(1)
- HANDLE_COUNTER(0)
- }
+ HANDLE_COUNTER(3)
+ HANDLE_COUNTER(2)
+ HANDLE_COUNTER(1)
+ HANDLE_COUNTER(0)
+ }
- return 0;
+ return 0;
}
EXPORT_SYMBOL(perfmon_perf_irq);
diff --git a/arch/mips/perfmon/perfmon_mips64.c b/arch/mips/perfmon/perfmon_mips64.c
index 4b4eb20..3083d49 100644
--- a/arch/mips/perfmon/perfmon_mips64.c
+++ b/arch/mips/perfmon/perfmon_mips64.c
@@ -43,7 +43,7 @@ extern int perfmon_perf_irq(struct pt_regs *regs);
static struct pfm_arch_pmu_info pfm_mips64_pmu_info;
-static struct pfm_regmap_desc pfm_mips64_pmc_desc[]={
+static struct pfm_regmap_desc pfm_mips64_pmc_desc[] = {
/* pmc0 */ PMC_D(PFM_REG_I64, "CP0_25_0", PFM_MIPS64_PMC_VAL, PFM_MIPS64_PMC_RSVD, 0, 0),
/* pmc1 */ PMC_D(PFM_REG_I64, "CP0_25_1", PFM_MIPS64_PMC_VAL, PFM_MIPS64_PMC_RSVD, 0, 1),
/* pmc2 */ PMC_D(PFM_REG_I64, "CP0_25_2", PFM_MIPS64_PMC_VAL, PFM_MIPS64_PMC_RSVD, 0, 2),
@@ -51,7 +51,7 @@ static struct pfm_regmap_desc pfm_mips64_pmc_desc[]={
};
#define PFM_MIPS64_NUM_PMCS ARRAY_SIZE(pfm_mips64_pmc_desc)
-static struct pfm_regmap_desc pfm_mips64_pmd_desc[]={
+static struct pfm_regmap_desc pfm_mips64_pmd_desc[] = {
/* pmd0 */ PMD_D(PFM_REG_C, "CP0_25_0", 0),
/* pmd1 */ PMD_D(PFM_REG_C, "CP0_25_1", 1),
/* pmd2 */ PMD_D(PFM_REG_C, "CP0_25_2", 2),
@@ -80,7 +80,7 @@ static int pfm_mips64_probe_pmu(void)
return 0;
break;
default:
- PFM_INFO("Unknown cputype 0x%x",c->cputype);
+ PFM_INFO("Unknown cputype 0x%x", c->cputype);
}
return -1;
}
@@ -118,15 +118,15 @@ static int __init pfm_mips64_pmu_init_module(void)
{
struct cpuinfo_mips *c = ¤t_cpu_data;
int i, ret, num;
- u64 temp_mask;
+ u64 temp_mask;
switch (c->cputype) {
case CPU_5KC:
pfm_mips64_pmu_conf.pmu_name = "MIPS5KC";
break;
case CPU_R12000:
- pfm_mips64_pmu_conf.pmu_name = "MIPSR12000";
- break;
+ pfm_mips64_pmu_conf.pmu_name = "MIPSR12000";
+ break;
case CPU_20KC:
pfm_mips64_pmu_conf.pmu_name = "MIPS20KC";
break;
@@ -153,32 +153,30 @@ static int __init pfm_mips64_pmu_init_module(void)
#endif
#endif
default:
- PFM_INFO("Unknown cputype 0x%x",c->cputype);
+ PFM_INFO("Unknown cputype 0x%x", c->cputype);
return -1;
}
- /* The R14k and older performance counters have to */
- /* be hard-coded, as there is no support for auto-detection */
- if ((c->cputype==CPU_R12000) || (c->cputype==CPU_R14000)) {
- num=4;
- }
- else if (c->cputype==CPU_R10000) {
- num=2;
- }
- else {
- num = n_counters();
+ /* The R14k and older performance counters have to */
+ /* be hard-coded, as there is no support for auto-detection */
+ if ((c->cputype == CPU_R12000) || (c->cputype == CPU_R14000)) {
+ num = 4;
+ } else if (c->cputype == CPU_R10000) {
+ num = 2;
+ } else {
+ num = n_counters();
}
if (num == 0) {
- PFM_INFO("cputype 0x%x has no counters",c->cputype);
+ PFM_INFO("cputype 0x%x has no counters", c->cputype);
return -1;
}
/* mark remaining counters unavailable */
- for(i=num; i < PFM_MIPS64_NUM_PMCS; i++) {
+ for (i = num; i < PFM_MIPS64_NUM_PMCS; i++) {
pfm_mips64_pmc_desc[i].type = PFM_REG_NA;
}
- for(i=num; i < PFM_MIPS64_NUM_PMDS; i++) {
+ for (i = num; i < PFM_MIPS64_NUM_PMDS; i++) {
pfm_mips64_pmd_desc[i].type = PFM_REG_NA;
}
@@ -188,19 +186,19 @@ static int __init pfm_mips64_pmu_init_module(void)
case CPU_R10000:
case CPU_20KC:
/* 4-bits for event */
- temp_mask=0xfffffffffffffe10ULL;
+ temp_mask = 0xfffffffffffffe10ULL;
break;
case CPU_R12000:
case CPU_R14000:
/* 5-bits for event */
- temp_mask=0xfffffffffffffc10ULL;
+ temp_mask = 0xfffffffffffffc10ULL;
break;
default:
/* 6-bits for event */
- temp_mask=0xfffffffffffff810ULL;
+ temp_mask = 0xfffffffffffff810ULL;
}
- for(i=0; i< PFM_MIPS64_NUM_PMCS;i++) {
- pfm_mips64_pmc_desc[i].rsvd_msk=temp_mask;
+ for (i = 0; i < PFM_MIPS64_NUM_PMCS; i++) {
+ pfm_mips64_pmc_desc[i].rsvd_msk = temp_mask;
}
pfm_mips64_pmu_conf.num_pmc_entries = num;
diff --git a/arch/powerpc/perfmon/perfmon_power4.c b/arch/powerpc/perfmon/perfmon_power4.c
index 6ea6dd5..d5759c4 100644
--- a/arch/powerpc/perfmon/perfmon_power4.c
+++ b/arch/powerpc/perfmon/perfmon_power4.c
@@ -28,7 +28,7 @@ MODULE_AUTHOR("Corey Ashford <cja...@us...>");
MODULE_DESCRIPTION("POWER4 PMU description table");
MODULE_LICENSE("GPL");
-static struct pfm_regmap_desc pfm_power4_pmc_desc[]={
+static struct pfm_regmap_desc pfm_power4_pmc_desc[] = {
/* mmcr0 */ PMC_D(PFM_REG_I, "MMCR0", MMCR0_FC, 0, 0, SPRN_MMCR0),
/* mmcr1 */ PMC_D(PFM_REG_I, "MMCR1", 0, 0, 0, SPRN_MMCR1),
/* mmcra */ PMC_D(PFM_REG_I, "MMCRA", 0, 0, 0, SPRN_MMCRA)
@@ -39,7 +39,7 @@ static struct pfm_regmap_desc pfm_power4_pmc_desc[]={
* actually consists of both the 32-bit SPRN_TBRU and SPRN_TBRL registers.
* For Perfmon2's purposes, we'll treat it as a single 64-bit register.
*/
-static struct pfm_regmap_desc pfm_power4_pmd_desc[]={
+static struct pfm_regmap_desc pfm_power4_pmd_desc[] = {
/* tb */ PMD_D((PFM_REG_I|PFM_REG_RO), "TB", SPRN_TBRL),
/* pmd1 */ PMD_D(PFM_REG_C, "PMC1", SPRN_PMC1),
/* pmd2 */ PMD_D(PFM_REG_C, "PMC2", SPRN_PMC2),
@@ -277,7 +277,7 @@ static struct pfm_pmu_config pfm_power4_pmu_conf = {
.flags = PFM_PMU_BUILTIN_FLAG,
.owner = THIS_MODULE
};
-
+
static int __init pfm_power4_pmu_init_module(void)
{
return pfm_pmu_register(&pfm_power4_pmu_conf);
diff --git a/arch/powerpc/perfmon/perfmon_power5.c b/arch/powerpc/perfmon/perfmon_power5.c
index c6e050a..8a525f4 100644
--- a/arch/powerpc/perfmon/perfmon_power5.c
+++ b/arch/powerpc/perfmon/perfmon_power5.c
@@ -29,7 +29,7 @@ MODULE_AUTHOR("David Gibson <dw...@au...>");
MODULE_DESCRIPTION("POWER5 PMU description table");
MODULE_LICENSE("GPL");
-static struct pfm_regmap_desc pfm_power5_pmc_desc[]={
+static struct pfm_regmap_desc pfm_power5_pmc_desc[] = {
/* mmcr0 */ PMC_D(PFM_REG_I, "MMCR0", MMCR0_FC, 0, 0, SPRN_MMCR0),
/* mmcr1 */ PMC_D(PFM_REG_I, "MMCR1", 0, 0, 0, SPRN_MMCR1),
/* mmcra */ PMC_D(PFM_REG_I, "MMCRA", 0, 0, 0, SPRN_MMCRA)
@@ -40,7 +40,7 @@ static struct pfm_regmap_desc pfm_power5_pmc_desc[]={
* actually consists of both the 32-bit SPRN_TBRU and SPRN_TBRL registers.
* For Perfmon2's purposes, we'll treat it as a single 64-bit register.
*/
-static struct pfm_regmap_desc pfm_power5_pmd_desc[]={
+static struct pfm_regmap_desc pfm_power5_pmd_desc[] = {
/* tb */ PMD_D((PFM_REG_I|PFM_REG_RO), "TB", SPRN_TBRL),
/* pmd1 */ PMD_D(PFM_REG_C, "PMC1", SPRN_PMC1),
/* pmd2 */ PMD_D(PFM_REG_C, "PMC2", SPRN_PMC2),
@@ -62,12 +62,12 @@ static int pfm_power5_probe_pmu(void)
unsigned long hid0 = mfspr(SPRN_HID0);
switch (PVR_VER(pvr)) {
- case PV_POWER5:
- return 0;
- case PV_POWER5p:
- return (hid0 & HID0_PMC5_6_GR_MODE) ? 0 : -1;
- default:
- return -1;
+ case PV_POWER5:
+ return 0;
+ case PV_POWER5p:
+ return (hid0 & HID0_PMC5_6_GR_MODE) ? 0 : -1;
+ default:
+ return -1;
}
}
diff --git a/arch/powerpc/perfmon/perfmon_power6.c b/arch/powerpc/perfmon/perfmon_power6.c
index d2070cb..b935113 100644
--- a/arch/powerpc/perfmon/perfmon_power6.c
+++ b/arch/powerpc/perfmon/perfmon_power6.c
@@ -1,6 +1,6 @@
/*
* This file contains the POWER6 PMU register description tables
- * and pmc checker used by perfmon.c.
+ * and pmc checker used by perfmon.c.
*
* Copyright (c) 2007, IBM Corporation
*
@@ -29,7 +29,7 @@ MODULE_AUTHOR("Corey Ashford <cja...@us...>");
MODULE_DESCRIPTION("POWER6 PMU description table");
MODULE_LICENSE("GPL");
-static struct pfm_regmap_desc pfm_power6_pmc_desc[]={
+static struct pfm_regmap_desc pfm_power6_pmc_desc[] = {
/* mmcr0 */ PMC_D(PFM_REG_I, "MMCR0", MMCR0_FC, 0, 0, SPRN_MMCR0),
/* mmcr1 */ PMC_D(PFM_REG_I, "MMCR1", 0, 0, 0, SPRN_MMCR1),
/* mmcra */ PMC_D(PFM_REG_I, "MMCRA", 0, 0, 0, SPRN_MMCRA)
@@ -48,13 +48,13 @@ static struct pfm_regmap_desc pfm_power6_pmc_desc[]={
* actually consists of both the 32-bit SPRN_TBRU and SPRN_TBRL registers.
* For Perfmon2's purposes, we'll treat it as a single 64-bit register.
*/
-static struct pfm_regmap_desc pfm_power6_pmd_desc[]={
+static struct pfm_regmap_desc pfm_power6_pmd_desc[] = {
/* On POWER 6 PMC5 and PMC6 are not writable, they do not
- * generate interrupts, and do not qualify their counts
+ * generate interrupts, and do not qualify their counts
* based on problem mode, supervisor mode or hypervisor mode.
* These two counters are implemented as virtual counters
- * to make the appear to work like the other counters. A
- * kernel timer is used sample the real PMC5 and PMC6 and
+ * to make the appear to work like the other counters. A
+ * kernel timer is used sample the real PMC5 and PMC6 and
* update the virtual counters.
*/
/* tb */ PMD_D((PFM_REG_I|PFM_REG_RO), "TB", SPRN_TBRL),
@@ -86,7 +86,8 @@ u64 pm1_4_interrupt;
struct pfm_arch_context *pmc5_6_ctx_arch[NR_CPUS];
long int update_time;
-static void delta(int cpu_num, struct pfm_arch_context *ctx_arch) {
+static void delta(int cpu_num, struct pfm_arch_context *ctx_arch)
+{
u32 tmp5, tmp6;
call_delta++;
@@ -110,7 +111,7 @@ static void delta(int cpu_num, struct pfm_arch_context *ctx_arch) {
static void pmc5_6_updater(unsigned long cpu_num)
-{
+{
/* update the virtual pmd 5 and pmd 6 counters */
delta(cpu_num, pmc5_6_ctx_arch[cpu_num]);
@@ -128,8 +129,8 @@ static int pfm_power6_probe_pmu(void)
return 0;
case PV_POWER5p:
/* If this is a POWER5+ and the backward compatibility mode
- bit (makes it behave as a POWER5) is set, don't treat it
- as a POWER6. */
+ bit (makes it behave as a POWER5) is set, don't treat it
+ as a POWER6. */
return (hid0 & HID0_PMC5_6_GR_MODE) ? -1 : 0;
default:
return -1;
@@ -155,8 +156,8 @@ static void pfm_power6_write_pmc(unsigned int cnum, u64 value)
static void pfm_power6_write_pmd(unsigned int cnum, u64 value)
{
- /* On POWER 6 PMC5 and PMC6 are implemented as
- * virtual counters. See comment in pfm_power6_pmd_desc
+ /* On POWER 6 PMC5 and PMC6 are implemented as
+ * virtual counters. See comment in pfm_power6_pmd_desc
* definition.
*/
switch (pfm_pmu_conf->pmd_desc[cnum].hw_addr) {
@@ -186,8 +187,8 @@ static u64 pfm_power6_sread(struct pfm_context *ctx, unsigned int cnum)
struct pfm_arch_context *ctx_arch = pfm_ctx_arch(ctx);
int cpu_num = smp_processor_id();
- /* On POWER 6 PMC5 and PMC6 are implemented as
- * virtual counters. See comment in pfm_power6_pmd_desc
+ /* On POWER 6 PMC5 and PMC6 are implemented as
+ * virtual counters. See comment in pfm_power6_pmd_desc
* definition.
*/
@@ -201,13 +202,14 @@ static u64 pfm_power6_sread(struct pfm_context *ctx, unsigned int cnum)
break;
case PFM_DELTA_TB:
- return ctx_arch->delta_tb +
- (((u64)mfspr(SPRN_TBRU) << 32) | mfspr(SPRN_TBRL))
- - ctx_arch->delta_tb_start;
+ return ctx_arch->delta_tb
+ + (((u64)mfspr(SPRN_TBRU) << 32) | mfspr(SPRN_TBRL))
+ - ctx_arch->delta_tb_start;
break;
case PFM_DELTA_PURR:
- return ctx_arch->delta_purr + mfspr(SPRN_PURR)
+ return ctx_arch->delta_purr
+ + mfspr(SPRN_PURR)
- ctx_arch->delta_purr_start;
break;
@@ -234,11 +236,11 @@ void pfm_power6_swrite(struct pfm_context *ctx, unsigned int cnum,
break;
case PFM_DELTA_TB:
- ctx_arch->delta_tb_start =
+ ctx_arch->delta_tb_start =
(((u64)mfspr(SPRN_TBRU) << 32) | mfspr(SPRN_TBRL));
ctx_arch->delta_tb = val;
break;
-
+
case PFM_DELTA_PURR:
ctx_arch->delta_purr_start = mfspr(SPRN_PURR);
ctx_arch->delta_purr = val;
@@ -287,7 +289,7 @@ static void pfm_power6_enable_counters(struct pfm_context *ctx,
unsigned int i, max_pmc;
int cpu_num = smp_processor_id();
struct pfm_arch_context *ctx_arch;
-
+
enable_cntrs_cnt++;
/* Make sure the counters are disabled before touching the other
@@ -325,12 +327,12 @@ static void pfm_power6_enable_counters(struct pfm_context *ctx,
pmc5_6_update[cpu_num].expires = jiffies + update_time;
/* context for this timer, timer will be removed if context
* is switched because the counters will be stopped first.
- * NEEDS WORK, I think this is all ok, a little concerned about a
+ * NEEDS WORK, I think this is all ok, a little concerned about a
* race between the kernel timer going off right as the counters
* are being stopped and the context switching. Need to think
* about this.
*/
- pmc5_6_ctx_arch[cpu_num] = ctx_arch;
+ pmc5_6_ctx_arch[cpu_num] = ctx_arch;
add_timer(&pmc5_6_update[cpu_num]);
}
@@ -359,11 +361,11 @@ static void pfm_power6_disable_counters(struct pfm_context *ctx,
ctx_arch = pfm_ctx_arch(ctx);
delta(cpu_num, ctx_arch);
- ctx_arch->delta_tb +=
+ ctx_arch->delta_tb +=
(((u64)mfspr(SPRN_TBRU) << 32) | mfspr(SPRN_TBRL))
- - ctx_arch->delta_tb_start;
+ - ctx_arch->delta_tb_start;
- ctx_arch->delta_purr += mfspr(SPRN_PURR)
+ ctx_arch->delta_purr += mfspr(SPRN_PURR)
- ctx_arch->delta_purr_start;
}
@@ -469,15 +471,15 @@ static struct pfm_pmu_config pfm_power6_pmu_conf = {
.flags = PFM_PMU_BUILTIN_FLAG,
.owner = THIS_MODULE
};
-
+
static int __init pfm_power6_pmu_init_module(void)
{
int ret;
- disable_cntrs_cnt=0;
- enable_cntrs_cnt=0;
- call_delta=0;
- pm5_6_interrupt=0;
- pm1_4_interrupt=0;
+ disable_cntrs_cnt = 0;
+ enable_cntrs_cnt = 0;
+ call_delta = 0;
+ pm5_6_interrupt = 0;
+ pm1_4_interrupt = 0;
/* calculate the time for updating counters 5 and 6 */
diff --git a/arch/sparc64/kernel/cpu.c b/arch/sparc64/kernel/cpu.c
index c48c1df..0e788f0 100644
--- a/arch/sparc64/kernel/cpu.c
+++ b/arch/sparc64/kernel/cpu.c
@@ -30,7 +30,7 @@ struct cpu_fp_info {
short manuf;
short impl;
char fpu_vers;
- char* fp_name;
+ char *fp_name;
};
static struct cpu_fp_info linux_sparc_fpu[] = {
diff --git a/arch/sparc64/kernel/traps.c b/arch/sparc64/kernel/traps.c
index da69cda..75f196c 100644
--- a/arch/sparc64/kernel/traps.c
+++ b/arch/sparc64/kernel/traps.c
@@ -2515,7 +2515,7 @@ void __init trap_init(void)
offsetof(struct thread_info, ke...
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