Re: [perfmon2] [PATCH] bug fix for POWER5 support (1/1)

[Corey A. <cja...@us...>]

Hi Stephane,

I was unaware of the checker routine you are talking about.  I think one 
of the problems we discussed was the fact that if I turned on the 
used_pmds bit for the other counter, I would also have to turn on the 
intr_pmds bit, otherwise the counter would not get examined.  And if we 
did turn on that bit too, we'd get spurious increments of 
set->npend_ovfls and its respective bit would be set in set->povfl_pmds 
when the unused counter overflowed.

So I opted for the change that just zeroes out the unused counter(s) in 
pfm_get_ovfl_pmds.  This way we don't muck with the used or intr pmds 
bits at all.  This change is in the two recent perfmon_power5.c patches.
It's only four simple lines of code added:

         /*
          * If either PMC5 or PMC6 are not being used, just zero out the 
unused
          * ones so that they won't interrupt again for another 2^31 counts.
          * Note that if no other counters overflowed, set->npend_ovfls will
          * be zero upon returning from this call (i.e. a spurious
          * interrupt), but that should be ok.
          *
          * If neither PMC5 nor PMC6 are used, the counters should be frozen
          * via MMCR0_FC5_6 and zeroed out.
          *
          * If both PMC5 and PMC6 are used, they can be handled correctly by
          * the loop that follows.
          */

         if  (!test_bit(5, cast_ulp(used_pmds)))
                 mtspr(SPRN_PMC5, 0);
         if  (!test_bit(6, cast_ulp(used_pmds)))
                 mtspr(SPRN_PMC6, 0);

- Corey


> Corey,
> 
> On Dec 17, 2007 12:07 PM, Corey Ashford <cja...@us...> wrote:
>> Hi Stephane,
>>
>> Despite my unclear description, it is clear that you understand the
>> issues here.  I understand your concern about spurious sampling, and I
>> will look into how to make the code detect and correctly handle the
>> spurious interrupts from the unused counter.
>>
>> Thanks for your feedback, and I'll let you know if I find anything about
>> the other hang problem.
>>
> 
> I don't remember if we closed on this issue. I re-read your initial message
> and I think there may be a better solution to this problem.
> 
> My reading is that you cannot have counter 5 used without counter 6 and
> vice-versa. Both if both are unused, then there is no need to access any
> of them.
> 
> There is a simply way to do this in the PMU description module. As you know
> you can have a checker function on PMD/PMC read/write. We used this on
> IA-64/X86 to check for special conditions. The checker routine gets called
> during the pfm_write_pmds() or pfm_read_pmds(). One could enable the checker
> on counter 5 & 6. If you see a write for one, then you mark the other one as
> used in the used_pmcs or used_pmds bitmask. That what they would automatically
> be scanned by the get_ovfl_pmds() routines.
> 
> Have you looked at that already?

-- 
Corey Ashford
Software Engineer
IBM Linux Technology Center, Linux Toolchain
Beaverton, OR
503-578-3507
cja...@us...