[Pcb-bugs] [Bug 1843834] Re: New DRC flags zero-clearance pads

[Joseph C. <18...@bu...>]

This problem first appeared for me in 4.2.0.  In previous versions, zero
clearance pads passed DRC.

I don't like the "correct" way because it would mean fitting in 176
hidden lines in my design just to remove DRC warnings.  The lines might
need to be off grid or sized just right to avoid neighboring elements.

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Title:
  New DRC flags zero-clearance pads

Status in pcb:
  New

Bug description:
  As of version 4.2.0 my PCB layout has 176 new DRC errors.  I have many
  pads which are connected to polys by setting the pad clearance to
  zero.  The DRC previously ignored theses.  I understand that this
  looks like a legitimate clearance violation but there is no way, as
  far as I can tell, to tell PCB that the connection from the pad to the
  poly is intentional.

  I believe the DRC should just ignore zero-clearance pads as it did in
  previous versions.  If the resulting connections were errors, they
  would be detected as such anyway because they would violate the
  netlist.

  An alternative but less ideal solution would be to add a flag, say
  "noclear", that could be added to the pad to indicate connection to
  the poly was intentional.

  This is fairly easy to reproduce.

    1. Start a new project
    2. Add a poly rectangle on the top layer.
    3. Add a component that has a pad.
    4. Set the clearance of a pad to zero (Shift-K).
    5. Run the DRC.

  See attached file.

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