From: Philippe E. <ph...@us...> - 2002-07-10 05:28:50
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Update of /cvsroot/oprofile/oprofile/module/x86 In directory usw-pr-cvs1:/tmp/cvs-serv28091/module/x86 Modified Files: op_apic.c op_fixmap.c op_nmi.c Log Message: pp/op_time.cpp: bug fix check for permission problem rather for permitted operation module: revert partially the 2002-06-26 patch, imho preempt need rather to be fixed before/after calling the op_int_operation functions pointer. *** John, I have not emailed kai about the make problem in 2.5.21+, I think I have foud a fix but I needs to test it on other kernel basically calling (cd $(KSRC) && $(MAKE) SUBDIRS=$(OPROFILE_DIR)/module modules) with SUBDIRS==current dir was not intended to work, this must be made in the parent directory makefile regards, Phil Index: op_apic.c =================================================================== RCS file: /cvsroot/oprofile/oprofile/module/x86/op_apic.c,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- op_apic.c 26 Jun 2002 04:09:58 -0000 1.5 +++ op_apic.c 10 Jul 2002 05:28:47 -0000 1.6 @@ -26,7 +26,6 @@ /* this masking code is unsafe and nasty but might deal with the small * race when installing the NMI entry into the IDT. */ -/* Called with preempt_disable */ static void mask_lvtpc(void * e) { ulong v = apic_read(APIC_LVTPC); @@ -34,14 +33,12 @@ apic_write(APIC_LVTPC, v | APIC_LVT_MASKED); } -/* Called with preempt_disable */ static void unmask_lvtpc(void * e) { if (!lvtpc_masked) apic_write(APIC_LVTPC, apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED); } -/* called with preempt_disable */ void install_nmi(void) { volatile struct _descr descr = { 0, 0,}; @@ -62,7 +59,6 @@ unmask_lvtpc(NULL); } -/* called with preempt_disable */ void restore_nmi(void) { smp_call_function(mask_lvtpc, NULL, 0, 1); @@ -77,7 +73,6 @@ static uint lvtpc_old_mask[NR_CPUS]; static uint lvtpc_old_mode[NR_CPUS]; -/* Called with preempt_disable */ void __init lvtpc_apic_setup(void * dummy) { uint val; @@ -95,7 +90,6 @@ } /* not safe to mark as __exit since used from __init code */ -/* Called with preempt_disable */ void lvtpc_apic_restore(void * dummy) { uint val = apic_read(APIC_LVTPC); @@ -113,8 +107,6 @@ uint msr_low, msr_high; uint val; - preempt_disable(); - /* enable local APIC via MSR. Forgetting this is a fun way to * lock the box. But we have to hope this is allowed if the APIC * has already been enabled. @@ -140,8 +132,6 @@ if (!(val & APIC_SPIV_APIC_ENABLED)) apic_write(APIC_SPIV, val | APIC_SPIV_APIC_ENABLED); - preempt_enable(); - return !!(val & APIC_SPIV_APIC_ENABLED); not_local_p6_apic: @@ -150,8 +140,6 @@ if ((msr_low & (1 << 11)) == 0) wrmsr(MSR_IA32_APICBASE, msr_low & ~(1<<11), msr_high); - preempt_enable(); - printk(KERN_ERR "oprofile: no local P6 APIC. Falling back to RTC mode.\n"); return -ENODEV; } @@ -160,7 +148,7 @@ { uint val; - __cli(); /* sufficient to take care of preemption */ + __cli(); val = APIC_LVT_LEVEL_TRIGGER; val = SET_APIC_DELIVERY_MODE(val, APIC_MODE_EXINT); @@ -219,10 +207,8 @@ switch (enable_apic()) { case 0: - preempt_disable(); do_apic_setup(); val = apic_read(APIC_ESR); - preempt_enable(); printk(KERN_INFO "oprofile: enabled local APIC. Err code %.08x\n", val); break; case 1: @@ -232,9 +218,7 @@ goto nodev; } - preempt_disable(); lvtpc_apic_setup(NULL); - preempt_enable(); return 0; nodev: printk(KERN_WARNING "Your CPU does not have a local APIC, e.g. " Index: op_fixmap.c =================================================================== RCS file: /cvsroot/oprofile/oprofile/module/x86/op_fixmap.c,v retrieving revision 1.5 retrieving revision 1.6 diff -u -d -r1.5 -r1.6 --- op_fixmap.c 28 Jun 2002 19:31:26 -0000 1.5 +++ op_fixmap.c 10 Jul 2002 05:28:47 -0000 1.6 @@ -27,9 +27,8 @@ /* how about __attribute__(__unused__) then ? */ /* FIXME is this comment right ? */ -/* all this file is preempt patch safe because we can get problem only - * on smp machine but on smp this stuff is never called. For the same - * reason we don't need to take care about locking mm->page_table_lock */ +/* We don't take care about locking mm->page_table_lock because this is + * only needed on SMP and on SMP we have already a sensible setup */ /*static*/ void set_pte_phys(ulong vaddr, ulong phys) { Index: op_nmi.c =================================================================== RCS file: /cvsroot/oprofile/oprofile/module/x86/op_nmi.c,v retrieving revision 1.9 retrieving revision 1.10 diff -u -d -r1.9 -r1.10 --- op_nmi.c 4 Jul 2002 23:23:44 -0000 1.9 +++ op_nmi.c 10 Jul 2002 05:28:47 -0000 1.10 @@ -27,7 +27,7 @@ /* ---------------- NMI handler ------------------ */ /* preempt: all things inside the interrupt handler are preempt safe : we - * never reenabme interrupt */ + * never reenable interrupt */ static void op_check_ctr(uint cpu, struct pt_regs *regs, int ctr) { @@ -71,8 +71,6 @@ uint low, high; int i; - preempt_disable(); - /* IA Vol. 3 Figure 15-3 */ /* Stop and clear all counter: IA32 use bit 22 of eventsel_msr0 to @@ -104,8 +102,6 @@ /* Here all setup is made except the start/stop bit 22, counter * disabled contains zeros in the eventsel msr except the reserved bit * 21 */ - - preempt_disable(); } static int pmc_setup_all(void) @@ -117,7 +113,6 @@ return 0; } -/* called preempt disable */ inline static void pmc_start_P6(void) { uint low,high; @@ -126,7 +121,6 @@ wrmsr(eventsel_msr[0], low | (1 << 22), high); } -/* called preempt disable */ inline static void pmc_start_Athlon(void) { uint low,high; @@ -140,7 +134,6 @@ } } -/* called preempt disable */ static void pmc_start(void *info) { if (info && (*((uint *)info) != op_cpu_id())) @@ -157,7 +150,6 @@ pmc_start_Athlon(); } -/* called preempt disable */ inline static void pmc_stop_P6(void) { uint low,high; @@ -166,7 +158,6 @@ wrmsr(eventsel_msr[0], low & ~(1 << 22), high); } -/* called preempt disable */ inline static void pmc_stop_Athlon(void) { uint low,high; @@ -180,7 +171,6 @@ } } -/* called preempt disable */ static void pmc_stop(void *info) { if (info && (*((uint *)info) != op_cpu_id())) @@ -201,14 +191,10 @@ if (partial_stop) return; - preempt_disable(); - if (cpu == op_cpu_id()) pmc_start(NULL); else smp_call_function(pmc_start, &cpu, 0, 1); - - preempt_enable(); } static void pmc_select_stop(uint cpu) @@ -216,14 +202,10 @@ if (partial_stop) return; - preempt_disable(); - if (cpu == op_cpu_id()) pmc_stop(NULL); else smp_call_function(pmc_stop, &cpu, 0, 1); - - preempt_enable(); } static void pmc_start_all(void) @@ -241,20 +223,16 @@ } } - preempt_disable(); install_nmi(); smp_call_function(pmc_start, NULL, 0, 1); pmc_start(NULL); - preempt_enable(); } static void pmc_stop_all(void) { - preempt_disable(); smp_call_function(pmc_stop, NULL, 0, 1); pmc_stop(NULL); restore_nmi(); - preempt_enable(); } static int pmc_check_params(void) @@ -346,8 +324,6 @@ break; } - preempt_disable(); /* FIXME: required ? */ - for (i = 0 ; i < op_nr_counters ; ++i) { rdmsr(eventsel_msr[i], saved_eventsel_low[i], saved_eventsel_high[i]); rdmsr(perfctr_msr[i], saved_perfctr_low[i], saved_perfctr_high[i]); @@ -362,7 +338,6 @@ } out: - preempt_enable(); return err; } @@ -370,8 +345,6 @@ { int i; - preempt_disable(); - smp_call_function(lvtpc_apic_restore, NULL, 0, 1); lvtpc_apic_restore(NULL); @@ -381,7 +354,6 @@ } apic_restore(); - preempt_enable(); } static char *names[] = { "0", "1", "2", "3", "4", }; |