[oprof-cvs] CVS: oprofile/module compat.h,1.26,1.27 op_nmi.c,1.4,1.5

[Philippe E. <ph...@us...>]

Update of /cvsroot/oprofile/oprofile/module
In directory usw-pr-cvs1:/tmp/cvs-serv3081/oprofile/module

Modified Files:
	compat.h op_nmi.c 
Log Message:
module/doc: re-add explicit MSR_ macro, please look for type

Index: compat.h
===================================================================
RCS file: /cvsroot/oprofile/oprofile/module/compat.h,v
retrieving revision 1.26
retrieving revision 1.27
diff -u -d -r1.26 -r1.27
--- compat.h	2002/01/30 04:07:10	1.26
+++ compat.h	2002/01/30 17:43:35	1.27
@@ -87,17 +87,41 @@
 #ifndef MSR_P6_PERFCTR0
 #define MSR_P6_PERFCTR0 0xc1
 #endif
+#ifndef MSR_P6_PERFCTR1
+#define MSR_P6_PERFCTR1 0xc2
+#endif
 #ifndef MSR_P6_EVNTSEL0
 #define MSR_P6_EVNTSEL0 0x186
 #endif
+#ifndef MSR_P6_EVNTSEL1
+#define MSR_P6_EVNTSEL1 0x187
+#endif
 #ifndef MSR_IA32_APICBASE
 #define MSR_IA32_APICBASE 0x1B
 #endif
 #ifndef MSR_K7_PERFCTL0
 #define MSR_K7_PERFCTL0 0xc0010000
 #endif
+#ifndef MSR_K7_PERFCTL1
+#define MSR_K7_PERFCTL1 0xc0010001
+#endif
+#ifndef MSR_K7_PERFCTL2
+#define MSR_K7_PERFCTL2 0xc0010002
+#endif
+#ifndef MSR_K7_PERFCTL3
+#define MSR_K7_PERFCTL3 0xc0010003
+#endif
 #ifndef MSR_K7_PERFCTR0
 #define MSR_K7_PERFCTR0 0xc0010004
+#endif
+#ifndef MSR_K7_PERFCTR1
+#define MSR_K7_PERFCTR1 0xc0010005
+#endif
+#ifndef MSR_K7_PERFCTR2
+#define MSR_K7_PERFCTR2 0xc0010006
+#endif
+#ifndef MSR_K7_PERFCTR3
+#define MSR_K7_PERFCTR3 0xc0010007
 #endif
 
 #ifndef APIC_SPIV_APIC_ENABLED

Index: op_nmi.c
===================================================================
RCS file: /cvsroot/oprofile/oprofile/module/op_nmi.c,v
retrieving revision 1.4
retrieving revision 1.5
diff -u -d -r1.4 -r1.5
--- op_nmi.c	2002/01/30 04:07:10	1.4
+++ op_nmi.c	2002/01/30 17:43:35	1.5
@@ -316,19 +316,19 @@
 	switch (sysctl.cpu_type) {
 		case CPU_ATHLON:
 			eventsel_msr[0] = MSR_K7_PERFCTL0;
-			eventsel_msr[1] = MSR_K7_PERFCTL0 + 1;
-			eventsel_msr[2] = MSR_K7_PERFCTL0 + 2;
-			eventsel_msr[3] = MSR_K7_PERFCTL0 + 3;
+			eventsel_msr[1] = MSR_K7_PERFCTL1;
+			eventsel_msr[2] = MSR_K7_PERFCTL2;
+			eventsel_msr[3] = MSR_K7_PERFCTL3;
 			perfctr_msr[0] = MSR_K7_PERFCTR0;
-			perfctr_msr[1] = MSR_K7_PERFCTR0 + 1;
-			perfctr_msr[2] = MSR_K7_PERFCTR0 + 2;
-			perfctr_msr[3] = MSR_K7_PERFCTR0 + 3;
+			perfctr_msr[1] = MSR_K7_PERFCTR1;
+			perfctr_msr[2] = MSR_K7_PERFCTR2;
+			perfctr_msr[3] = MSR_K7_PERFCTR3;
 			break;
 		default:
 			eventsel_msr[0] = MSR_P6_EVNTSEL0;
-			eventsel_msr[1] = MSR_P6_EVNTSEL0 + 1;
+			eventsel_msr[1] = MSR_P6_EVNTSEL1;
 			perfctr_msr[0] = MSR_P6_PERFCTR0;
-			perfctr_msr[1] = MSR_P6_PERFCTR0 + 1;
+			perfctr_msr[1] = MSR_P6_PERFCTR1;
 			break;
 	}