[oprof-cvs] CVS: oprofile ChangeLog,1.104,1.105 oprofile.c,1.83,1.84 oprofile.h,1.50,1.51

[John L. <mov...@us...>]

Update of /cvsroot/oprofile/oprofile
In directory usw-pr-cvs1:/tmp/cvs-serv13782

Modified Files:
	ChangeLog oprofile.c oprofile.h 
Log Message:
pedantry



Index: ChangeLog
===================================================================
RCS file: /cvsroot/oprofile/oprofile/ChangeLog,v
retrieving revision 1.104
retrieving revision 1.105
diff -u -d -r1.104 -r1.105
--- ChangeLog	2001/09/08 21:46:03	1.104
+++ ChangeLog	2001/09/12 01:22:40	1.105
@@ -1,3 +1,8 @@
+2001-09-12  John Levon  <mo...@co...>
+
+	* oprofile.h:
+	* oprofile.c: use cpu_number_map (pedantry thing)
+ 
 2001-09-07  Philippe Elie  <ph...@cl...>
 
 	* oprofile.c: remove /proc/.../cpu_type. Check if user

Index: oprofile.c
===================================================================
RCS file: /cvsroot/oprofile/oprofile/oprofile.c,v
retrieving revision 1.83
retrieving revision 1.84
diff -u -d -r1.83 -r1.84
--- oprofile.c	2001/09/08 21:46:03	1.83
+++ oprofile.c	2001/09/12 01:22:40	1.84
@@ -80,7 +80,7 @@
 			data->nextbuf = 0;
 		return;
 	}
-	oprof_ready[smp_processor_id()] = 1;
+	oprof_ready[op_cpu_id()] = 1;
 }
 
 inline static void fill_op_entry(struct op_sample *ops, struct pt_regs *regs, int ctr)
@@ -129,7 +129,7 @@
 
 asmlinkage void op_do_nmi(struct pt_regs *regs)
 {
-	struct _oprof_data *data = &oprof_data[smp_processor_id()];
+	struct _oprof_data *data = &oprof_data[op_cpu_id()];
 	int i;
 
 	if (pid_filter && current->pid != pid_filter)
@@ -258,11 +258,11 @@
 	/* set up LVTPC as we need it */
 	/* IA32 V3, Figure 7.8 */
 	val = apic_read(APIC_LVTPC);
-	lvtpc_old_mask[smp_processor_id()] = val & APIC_LVT_MASKED;
+	lvtpc_old_mask[op_cpu_id()] = val & APIC_LVT_MASKED;
 	/* allow PC overflow interrupts */
 	val &= ~APIC_LVT_MASKED;
 	/* set delivery to NMI */
-	lvtpc_old_mode[smp_processor_id()] = GET_APIC_DELIVERY_MODE(val);
+	lvtpc_old_mode[op_cpu_id()] = GET_APIC_DELIVERY_MODE(val);
 	val = SET_APIC_DELIVERY_MODE(val, APIC_MODE_NMI);
 	apic_write(APIC_LVTPC, val);
 }
@@ -271,8 +271,8 @@
 {
 	uint val = apic_read(APIC_LVTPC);
 	// FIXME: this gives APIC errors on SMP hardware.
-	// val = SET_APIC_DELIVERY_MODE(val, lvtpc_old_mode[smp_processor_id()]);
-	if (lvtpc_old_mask[smp_processor_id()])
+	// val = SET_APIC_DELIVERY_MODE(val, lvtpc_old_mode[op_cpu_id()]);
+	if (lvtpc_old_mask[op_cpu_id()])
 		val |= APIC_LVT_MASKED;
 	else
 		val &= ~APIC_LVT_MASKED;
@@ -537,7 +537,7 @@
 
 static void pmc_start(void *info)
 {
-	if (info && (*((uint *)info) != smp_processor_id()))
+	if (info && (*((uint *)info) != op_cpu_id()))
 		return;
 
 	/* assert: all enable counter are setup except the bit start/stop,
@@ -574,7 +574,7 @@
 
 static void pmc_stop(void *info)
 {
-	if (info && (*((uint *)info) != smp_processor_id()))
+	if (info && (*((uint *)info) != op_cpu_id()))
 		return;
 
 	/* disable counters */
@@ -586,7 +586,7 @@
 
 inline static void pmc_select_start(uint cpu)
 {
-	if (cpu==smp_processor_id())
+	if (cpu == op_cpu_id())
 		pmc_start(NULL);
 	else
 		smp_call_function(pmc_start, &cpu, 0, 1);
@@ -594,7 +594,7 @@
 
 inline static void pmc_select_stop(uint cpu)
 {
-	if (cpu==smp_processor_id())
+	if (cpu==op_cpu_id())
 		pmc_stop(NULL);
 	else
 		smp_call_function(pmc_stop, &cpu, 0, 1);

Index: oprofile.h
===================================================================
RCS file: /cvsroot/oprofile/oprofile/oprofile.h,v
retrieving revision 1.50
retrieving revision 1.51
diff -u -d -r1.50 -r1.51
--- oprofile.h	2001/09/06 18:13:28	1.50
+++ oprofile.h	2001/09/12 01:22:41	1.51
@@ -172,6 +172,8 @@
 struct _descr { u16 limit; u32 base; } __attribute__((__packed__));
 struct _idt_descr { u32 a; u32 b; } __attribute__((__packed__));
 
+#define op_cpu_id() (cpu_number_map(smp_processor_id()))
+
 /* we can't unload safely on SMP */
 #ifdef CONFIG_SMP
 #define smp_can_unload() (allow_unload)