From: Maynard J. <may...@us...> - 2013-07-29 15:36:36
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On 07/26/2013 11:31 AM, Will Deacon wrote: > Hi Maynard, > > On Thu, Jul 25, 2013 at 08:37:28PM +0100, Maynard Johnson wrote: >> On 07/25/2013 10:07 AM, Maynard Johnson wrote: >>> On 07/24/2013 05:48 PM, Andi Kleen wrote: >>>> From: Andi Kleen <ak...@li...> >>>> >>>> Thanks to Sanjay Patel for noticing the missing ULT number. >>> >>> OK, Andi, I'll put out an RC2 that has this fix (I know of at least one other problem that should be fixed, too). Before rolling out RC2, I would like to get some more testing feedback on RC1 -- from any community members, but especially from my fellow maintainers on cc. >> Oops! Didn't mean to leave you out of the fun, Will. ;-) > > Ok, all looks good on ARM (Cortex-A15) except that the minimum event period > for the default event (CPU_CYCLES) is too low, so running operf -g without > any additional arguments grinds everything to a halt. > > There's a patch below to sort that out. Thanks, Will. Patch applied. -Maynard > > Cheers, > > Will > > --->8 > > From f0b0b77abebfe213954366e416efbe753647dc82 Mon Sep 17 00:00:00 2001 > From: Will Deacon <wil...@ar...> > Date: Fri, 26 Jul 2013 17:26:07 +0100 > Subject: [PATCH] ARM: events: increase minimum cycle period to 100k > > On ARM, we intentionally leave the minimum event counters low since > the performance profile of the cores can vary dramatically between CPUs > and their implementations. > > However, since the default event is CPU_CYCLES, it's best to err on the > side of caution and raise the limit to something more realistic so we > don't lock-up on the unsuspecting user (as opposed to somebody passing > an explicit event period). > > This patch raises the CPU_CYCLES minimum event count to 100k on ARM. > > Signed-off-by: Will Deacon <wil...@ar...> > --- > events/arm/armv7-common/events | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/events/arm/armv7-common/events b/events/arm/armv7-common/events > index 0b6ed45..c83b2b7 100644 > --- a/events/arm/armv7-common/events > +++ b/events/arm/armv7-common/events > @@ -33,4 +33,4 @@ event:0x1B counters:1,2,3,4,5,6 um:zero minimum:500 name:INST_SPEC : Instruction > event:0x1C counters:1,2,3,4,5,6 um:zero minimum:500 name:TTBR_WRITE_RETIRED : Write to TTBR architecturally executed, condition code pass > event:0x1D counters:1,2,3,4,5,6 um:zero minimum:500 name:BUS_CYCLES : Bus cycle > > -event:0xFF counters:0 um:zero minimum:500 name:CPU_CYCLES : CPU cycle > +event:0xFF counters:0 um:zero minimum:100000 name:CPU_CYCLES : CPU cycle > |