[PATCH] S/390: Add support for IBM zEnterprise EC12

[Andreas K. <kr...@li...>]

This patch adds support for the latest release of the
IBM mainframe series - the IBM zEnterprise EC12 (zEC12).

The CPU measurement facility didn't change.  So only the new CPU type
has to be tolerated.

The patch also fixes a build failure for non-x86 targets in operf.cpp.

Signed-off-by: Andreas Krebbel<kr...@li...>
---
 events/Makefile.am     |    3 ++-
 libop/op_cpu_type.c    |    1 +
 libop/op_cpu_type.h    |    1 +
 libop/op_events.c      |    1 +
 pe_profiling/operf.cpp |    2 +-
 utils/ophelp.c         |    1 +
 6 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/events/Makefile.am b/events/Makefile.am
index 758925d..9191a83 100644
--- a/events/Makefile.am
+++ b/events/Makefile.am
@@ -78,7 +78,8 @@ event_files = \
 	tile/tilepro/events tile/tilepro/unit_masks \
 	tile/tilegx/events tile/tilegx/unit_masks \
 	s390/z10/events s390/z10/unit_masks \
-	s390/z196/events s390/z196/unit_masks
+	s390/z196/events s390/z196/unit_masks \
+	s390/zEC12/events s390/zEC12/unit_masks
 
 install-data-local:
 	for i in ${event_files} ; do \
diff --git a/libop/op_cpu_type.c b/libop/op_cpu_type.c
index a54b2a9..7d67395 100644
--- a/libop/op_cpu_type.c
+++ b/libop/op_cpu_type.c
@@ -103,6 +103,7 @@ static struct cpu_descr const cpu_descrs[MAX_CPU_TYPE] = {
 	{ "TILE-GX", "tile/tilegx", CPU_TILE_TILEGX, 4 },
 	{ "IBM System z10", "s390/z10", CPU_S390_Z10, 1 },
 	{ "IBM zEnterprise z196", "s390/z196", CPU_S390_Z196, 1 },
+	{ "IBM zEnterprise EC12", "s390/zEC12", CPU_S390_ZEC12, 1 },
 	{ "Intel Ivy Bridge microarchitecture", "i386/ivybridge", CPU_IVYBRIDGE, 8 },
 	{ "ARM Cortex-A5", "arm/armv7-ca5", CPU_ARM_V7_CA5, 3 },
 	{ "ARM Cortex-A7", "arm/armv7-ca7", CPU_ARM_V7_CA7, 5 },
diff --git a/libop/op_cpu_type.h b/libop/op_cpu_type.h
index 1d5cb64..9f682c7 100644
--- a/libop/op_cpu_type.h
+++ b/libop/op_cpu_type.h
@@ -96,6 +96,7 @@ typedef enum {
 	CPU_TILE_TILEGX, /**< Tilera TILE-GX family */
 	CPU_S390_Z10, /* IBM System z10 */
 	CPU_S390_Z196, /* IBM zEnterprise z196 */
+	CPU_S390_ZEC12, /* IBM zEnterprise EC12 */
 	CPU_IVYBRIDGE, /* Intel Ivy-Bridge microarchitecture */
 	CPU_ARM_V7_CA5, /**< ARM Cortex-A5 */
 	CPU_ARM_V7_CA7, /**< ARM Cortex-A7 */
diff --git a/libop/op_events.c b/libop/op_events.c
index 6b02fcc..5327cd7 100644
--- a/libop/op_events.c
+++ b/libop/op_events.c
@@ -1191,6 +1191,7 @@ void op_default_event(op_cpu cpu_type, struct op_default_event_descr * descr)
 			break;
   	        case CPU_S390_Z10:
   	        case CPU_S390_Z196:
+  	        case CPU_S390_ZEC12:
  			if (op_get_nr_counters(cpu_type) > 1) {
  				descr->name = "HWSAMPLING";
  				descr->count = 4127518;
diff --git a/pe_profiling/operf.cpp b/pe_profiling/operf.cpp
index f3b72f9..b823679 100644
--- a/pe_profiling/operf.cpp
+++ b/pe_profiling/operf.cpp
@@ -1048,7 +1048,6 @@ static void _get_event_code(operf_event_t * event)
 	char oprof_event_code[9];
 	string command;
 	u64 base_code, config;
-	char mask[12];
 	char buf[20];
 	if ((snprintf(buf, 20, "%lu", event->count)) < 0) {
 		cerr << "Error parsing event count of " << event->count << endl;
@@ -1080,6 +1079,7 @@ static void _get_event_code(operf_event_t * event)
 
 
 #if defined(__i386__) || defined(__x86_64__)
+	char mask[12];
 	// Setup EventSelct[11:8] field for AMD
 	const char * vendor_AMD = "AuthenticAMD";
 	if (op_is_cpu_vendor((char *)vendor_AMD)) {
diff --git a/utils/ophelp.c b/utils/ophelp.c
index f48697b..2cd3f2a 100644
--- a/utils/ophelp.c
+++ b/utils/ophelp.c
@@ -772,6 +772,7 @@ int main(int argc, char const * argv[])
 
 	case CPU_S390_Z10:
 	case CPU_S390_Z196:
+	case CPU_S390_ZEC12:
 		event_doc = "IBM System z CPU Measurement Facility\n"
 			"http://www-01.ibm.com/support/docview.wss"
 			"?uid=isg26fcd1cc32246f4c8852574ce0044734a\n";
-- 
1.7.5.4