From: Thomas G. <tg...@li...> - 2009-01-14 17:55:40
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Tim, On Fri, 2 Jan 2009, Tim Blechmann wrote: > On Fri, 2008-12-26 at 03:42 +0100, Andi Kleen wrote: > > Tim Blechmann wrote: > > >> i am experiencing an issue, similar to the one reported in > > >> http://lkml.org/lkml/2008/10/30/319. > > > > > > bisecting showed, that commit b99170288421c79f0c2efa8b33e26e65f4bb7fb8 > > > (oprofile: Implement Intel architectural perfmon support) caused the > > > problem. > > > oddly, the newly introduced api is not used, since the model struct is > > > set during the ppro_init call ... > > > > We're still investigating the problem. Thanks for the report. > > btw, this issue still exists in tip/oprofile ... not sure, whether this > may be related, but i am running the machine in 64-bit mode ... can you please apply the patch below and provide the output ? That's one of the subtle differences to the 2.6.27 code, where the counter width is fixed to 32bit, which is correct anyway as the counter MSRs can only write the lower 32bits and sign extend bit 31 according to intel documentation. There are more subtle changes, but this is the most obvious one. Thanks, tglx --- arch/x86/oprofile/op_model_ppro.c | 2 ++ 1 file changed, 2 insertions(+) Index: linux-2.6/arch/x86/oprofile/op_model_ppro.c =================================================================== --- linux-2.6.orig/arch/x86/oprofile/op_model_ppro.c +++ linux-2.6/arch/x86/oprofile/op_model_ppro.c @@ -80,6 +80,8 @@ static void ppro_setup_ctrs(struct op_ms eax.full = cpuid_eax(0xa); if (counter_width < eax.split.bit_width) counter_width = eax.split.bit_width; + + printk(KERN_INFO "ppro counter_width: %d\n", counter_width); } /* clear all counters */ |