Re: [openwince-list] Adding support for MPC82xx

[Jeff C. <jc...@li...>]

On 07/28/2005 12:22 PM, Marcel Telka wrote:

>>What are the limits to what can be done with the PPC chips via the jtag
>>interface.
> 
> JTAG Tools currently supports only boundary scan.

What kinds of things with enough knowledge, time and expertise could be
added? I'm too new and inexperienced to understand what is possible.

Does the BSDL file for a particular chip, if you have the knowledge to
understand the BSDL syntax, define what can be done via a jtag port
besides boundary scan? Or, if you want to understand what can be done
via a jtag port to a specific chip, then you need to read the
manufacturers datasheet/manual about what the jtag port is capable of doing?

>>The powerpc chips are usually programmed with the BDM port. Can anything
>>really be done via the JTAG port?
> 
> Yes. I've programmed flash chip attached to the CPU using JTAG Tools.

If I understand this correctly, that is because JTAG is designed to
allow you to turn on and off the chips that are connected. So, if you
have 3 chips connected to the jtag port, you can tell the flash chip:
"hey I'm talking to you buddy!" and then go about programming it. If you
had a powerpc chip on the bus then it would ignore you talking to the flash.

>>Has anyone been able to program
>>registers or setup SDRAM/SRAM or anything like that?
> 
> This is not possible using boundary scan.

Ok. To quote an article online:

"Most of the CPLDs and FPGAs manufacturers such as Altera, Lattice, and
Xilinx, to mention a few, have incorporated boundary-scan logic into
their components including additional circuitry that uses the
boundary-scan 4-wire interface to program their devices in-system."

I think I'm starting to understand.

>>I'd like to try to do it; if I knew it was theoretically possible. If
> 
> I'm not sure. But if yes, then you need to write new bus driver for that job.

Ok. Let me try to understand via an example:

The Xilinx spartan-3 can be programmed via it's jtag port using the
Xilinx ISE. This is because Xilinx has incorporated additional circuitry
to allow the boundary-scan 4-wire interface to program their devices. If
I was to go and add support to the linux jtag program to do this, that
would be called a "new bus driver".

Am I understanding correctly at a high level?

>>Would that really write values into the memory space of the ppc cpu?
> 
> With current bus driver no.

Or perhaps, if the powerpc cpu manufacturer did not add circuitry to do
this it is impossible. (?)

> If you want to drive external chips, you don't need to write to the internal
> registers. Boundary scan is sufficient for slow chips, like flash. For chips,
> which requires quick access, the boundary scan is too slow.

OK. I know it can be really slow, I'm willing to be very patient. :)

Thanks for your email,
Jeff