openocd-devel

[Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

Relative long email.

I have not tried to use flashing so far. So today I tried to learn how to
flash the LPC2148 on board of the Olimex LPC-P2148.

I tried to halt the target and then use
"flash write_image isoc_io_sample.hex 0x0 ihex" but this does
not seem to work. Then I tried to use the following script from psas
(in part or in full, dcc or non-dcc)
http://www.linuxjournal.com/article/10421

#*****************
# open ocd (on chip debugger) script to flash lpc2148
# 'info .../OCD/src/openocd/doc/openocd.info'

# 3 is most. 0 is least info.
debug_level 1
# stop
reset halt
# log file
log_output write_flash.log
# pause...500mS
sleep 500
# current state
poll
# Force ARM7 into supervisor mode
reg cpsr 0x13
# mww: Memory word write
# Set the MEMMAP reg to point to flash (avoids problems while trying to flash)
mww 0xE01FC040 1
###
# * arm7_9 dcc_downloads <ENABLE|DISABLE> Enable the use of the debug
#     communications channel (DCC) to write larger (>128 byte) amounts
#     of memory. DCC downloads offer a huge speed increase, but might be
#     potentially unsafe, especially with targets running at a very low
#     speed. This command was introduced with OpenOCD rev. 60.
arm7_9 dcc_downloads enable
# Wait for target to enter debug mode. Default time is 5ms.
wait_halt
# pause
sleep 10
# current state
poll
# identify the flash
flash probe 0
# erase first bank only:
flash erase_sector 0 0 26
# pause
sleep 20
# memory display halfword <from address> [COUNT]
mdh 0x0 30
# pause
sleep 20
###
# * flash write_image [ERASE] <FILE> [OFFSET] [TYPE] Write the image
#     <FILE> to the current target's flash bank(s). A relocation
#     [OFFSET] can be specified and the file [TYPE] can be specified
#     explicitly as `bin' (binary), `ihex' (Intel hex), `elf' (ELF file)
#     or `s19' (Motorola s19). Flash memory will be erased prior to
#     programming if the `erase' parameter is given.
flash write_image isoc_io_sample.hex 0x0 ihex
#flash write_image serial.hex 0x0
#flash erase write_image serial.hex 0x0
#flash write_image serial.elf 0x0 elf
#flash write_image serial.hex 0x0 ihex
#flash write_image serial.bin 0x0 bin

# pause
sleep 20
# memory display halfword <from address> [COUNT]
mdh 0x0 30
# pause
sleep 20
# can't verify because of 0x14 reserved chksum address (LPC SPEC)
#verify_image serial.hex 0x0 bin
# memory display halfword <from address> [COUNT]
mdh 0x0 30

# pause
sleep 20
#reset run_and_halt
reset
halt

# pause
sleep 10
# stop the open ocd daemon.
#shutdown
#*****************


The flashing seem to be successful but the target is not working.

target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x8000005f pc: 0x0000088c
cpsr (/32): 0x00000013
dcc downloads are enabled
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x00000013 pc: 0x0000088c
flash 'lpc2000' found at 0x00000000
erased sectors 0 through 26 on flash bank 0 in 0.256274s
0x00000000: ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff
ffff ffff ffff ffff ffff
0x00000020: ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff
ffff ffff ffff
wrote 8036 byte from file isoc_io_sample.hex in 1.586009s (4.948053 kb/s)
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 0000
e1a0 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 0000
e1a0 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000
Error: invalid mode value encountered
Error: cpsr contains invalid mode value - communication failure
Runtime error, file "oocd_flash_lpc2148.script", line 96:
    Warn : DBGACK set while target was in unknown state. Reset or
initialize target.
Error: invalid mode value encountered
Error: cpsr contains invalid mode value - communication failure
Warn : DBGACK set while target was in unknown state. Reset or initialize target.
... (keeps the  same error)

After this error, I have to unplug everything and then use lpc21isp
to flash the target so that I can run OpenOCD again with J-Link V3.

I know the hex is correct since the target works when flashing
with lpc21isp. The hex file is built from the lpcusb project and
tested with the Linux host program from psas.

What is the correct step to flash the LPC2148?

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 11:18 AM, Xiaofan Chen <xia...@gm...> wrote:
> After this error, I have to unplug everything and then use lpc21isp
> to flash the target so that I can run OpenOCD again with J-Link V3.
>
> I know the hex is correct since the target works when flashing
> with lpc21isp. The hex file is built from the lpcusb project and
> tested with the Linux host program from psas.

[mcuee@acerpc jlinkv3]$ sh lpc21isp.sh
lpc21isp version 1.63
File isoc_io_sample.hex:
	loaded...
	converted to binary format...
	image size : 8036
Synchronizing (ESC to abort). OK
Read bootcode version: 11
2
Read part ID: LPC2148, 512 kiB ROM / 40 kiB SRAM (0x402FF25)
Will start programming at Sector 1 if possible, and conclude with
Sector 0 to ensure that checksum is written last.
Sector 1: ...........................................................................................
Sector 0: ...............................................................................................
Download Finished... taking 9 seconds
Now launching the brand new code

[mcuee@acerpc jlinkv3]$ openocd -f myopenocd.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-24-08:11) svn:1898


BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
jtag_speed: 20
RCLK - adaptive
Info : J-Link compiled Feb 20 2006 18:20:20 -- Update --
Info : JLink caps 0x3
Info : JLink hw version 30000
Info : Vref = 3.269 TCK = 1 TDI = 1 TDO = 0 TMS = 1 SRST = 1 TRST = 255

Info : J-Link JTAG Interface ready
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Info : accepting 'telnet' connection from 0
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x8000005f pc: 0x0000085c
Debug: 32 47270 command.c:88 script_command(): script_command - reset
Debug: 33 47270 command.c:105 script_command(): script_command -
reset, argv[0]=ocd_reset
Debug: 34 47270 command.c:105 script_command(): script_command -
reset, argv[1]=halt
Debug: 35 47271 target.c:3969 jim_target(): Target command params:
Debug: 36 47271 target.c:3970 jim_target(): target names
Debug: 37 47271 target.c:3103 target_handle_event(): event: 11
reset-start - no action
Debug: 38 47271 jtag.c:2416 jtag_init_reset(): Trying to bring the
JTAG controller to life by asserting TRST / RESET
Debug: 39 47271 jlink.c:488 jlink_reset(): trst: 1, srst: 0
Debug: 40 47277 jtag.c:1264 jtag_add_reset(): SRST line released
Debug: 41 47277 jtag.c:1283 jtag_add_reset(): TRST line asserted
Debug: 42 47277 jtag.c:413 jtag_call_event_callbacks(): jtag event:
JTAG controller reset (RESET or TRST)
Debug: 43 47277 jtag.c:1630 jtag_reset_callback(): -
Debug: 44 47478 jlink.c:488 jlink_reset(): trst: 1, srst: 1
Debug: 45 47482 jtag.c:1260 jtag_add_reset(): SRST line asserted
Debug: 46 47483 jtag.c:1283 jtag_add_reset(): TRST line asserted
Debug: 47 47483 jtag.c:413 jtag_call_event_callbacks(): jtag event:
JTAG controller reset (RESET or TRST)
Debug: 48 47483 jtag.c:1630 jtag_reset_callback(): -
Debug: 49 47483 jlink.c:488 jlink_reset(): trst: 0, srst: 0
Debug: 50 47496 jtag.c:1264 jtag_add_reset(): SRST line released
Debug: 52 47920 jtag.c:2383 jtag_init_inner(): Init JTAG chain
Debug: 53 47922 jtag.c:413 jtag_call_event_callbacks(): jtag event:
JTAG controller reset (RESET or TRST)
Debug: 54 47922 jtag.c:1630 jtag_reset_callback(): -
Info : 55 47929 jtag.c:1751 jtag_examine_chain(): JTAG tap:
lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer: 0x787, Part:
0xf1f0, Version: 0x4)
Info : 56 47930 jtag.c:1789 jtag_examine_chain(): JTAG Tap/device matched
Debug: 57 47930 jtag.c:413 jtag_call_event_callbacks(): jtag event:
JTAG controller reset (RESET or TRST)
Debug: 58 47930 jtag.c:1630 jtag_reset_callback(): -
Debug: 59 47933 target.c:3969 jim_target(): Target command params:
Debug: 60 47933 target.c:3970 jim_target(): target names
Debug: 61 47941 embeddedice.c:363 embeddedice_write_reg(): 0: 0x00000000
Debug: 62 47943 embeddedice.c:363 embeddedice_write_reg(): 12: 0x00000000
Debug: 63 47943 embeddedice.c:363 embeddedice_write_reg(): 20: 0x00000000
Debug: 64 47948 target.c:3969 jim_target(): Target command params:
Debug: 65 47948 target.c:3970 jim_target(): target names
Debug: 66 47948 target.c:3103 target_handle_event(): event: 12
reset-assert-pre - no action
Debug: 67 47948 arm7_9_common.c:976 arm7_9_assert_reset(): target->state: halted
Debug: 68 47948 embeddedice.c:363 embeddedice_write_reg(): 8: 0x00000000
Debug: 69 47948 embeddedice.c:363 embeddedice_write_reg(): 9: 0x00000003
Debug: 70 47949 embeddedice.c:363 embeddedice_write_reg(): 11: 0xffffffff
Debug: 71 47949 embeddedice.c:363 embeddedice_write_reg(): 12: 0x00000100
Debug: 72 47949 embeddedice.c:363 embeddedice_write_reg(): 13: 0x000000f7
Debug: 73 47952 jlink.c:488 jlink_reset(): trst: 1, srst: 1
Debug: 74 47958 jtag.c:1260 jtag_add_reset(): SRST line asserted
Debug: 75 47958 jtag.c:1283 jtag_add_reset(): TRST line asserted
Debug: 76 47958 jtag.c:413 jtag_call_event_callbacks(): jtag event:
JTAG controller reset (RESET or TRST)
Debug: 77 47958 jtag.c:1630 jtag_reset_callback(): -
Debug: 78 47958 target.c:3103 target_handle_event(): event: 13
reset-assert-post - no action
Debug: 79 47958 target.c:3969 jim_target(): Target command params:
Debug: 80 47958 target.c:3970 jim_target(): target names
Debug: 81 47959 target.c:3103 target_handle_event(): event: 14
reset-deassert-pre - no action
Debug: 82 47959 arm7_9_common.c:1045 arm7_9_deassert_reset():
target->state: reset
Debug: 83 48009 jlink.c:488 jlink_reset(): trst: 0, srst: 0
Debug: 84 48024 jtag.c:1264 jtag_add_reset(): SRST line released
Warn : 85 48024 arm7_9_common.c:1052 arm7_9_deassert_reset(): srst
pulls trst - can not reset into halted mode. Issuing halt after reset.
Debug: 87 48428 embeddedice.c:363 embeddedice_write_reg(): 0: 0x00000000
Debug: 88 48432 embeddedice.c:363 embeddedice_write_reg(): 12: 0x00000000
Debug: 89 48432 embeddedice.c:363 embeddedice_write_reg(): 20: 0x00000000
Debug: 90 48441 arm7_9_common.c:1257 arm7_9_halt(): target->state: running
Debug: 91 48441 embeddedice.c:363 embeddedice_write_reg(): 9: 0xffffffff
Debug: 92 48441 embeddedice.c:363 embeddedice_write_reg(): 11: 0xffffffff
Debug: 93 48441 embeddedice.c:363 embeddedice_write_reg(): 12: 0x00000100
Debug: 94 48441 embeddedice.c:363 embeddedice_write_reg(): 13: 0x000000f7
Debug: 95 48441 target.c:3103 target_handle_event(): event: 15
reset-deassert-post - no action
Debug: 96 48441 target.c:3969 jim_target(): Target command params:
Debug: 97 48441 target.c:3970 jim_target(): target names
Debug: 98 48445 embeddedice.c:363 embeddedice_write_reg(): 0: 0x00000005
Debug: 99 48445 embeddedice.c:363 embeddedice_write_reg(): 12: 0x00000000
Debug: 100 48448 arm7_9_common.c:1367 arm7_9_debug_entry(): target
entered debug from ARM state
Debug: 101 48452 arm7_9_common.c:1399 arm7_9_debug_entry(): target
entered debug state in System mode
Debug: 102 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r0: 0x00fe0500
Debug: 103 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r1: 0x00000001
Debug: 104 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r2: 0x00000800
Debug: 105 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r3: 0x00061a7f
Debug: 106 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r4: 0x00046234
Debug: 107 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r5: 0xe01fc040
Debug: 108 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r6: 0x7fffd1bc
Debug: 109 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r7: 0x40000120
Debug: 110 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r8: 0xea1e1000
Debug: 111 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r9: 0xf75bbc15
Debug: 112 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r10: 0xeab4779d
Debug: 113 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r11: 0xafe2eb12
Debug: 114 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r12: 0x000000e2
Debug: 115 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r13: 0x40007914
Debug: 116 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r14: 0x00000a54
Debug: 117 48453 arm7_9_common.c:1430 arm7_9_debug_entry(): r15: 0x00000858
Debug: 118 48453 arm7_9_common.c:1436 arm7_9_debug_entry(): entered
debug state at PC 0x858
Debug: 119 48453 target.c:712 target_call_event_callbacks(): target
event 4 (early-halted)
Debug: 120 48453 target.c:3103 target_handle_event(): event: 4
early-halted - no action
Debug: 121 48453 target.c:712 target_call_event_callbacks(): target
event 5 (halted)
Debug: 122 48453 target.c:3103 target_handle_event(): event: 5 halted
- no action
User : 123 48453 target.c:964 target_arch_state(): target state: halted
User : 124 48453 armv4_5.c:305 armv4_5_arch_state(): target halted in
ARM state due to debug-request, current mode: System
cpsr: 0x8000005f pc: 0x00000858
Debug: 125 48454 target.c:3969 jim_target(): Target command params:
Debug: 126 48454 target.c:3970 jim_target(): target names
Debug: 127 48454 target.c:3103 target_handle_event(): event: 21
reset-end - no action
Debug: 129 48460 command.c:88 script_command(): script_command - log_output
Debug: 130 48460 command.c:105 script_command(): script_command -
log_output, argv[0]=ocd_log_output
Debug: 131 48461 command.c:105 script_command(): script_command -
log_output, argv[1]=write_flash.log
^C

With debug level 3, the log file is too big to be attached.
The error is something like this.
Debug: 2604 52886 embeddedice.c:363 embeddedice_write_reg(): 9: 0xffffffff
Debug: 2605 52886 embeddedice.c:363 embeddedice_write_reg(): 11: 0xffffffff
Debug: 2606 52886 embeddedice.c:363 embeddedice_write_reg(): 12: 0x00000100
Debug: 2607 52886 embeddedice.c:363 embeddedice_write_reg(): 13: 0x000000f7
Debug: 2608 52889 embeddedice.c:363 embeddedice_write_reg(): 0: 0x00000005
Debug: 2609 52890 embeddedice.c:363 embeddedice_write_reg(): 12: 0x00000000
Debug: 2610 52893 arm7_9_common.c:1359 arm7_9_debug_entry(): target
entered debug from Thumb state
Debug: 2611 52898 arm7_9_common.c:1363 arm7_9_debug_entry(): r0_thumb:
0x00000000, pc_thumb: 0xfffffff6
Error: 2612 52904 armv4_5.h:117 armv4_5_mode_to_number(): invalid mode
value encountered
Error: 2613 52905 arm7_9_common.c:1395 arm7_9_debug_entry(): cpsr
contains invalid mode value - communication failure
Debug: 2614 52905 command.c:424 run_command(): Command failed with
error code -305
User : 2615 52905 command.c:626 openocd_jim_vfprintf(): Runtime error,
file "oocd_flash_lpc2148.script", line 96:
    User : 2616 52905 command.c:626 openocd_jim_vfprintf():
User : 2619 52905 command.c:626 openocd_jim_vfprintf():
User : 2621 52905 command.c:626 openocd_jim_vfprintf():
Warn : 2622 52991 arm7_9_common.c:899 arm7_9_poll(): DBGACK set while
target was in unknown state. Reset or initialize target.
Debug: 2623 52992 embeddedice.c:363 embeddedice_write_reg(): 0: 0x00000005
Debug: 2624 52992 embeddedice.c:363 embeddedice_write_reg(): 12: 0x00000000
Debug: 2625 52994 arm7_9_common.c:1359 arm7_9_debug_entry(): target
entered debug from Thumb state
Debug: 2626 52998 arm7_9_common.c:1363 arm7_9_debug_entry(): r0_thumb:
0x00000000, pc_thumb: 0xfffffff6
Error: 2627 53003 armv4_5.h:117 armv4_5_mode_to_number(): invalid mode
value encountered
Error: 2628 53004 arm7_9_common.c:1395 arm7_9_debug_entry(): cpsr
contains invalid mode value - communication failure
Warn : 2629 53096 arm7_9_common.c:899 arm7_9_poll(): DBGACK set while
target was in unknown state. Reset or initialize target.


-- 
Xiaofan http://mcuee.blogspot.com

[Openocd-development] Correct script to flash the lpc-2148

[Michael F. <fis...@t-...>]

Hello Xiaofan,

>I have not tried to use flashing so far. So today I tried to learn how to
>flash the LPC2148 on board of the Olimex LPC-P2148.
>
>I tried to halt the target and then use
>"flash write_image isoc_io_sample.hex 0x0 ihex" but this does
>not seem to work. 

Here I have a Olimex LPC-P2148 board too, tested with a FT2232
device under windows, with the r1893.

For testing, I have a short hex file, called test_rom.hex

1) flash write_image test_rom.hex 0x0
2) dump_image dump.bin 0x0 364

After this I got a file dump.bin on my HD. Now I convert the hex
file to a bin file with:

arm-elf-objcopy -I ihex -O binary test_rom.hex test_rom.bin

After this I compare the test_rom.bin with the dump.bin file.
Both files are equal!

Attached are the file which I use for testing. If you like send
me your file that I can test it here too.

Best regards,

Michael

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 4:08 PM, Michael Fischer <fis...@t-...> wrote:
> Here I have a Olimex LPC-P2148 board too, tested with a FT2232
> device under windows, with the r1893.
>
> For testing, I have a short hex file, called test_rom.hex
>
> 1) flash write_image test_rom.hex 0x0
> 2) dump_image dump.bin 0x0 364
>
> After this I got a file dump.bin on my HD. Now I convert the hex
> file to a bin file with:
>
> arm-elf-objcopy -I ihex -O binary test_rom.hex test_rom.bin
>
> After this I compare the test_rom.bin with the dump.bin file.
> Both files are equal!

Up to here everything seems to be ok. The files are equal.

But then I can not halt the chip after reset. It seems to me the
chip is in the wrong state after flashing.

I am not so sure what your hex is doing since nothing happens
on the board. Even if I use lpc21isp to flash the code, I can not halt
the chip with my J-Link.

> Attached are the file which I use for testing. If you like send
> me your file that I can test it here too.
>

I am using the following simple script and J-Link V3.
I will try yours as well.

source [find target/lpc2148.cfg]
source [find interface/jlink.cfg]

#----------- Daemon Configuration
telnet_port     4444
gdb_port        3333
tcl_port	6666

# Tell gdb that you can use us to program the device
gdb_memory_map    enable
gdb_flash_program enable

I will send you the hex file by private email. The file is built from
the lpcusb sample (usb isochronous transfer example).

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 4:42 PM, Xiaofan Chen <xia...@gm...> wrote:
> I am using the following simple script and J-Link V3.
> I will try yours as well.
>

With your script (replace with JLink) it seems to be ok. Thanks.
Occasionally there are some timeout though.

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> halt
> flash write_image test_rom.hex 0x0
timed out while waiting for target halted
lpc2000 prepare sectors returned 151951736
error writing to flash at address 0x00000000 at offset 0x00000000 (-902)

called at file "command.c", line 453
called at file "embedded:startup.tcl", line 89
called at file "embedded:startup.tcl", line 91
called at file "embedded:startup.tcl", line 93
> halt
> poll
target state: halted
target halted in ARM state due to debug-request, current mode: Abort
cpsr: 0x600000d7 pc: 0x000000e4
> flash write_image test_rom.hex 0x0
wrote 364 byte from file test_rom.hex in 0.330007s (1.077155 kb/s)
> dump_image dump.bin 0x0 364
dumped 364 byte in 0.032037s
> reset
30 kHz
JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer:
0x787, Part: 0xf1f0, Version: 0x4)
JTAG Tap/device matched
> halt
target state: halted
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0xa00000f3 pc: 0x7fffd2c2
> step
target state: halted
target halted in Thumb state due to single-step, current mode: Supervisor
cpsr: 0xa00000f3 pc: 0x7fffd2c4


mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ openocd -f jlink.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-24-16:28) svn:1905
BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS
$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
30 kHz
Info : J-Link compiled Feb 20 2006 18:20:20 -- Update --
Info : JLink caps 0x3
Info : JLink hw version 30000
Info : Vref = 3.286 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 255

Info : J-Link JTAG Interface ready
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
30 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Warn : srst pulls trst - can not reset into halted mode. Issuing halt
after reset.
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x8000005f pc: 0x0000085c
requesting target halt and executing a soft reset
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x800000d3 pc: 0x00000000
1500 kHz
Info : accepting 'telnet' connection from 0
Error: timed out while waiting for target halted
Warn : lpc2000 prepare sectors returned 151951736
Error: error writing to flash at address 0x00000000 at offset 0x00000000 (-902)
target state: halted
target halted in ARM state due to debug-request, current mode: Abort
cpsr: 0x600000d7 pc: 0x000000e4
wrote 364 byte from file test_rom.hex in 0.330007s (1.077155 kb/s)
dumped 364 byte in 0.032037s
30 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
target state: halted
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0xa00000f3 pc: 0x7fffd2c2
target state: halted
target halted in Thumb state due to single-step, current mode: Supervisor
cpsr: 0xa00000f3 pc: 0x7fffd2c4


-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 5:02 PM, Xiaofan Chen <xia...@gm...> wrote:
> On Sun, May 24, 2009 at 4:42 PM, Xiaofan Chen <xia...@gm...> wrote:
>> I am using the following simple script and J-Link V3.
>> I will try yours as well.
>>
>
> With your script (replace with JLink) it seems to be ok. Thanks.
> Occasionally there are some timeout though.
>

With your script, I can flash the files and I can halt the target.
However the flashing is apparently not correct as it does not
work. Using lpc21isp it works.

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ openocd -f jlink.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-24-16:28) svn:1905


BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
30 kHz
Error: J-Link command EMU_CMD_VERSION failed (-110)

Info : J-Link compiled Feb 20 2006 18:20:20 -- Update --
Info : JLink caps 0x3
Info : JLink hw version 30000
Info : Vref = 3.287 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 255

Info : J-Link JTAG Interface ready
Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive
packet not sent! (3202). Workaround: increase "set remotetimeout" in
GDB
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Warn : DBGACK set while target was in unknown state. Reset or initialize target.
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000020
30 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Warn : srst pulls trst - can not reset into halted mode. Issuing halt
after reset.
target state: halted
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0xa00000f3 pc: 0x7fffd2c0
requesting target halt and executing a soft reset
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
1500 kHz
Info : accepting 'telnet' connection from 0
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
wrote 8036 byte from file isoc_io_sample.hex in 1.679032s (4.673917 kb/s)
dumped 8036 byte in 0.636055s
30 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
target state: running
^C

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> halt
> poll
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
> halt
> poll
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
> flash write_image isoc_io_sample.hex 0x0
wrote 8036 byte from file isoc_io_sample.hex in 1.679032s (4.673917 kb/s)
> dump_image dump_isoc.bin 0x0 8036
dumped 8036 byte in 0.636055s
> halt
> reset
30 kHz
JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer:
0x787, Part: 0xf1f0, Version: 0x4)
JTAG Tap/device matched
> poll
target state: running
> Connection closed by foreign host.




-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Michael F. <fis...@t-...>]

Hello Xiaofan,

>With your script, I can flash the files and I can halt the target.
>However the flashing is apparently not correct as it does not
>work. Using lpc21isp it works.

first of all I think it is a checksum problem which control a
valid user code. Take a look in the LPC2148 user manual.
In you startup code the checksum was missing.

4.2 Criterion for a valid user code

It is possible that the lpc21isp calculated the correct
checksum and placed it in you code.

But it could be possible that the J-Link had a problem too.

Have other users problem with flashing the LPC2148?

Best regards,

Michael

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 5:59 PM, Michael Fischer <fis...@t-...> wrote:
>
> But it could be possible that the J-Link had a problem too.

From all the tests, it seems to me that it is a J-Link problem.
It seems to me that you can flash the LPC-2148 with ft2232
interface or with the Segger J-Flash using J-Link. But I can not flash
bigger hex files with J-Link with OpenOCD and I tested
both V3 and V6 J-Link.

> Have other users problem with flashing the LPC2148?
>

I hope other users can also report their success or failure
with J-Link and flashing LPC2148 or similar NXP ARM7 parts.

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Michael F. <fis...@t-...>]

Hello list,

now I could reproduce the problem here with the original
Olimex BLINK example. It will not work, the problem is the
checksum.

The startup code looks like:

_vectors:       ldr     PC, Reset_Addr
                ldr     PC, Undef_Addr
                ldr     PC, SWI_Addr
                ldr     PC, PAbt_Addr
                ldr     PC, DAbt_Addr
                nop	/* Reserved Vector (holds Philips ISP checksum) */

In this case the bootloader will start, and not the application.
Now I take a look in the openocd manual and found the following
information:

13.2.2.1 lpc2000 options
flash bank lpc2000 <base> <size> 0 0 <target> <variant> <clock> [calc
checksum]

...and the optional keyword calc checksum, telling the
driver to calculate a valid checksum for the exception vector table.

If I use now the calc_checksum options in my cfg file:

flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum

I got the following output from OpenOCD:

> flash write_image main.hex 0x0
Verification will fail since checksum in image(0xe1a00000) written to flash
was
different from calculated vector checksum(0xb9205f84).
To remove this warning modify build tools on developer PC to inject correct
LPC
vector checksum.
wrote 756 byte from file main.hex in 0.171875s (4.295455 kb/s)

The new checksum was calculated, and the program is working.

An other solution is, to change the startup code like:

_vectors:       ldr     PC, Reset_Addr
                ldr     PC, Undef_Addr
                ldr     PC, SWI_Addr
                ldr     PC, PAbt_Addr
                ldr     PC, DAbt_Addr
                .word 0xb9205f84

In this case the correct checksum is set, and the program should work too.

Attached is the main.hex file which should work with the lpc2148 without
the calc_checksum key. LED1 and LED2 are flashing.

Best regards,

Michael

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 7:03 PM, Michael Fischer <fis...@t-...> wrote:
> Now I take a look in the openocd manual and found the following
> information:
>
> 13.2.2.1 lpc2000 options
> flash bank lpc2000 <base> <size> 0 0 <target> <variant> <clock> [calc
> checksum]
>
> ...and the optional keyword calc checksum, telling the
> driver to calculate a valid checksum for the exception vector table.
>
> If I use now the calc_checksum options in my cfg file:
> The new checksum was calculated, and the program is working.

Yes I think this is working now with your updated cfg file.

> An other solution is, to change the startup code like:
>
> _vectors:       ldr     PC, Reset_Addr
>                ldr     PC, Undef_Addr
>                ldr     PC, SWI_Addr
>                ldr     PC, PAbt_Addr
>                ldr     PC, DAbt_Addr
>                .word 0xb9205f84
>
> In this case the correct checksum is set, and the program should work too.
>
It seems to me this is not preferred in real life. The checksum will change
every time you change the program and you do not want to change
your startup code every time. All the examples I have use the similar
startup codes without setting the checksum.

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 7:03 PM, Michael Fischer <fis...@t-...> wrote:

> Attached is the main.hex file which should work with the lpc2148 without
> the calc_checksum key. LED1 and LED2 are flashing.

Yes this works well with my V3 Black Jlink. The two LEDs are flashing now.
I updated to the latest SVN with your updated lpc2148.cfg.

I will try some other hex files. Thanks a lot for debugging the problems for me.

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ openocd -f
myopenocd.cfg Open On-Chip Debugger 0.2.0-in-development
(2009-05-24-16:28) svn:1905

BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS

$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
RCLK - adaptive
Info : J-Link compiled Feb 20 2006 18:20:20 -- Update --
Info : JLink caps 0x3
Info : JLink hw version 30000
Info : Vref = 3.269 TCK = 1 TDI = 1 TDO = 0 TMS = 1 SRST = 1 TRST = 255

Info : J-Link JTAG Interface ready
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Info : accepting 'telnet' connection from 0
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000174
wrote 756 byte from file led12_blink.hex in 0.380990s (1.937797 kb/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x0000013c

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000174
> flash write_image led12_blink.hex 0x0
wrote 756 byte from file led12_blink.hex in 0.380990s (1.937797 kb/s)
> reset
JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer:
0x787, Part: 0xf1f0, Version: 0x4)
JTAG Tap/device matched
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x0000013c

And I can just use the simplified config file.
mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ cat myopenocd.cfg
source [find target/lpc2148.cfg]
source [find interface/jlink.cfg]

#----------- Daemon Configuration
telnet_port     4444
gdb_port        3333
tcl_port	6666

# Tell gdb that you can use us to program the device (requires GDB
>=6.7 and libexapt)
gdb_memory_map    enable
gdb_flash_program enable


-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 8:55 PM, Xiaofan Chen <xia...@gm...> wrote:
> On Sun, May 24, 2009 at 7:03 PM, Michael Fischer <fis...@t-...> wrote:
>
>> Attached is the main.hex file which should work with the lpc2148 without
>> the calc_checksum key. LED1 and LED2 are flashing.
>
> Yes this works well with my V3 Black Jlink. The two LEDs are flashing now.
> I updated to the latest SVN with your updated lpc2148.cfg.
>
> I will try some other hex files. Thanks a lot for debugging the problems for me.
>

So I used a big hex file from JCWren's example.
http://jcwren.com/arm/packages/LPC2148_Demo_v144.tgz

OpenOCD does not seem to work.
1) The resultant device is only partial working. There is a virtual com
port now but I can not talk to with gtkterm/cutecom.
2) And it seems to have reset/halt problem.

Maybe you can give it a try.

I will also try it with a V6 yellow J-Link tomorrow.

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ openocd -f jlink.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-24-21:41) svn:1906


BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
30 kHz
Info : J-Link compiled Feb 20 2006 18:20:20 -- Update --
Info : JLink caps 0x3
Info : JLink hw version 30000
Info : Vref = 3.285 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 255

Info : J-Link JTAG Interface ready
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Warn : DBGACK set while target was in unknown state. Reset or initialize target.
target state: halted
target halted in Thumb state due to breakpoint, current mode: Supervisor
cpsr: 0xa00000f3 pc: 0x7fffd2c4
30 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Warn : srst pulls trst - can not reset into halted mode. Issuing halt
after reset.
target state: halted
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0xa00000f3 pc: 0x7fffd2c0
requesting target halt and executing a soft reset
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
1500 kHz
Info : accepting 'telnet' connection from 0
     TapName            | Enabled |   IdCode      Expected    IrLen
IrCap  IrMask Instr
---|--------------------|---------|------------|------------|------|------|------|---------
 0 | lpc2148.cpu        |    Y    | 0x4f1f0f0f | 0x4f1f0f0f | 0x04 |
0x01 | 0x0f | 0x0c
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
Warn : Verification will fail since checksum in image(0xe59ff004)
written to flash was different from calculated vector
checksum(0xb9205f88).
Warn : To remove this warning modify build tools on developer PC to
inject correct LPC vector checksum.
wrote 232748 byte from file lpc2148.hex in 27.502781s (8.264363 kb/s)
30 kHz
Error: JTAG communication failure, check connection, JTAG interface,
target power etc.
Error: trying to validate configured JTAG chain anyway...
Error: Could not validate JTAG scan chain, IR mismatch, scan returned
0x00. tap=lpc2148.cpu pos=0 expected 0x1 got 0
Warn : Could not validate JTAG chain, continuing anyway...
Warn : value captured during scan didn't pass the requested check:
Warn : captured: 0x00 check_value: 0x01 check_mask: 0x0F
Runtime error, file "embedded:startup.tcl", line 177:
    examine-fails: -104
Runtime error, file "command.c", line 453:
    Error: timed out while waiting for target halted
Runtime error, file "command.c", line 453:
    target state: running
Error: timed out while waiting for target halted
Runtime error, file "command.c", line 453:
    ^C

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> scan_chain
     TapName            | Enabled |   IdCode      Expected    IrLen
IrCap  IrMask Instr
---|--------------------|---------|------------|------------|------|------|------|---------
 0 | lpc2148.cpu        |    Y    | 0x4f1f0f0f | 0x4f1f0f0f | 0x04 |
0x01 | 0x0f | 0x0c
> halt
> poll
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
> flash write_image lpc2148.hex 0x0
Verification will fail since checksum in image(0xe59ff004) written to
flash was different from calculated vector checksum(0xb9205f88).
To remove this warning modify build tools on developer PC to inject
correct LPC vector checksum.
wrote 232748 byte from file lpc2148.hex in 27.502781s (8.264363 kb/s)
> reset
30 kHz
JTAG communication failure, check connection, JTAG interface, target power etc.
trying to validate configured JTAG chain anyway...
Could not validate JTAG scan chain, IR mismatch, scan returned 0x00.
tap=lpc2148.cpu pos=0 expected 0x1 got 0
Could not validate JTAG chain, continuing anyway...
value captured during scan didn't pass the requested check:
captured: 0x00 check_value: 0x01 check_mask: 0x0F
Runtime error, file "embedded:startup.tcl", line 177:
    examine-fails: -104
in procedure 'ocd_process_reset'
called at file "embedded:startup.tcl", line 176
Runtime error, file "command.c", line 453:

> halt
timed out while waiting for target halted
Runtime error, file "command.c", line 453:

> poll
target state: running
> halt
timed out while waiting for target halted
Runtime error, file "command.c", line 453:

> Connection closed by foreign host.

The script is based on yours.
mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ cat jlink.cfg
#
# For more information about the configuration files, take a
# look at the "Open On-Chip Debugger (openocd)" documentation.
#
# This config file was tested with OpenOCD version r1888+patch
#

# daemon configuration
telnet_port 4444
gdb_port 3333
tcl_port 6666

# tell gdb our flash memory map
# and enable flash programming
gdb_memory_map enable
gdb_flash_program enable

#########################################################
#
# Interface, if you want to use an other interface
# you must replace this section here.
#

#interface ft2232
#ft2232_device_desc "Amontec JTAGkey A"
#ft2232_layout jtagkey
#ft2232_vid_pid 0x0403 0xcff8

#########################################################

source [find interface/jlink.cfg]

#
# Target section, this example was tested with an
# Olimex LPC-P2148 board
#

# Start slow, speed up after reset
jtag_khz 30

if { [info exists CHIPNAME] } {	
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME lpc2148
}

if { [info exists ENDIAN] } {
   set _ENDIAN $ENDIAN
} else {
   set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x4f1f0f0f
}

jtag_nsrst_delay 200
jtag_ntrst_delay 200

# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
# JTAG, power-on reset is not enough, i.e. you need to perform a
# reset before being able to talk to the LPC2148, attach is not possible.

reset_config trst_and_srst srst_pulls_trst

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
-expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position
$_TARGETNAME -variant arm7tdmi-s_r4

$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000
-work-area-size 0x4000 -work-area-backup 0

$_TARGETNAME configure -event reset-start {
	jtag_khz 30
}

$_TARGETNAME configure -event reset-init {
	# Force target into ARM state.
	soft_reset_halt

	# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
	# "User Flash Mode" where interrupt vectors are _not_ remapped,
	# and reside in flash instead).
	#
	# See section 7.1 on page 32 ("Memory Mapping control register") in
	# "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006.
	# http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.manual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
	mwb 0xE01FC040 0x01

	jtag_khz 1500
}

# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock>
[calc_checksum]
#flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 calc_checksum
flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum

#########################################################

init

reset init




-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Michael F. <fis...@t-...>]

Hello Xiaofan,

I have tesed to flash the program here. I could flash it
with my ft2232 device. I do not check the functionality
of the program itself, LED1 was flashing.

>2) And it seems to have reset/halt problem.
This is correct, I could not get in contact with OpenOCD.
And I could not get in contact with the original segger
sw and try to erase the CPU. Here I must use FlashMagic
and the ICSP interface to erase the CPU.

Is it possible that the application switch of the JTAG
interface here?

Best regards,

Michael

-----Ursprüngliche Nachricht-----
Von: Xiaofan Chen [mailto:xia...@gm...]
Gesendet: Sonntag, 24. Mai 2009 16:02
An: Michael Fischer
Cc: Openocd-Dev; zw...@su...
Betreff: Re: [Openocd-development] Correct script to flash the lpc-2148


On Sun, May 24, 2009 at 8:55 PM, Xiaofan Chen <xia...@gm...> wrote:
> On Sun, May 24, 2009 at 7:03 PM, Michael Fischer <fis...@t-...>
wrote:
>
>> Attached is the main.hex file which should work with the lpc2148 without
>> the calc_checksum key. LED1 and LED2 are flashing.
>
> Yes this works well with my V3 Black Jlink. The two LEDs are flashing now.
> I updated to the latest SVN with your updated lpc2148.cfg.
>
> I will try some other hex files. Thanks a lot for debugging the problems
for me.
>

So I used a big hex file from JCWren's example.
http://jcwren.com/arm/packages/LPC2148_Demo_v144.tgz

OpenOCD does not seem to work.
1) The resultant device is only partial working. There is a virtual com
port now but I can not talk to with gtkterm/cutecom.
2) And it seems to have reset/halt problem.

Maybe you can give it a try.

I will also try it with a V6 yellow J-Link tomorrow.

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ openocd -f jlink.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-24-21:41) svn:1906


BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
30 kHz
Info : J-Link compiled Feb 20 2006 18:20:20 -- Update --
Info : JLink caps 0x3
Info : JLink hw version 30000
Info : Vref = 3.285 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 255

Info : J-Link JTAG Interface ready
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Warn : DBGACK set while target was in unknown state. Reset or initialize
target.
target state: halted
target halted in Thumb state due to breakpoint, current mode: Supervisor
cpsr: 0xa00000f3 pc: 0x7fffd2c4
30 kHz
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Warn : srst pulls trst - can not reset into halted mode. Issuing halt
after reset.
target state: halted
target halted in Thumb state due to debug-request, current mode: Supervisor
cpsr: 0xa00000f3 pc: 0x7fffd2c0
requesting target halt and executing a soft reset
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
1500 kHz
Info : accepting 'telnet' connection from 0
     TapName            | Enabled |   IdCode      Expected    IrLen
IrCap  IrMask Instr
---|--------------------|---------|------------|------------|------|------|-
-----|---------
 0 | lpc2148.cpu        |    Y    | 0x4f1f0f0f | 0x4f1f0f0f | 0x04 |
0x01 | 0x0f | 0x0c
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
Warn : Verification will fail since checksum in image(0xe59ff004)
written to flash was different from calculated vector
checksum(0xb9205f88).
Warn : To remove this warning modify build tools on developer PC to
inject correct LPC vector checksum.
wrote 232748 byte from file lpc2148.hex in 27.502781s (8.264363 kb/s)
30 kHz
Error: JTAG communication failure, check connection, JTAG interface,
target power etc.
Error: trying to validate configured JTAG chain anyway...
Error: Could not validate JTAG scan chain, IR mismatch, scan returned
0x00. tap=lpc2148.cpu pos=0 expected 0x1 got 0
Warn : Could not validate JTAG chain, continuing anyway...
Warn : value captured during scan didn't pass the requested check:
Warn : captured: 0x00 check_value: 0x01 check_mask: 0x0F
Runtime error, file "embedded:startup.tcl", line 177:
    examine-fails: -104
Runtime error, file "command.c", line 453:
    Error: timed out while waiting for target halted
Runtime error, file "command.c", line 453:
    target state: running
Error: timed out while waiting for target halted
Runtime error, file "command.c", line 453:
    ^C

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> scan_chain
     TapName            | Enabled |   IdCode      Expected    IrLen
IrCap  IrMask Instr
---|--------------------|---------|------------|------------|------|------|-
-----|---------
 0 | lpc2148.cpu        |    Y    | 0x4f1f0f0f | 0x4f1f0f0f | 0x04 |
0x01 | 0x0f | 0x0c
> halt
> poll
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0xa00000d3 pc: 0x00000000
> flash write_image lpc2148.hex 0x0
Verification will fail since checksum in image(0xe59ff004) written to
flash was different from calculated vector checksum(0xb9205f88).
To remove this warning modify build tools on developer PC to inject
correct LPC vector checksum.
wrote 232748 byte from file lpc2148.hex in 27.502781s (8.264363 kb/s)
> reset
30 kHz
JTAG communication failure, check connection, JTAG interface, target power
etc.
trying to validate configured JTAG chain anyway...
Could not validate JTAG scan chain, IR mismatch, scan returned 0x00.
tap=lpc2148.cpu pos=0 expected 0x1 got 0
Could not validate JTAG chain, continuing anyway...
value captured during scan didn't pass the requested check:
captured: 0x00 check_value: 0x01 check_mask: 0x0F
Runtime error, file "embedded:startup.tcl", line 177:
    examine-fails: -104
in procedure 'ocd_process_reset'
called at file "embedded:startup.tcl", line 176
Runtime error, file "command.c", line 453:

> halt
timed out while waiting for target halted
Runtime error, file "command.c", line 453:

> poll
target state: running
> halt
timed out while waiting for target halted
Runtime error, file "command.c", line 453:

> Connection closed by foreign host.

The script is based on yours.
mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ cat jlink.cfg
#
# For more information about the configuration files, take a
# look at the "Open On-Chip Debugger (openocd)" documentation.
#
# This config file was tested with OpenOCD version r1888+patch
#

# daemon configuration
telnet_port 4444
gdb_port 3333
tcl_port 6666

# tell gdb our flash memory map
# and enable flash programming
gdb_memory_map enable
gdb_flash_program enable

#########################################################
#
# Interface, if you want to use an other interface
# you must replace this section here.
#

#interface ft2232
#ft2232_device_desc "Amontec JTAGkey A"
#ft2232_layout jtagkey
#ft2232_vid_pid 0x0403 0xcff8

#########################################################

source [find interface/jlink.cfg]

#
# Target section, this example was tested with an
# Olimex LPC-P2148 board
#

# Start slow, speed up after reset
jtag_khz 30

if { [info exists CHIPNAME] } {
   set _CHIPNAME $CHIPNAME
} else {
   set _CHIPNAME lpc2148
}

if { [info exists ENDIAN] } {
   set _ENDIAN $ENDIAN
} else {
   set _ENDIAN little
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
   set _CPUTAPID 0x4f1f0f0f
}

jtag_nsrst_delay 200
jtag_ntrst_delay 200

# NOTE!!! LPCs need reset pulled while RTCK is low. 0 to activate
# JTAG, power-on reset is not enough, i.e. you need to perform a
# reset before being able to talk to the LPC2148, attach is not possible.

reset_config trst_and_srst srst_pulls_trst

jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
-expected-id $_CPUTAPID

set _TARGETNAME [format "%s.cpu" $_CHIPNAME]

target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position
$_TARGETNAME -variant arm7tdmi-s_r4

$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x40000000
-work-area-size 0x4000 -work-area-backup 0

$_TARGETNAME configure -event reset-start {
	jtag_khz 30
}

$_TARGETNAME configure -event reset-init {
	# Force target into ARM state.
	soft_reset_halt

	# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
	# "User Flash Mode" where interrupt vectors are _not_ remapped,
	# and reside in flash instead).
	#
	# See section 7.1 on page 32 ("Memory Mapping control register") in
	# "UM10139: Volume 1: LPC214x User Manual", Rev. 02 -- 25 July 2006.
	#
http://www.standardics.nxp.com/support/documents/microcontrollers/pdf/user.m
anual.lpc2141.lpc2142.lpc2144.lpc2146.lpc2148.pdf
	mwb 0xE01FC040 0x01

	jtag_khz 1500
}

# flash bank lpc2000 <base> <size> 0 0 <target#> <variant> <clock>
[calc_checksum]
#flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 calc_checksum
flash bank lpc2000 0x0 0x7d000 0 0 0 lpc2000_v2 14765 calc_checksum

#########################################################

init

reset init




--
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 11:10 PM, Michael Fischer <fis...@t-...> wrote:
> Hello Xiaofan,
>
> I have tesed to flash the program here. I could flash it
> with my ft2232 device. I do not check the functionality
> of the program itself, LED1 was flashing.

In my test, LED 1 is also flashing. The USB virtual
com port is also correctly presented as /dev/ttyACM0
but I could not talk to it with gtkterm/cutecom under
Linux. If I flash the hex file with lpc21isp, I can talk
with the device with gtkterm/cutecom.

>>2) And it seems to have reset/halt problem.
> This is correct, I could not get in contact with OpenOCD.
> And I could not get in contact with the original segger
> sw and try to erase the CPU. Here I must use FlashMagic
> and the ICSP interface to erase the CPU.
>
> Is it possible that the application switch of the JTAG
> interface here?
>

I need to check. In my case, I have to reflash it
with lpc21isp (put ICSP switches to the ON positions).

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 11:10 PM, Michael Fischer <fis...@t-...> wrote:
> Hello Xiaofan,
>
> I have tesed to flash the program here. I could flash it
> with my ft2232 device. I do not check the functionality
> of the program itself, LED1 was flashing.

And you can switch on/off LED 2 by pressing the
two switches. So I think you flashing is good.

>>2) And it seems to have reset/halt problem.
> This is correct, I could not get in contact with OpenOCD.
> And I could not get in contact with the original segger
> sw and try to erase the CPU. Here I must use FlashMagic
> and the ICSP interface to erase the CPU.
>
> Is it possible that the application switch of the JTAG
> interface here?

Indeed. I tried to communicate with the chip programmed
by lpc21isp (functional) with Segger's  Linux utility or
OpenOCD and both are not working. So the author
may have disable JTAG. I have not looked in detail of
the codes yet.

So in the end, it is working at your end using the ft2232
interface for OpenOCD.

I will try with the J-Link V6 a bit later and report.

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Mon, May 25, 2009 at 7:31 PM, Xiaofan Chen <xia...@gm...> wrote:

> I will try with the J-Link V6 a bit later and report.
>

Somehow 1906 can not connect to my J-Link V6 with your script.

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv6$ openocd -f jlink.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-24-21:41) svn:1906


BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
30 kHz
Info : J-Link ARM V6 compiled Dec 03 2007 17:34:18
Info : JLink caps 0xf7fbf
Info : JLink hw version 60000
Info : JLink max mem block 9992
Info : Vref = 3.248 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 1

Info : J-Link JTAG Interface ready
Error: usb_bulk_read failed (requested=1, result=-110)
Error: jlink_tap_execute, wrong result -107 (expected 1)
Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive
packet not sent! (3121). Workaround: increase "set remotetimeout" in
GDB
Error: usb_bulk_read failed (requested=1, result=-110)
Error: jlink_tap_execute, wrong result -107 (expected 1)
Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive
packet not sent! (3222). Workaround: increase "set remotetimeout" in
GDB
Error: usb_bulk_read failed (requested=1, result=-110)
Error: jlink_tap_execute, wrong result -107 (expected 1)
Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive
packet not sent! (3408). Workaround: increase "set remotetimeout" in
GDB
30 kHz
Error: usb_bulk_read failed (requested=1, result=-110)
Error: jlink_tap_execute, wrong result -107 (expected 1)
Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive
packet not sent! (3230). Workaround: increase "set remotetimeout" in
GDB
Error: usb_bulk_read failed (requested=1, result=-110)
Error: jlink_tap_execute, wrong result -107 (expected 1)
Runtime error, file "embedded:startup.tcl", line 173:
    error: -104
Runtime error, file "jlink.cfg", line 104:


-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Mon, May 25, 2009 at 7:43 PM, Xiaofan Chen <xia...@gm...> wrote:
>> I will try with the J-Link V6 a bit later and report.
>>
> Somehow 1906 can not connect to my J-Link V6 with your script.

With the simple script, V1906 can talk to J-Link V6. It seems to
work with your simple LED 1/2 blinking hex file. I tried both
jlink_hw_jtag 2  or 3.

More tests to follow.

source [find target/lpc2148.cfg]
source [find interface/jlink.cfg]

#----------- Daemon Configuration

telnet_port     4444
gdb_port        3333
tcl_port	6666


# Tell gdb that you can use us to program the device (requires GDB
>=6.7 and libexapt)
gdb_memory_map    enable
gdb_flash_program enable

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv6$ openocd -f myopenocd.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-24-21:41) svn:1906


BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
RCLK - adaptive
Error: J-Link command EMU_CMD_VERSION impossible return length 0x2d4a
Error: J-Link command EMU_CMD_VERSION failed (-110)

Info : J-Link ARM V6 compiled Dec 03 2007 17:34:18
Info : JLink caps 0xf7fbf
Info : JLink hw version 60000
Info : JLink max mem block 9992
Info : Vref = 3.248 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 1

Info : J-Link JTAG Interface ready
Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive
packet not sent! (3212). Workaround: increase "set remotetimeout" in
GDB
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Info : accepting 'telnet' connection from 0
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000194
wrote 756 byte from file led12_blink.hex in 0.644003s (1.146394 kb/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000178
Error: Target not halted
Error: error writing to flash at address 0x00000000 at offset 0x00000000 (-304)
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000124
wrote 756 byte from file led12_blink.hex in 0.370004s (1.995333 kb/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000124
^C

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv6$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000194
> jlink_hw_jtag  3
> flash write_image led12_blink.hex 0x0
wrote 756 byte from file led12_blink.hex in 0.644003s (1.146394 kb/s)
> reset
JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer:
0x787, Part: 0xf1f0, Version: 0x4)
JTAG Tap/device matched
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000178
> resume
> jlink_hw_jtag  2
> flash write_image led12_blink.hex 0x0
Target not halted
error writing to flash at address 0x00000000 at offset 0x00000000 (-304)

called at file "command.c", line 453
called at file "embedded:startup.tcl", line 89
called at file "embedded:startup.tcl", line 91
called at file "embedded:startup.tcl", line 93
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000124
> flash write_image led12_blink.hex 0x0
wrote 756 byte from file led12_blink.hex in 0.370004s (1.995333 kb/s)
> reset
JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer:
0x787, Part: 0xf1f0, Version: 0x4)
JTAG Tap/device matched
> jlink_hw_jtag  3
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000124
> Connection closed by foreign host.

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Mon, May 25, 2009 at 8:02 PM, Xiaofan Chen <xia...@gm...> wrote:
> With the simple script, V1906 can talk to J-Link V6. It seems to
> work with your simple LED 1/2 blinking hex file. I tried both
> jlink_hw_jtag 2  or 3.
>
> More tests to follow.

But it still does not work with the lpcusb isoc hex file.

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv6$ openocd -f myopenocd.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-24-21:41) svn:1906


BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
RCLK - adaptive
Info : J-Link ARM V6 compiled Dec 03 2007 17:34:18
Info : JLink caps 0xf7fbf
Info : JLink hw version 60000
Info : JLink max mem block 9992
Info : Vref = 3.248 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 1

Info : J-Link JTAG Interface ready
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Warn : DBGACK set while target was in unknown state. Reset or initialize target.
target state: halted
target halted in ARM state due to breakpoint, current mode: System
cpsr: 0x800000df pc: 0x00000140
Info : accepting 'telnet' connection from 0
target state: halted
target halted in ARM state due to breakpoint, current mode: System
cpsr: 0x800000df pc: 0x00000140
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
target state: running
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000128
Warn : Verification will fail since checksum in image(0xe1a00000)
written to flash was different from calculated vector
checksum(0xb9205f84).
Warn : To remove this warning modify build tools on developer PC to
inject correct LPC vector checksum.
wrote 8036 byte from file isoc_io_sample.hex in 2.891050s (2.714466 kb/s)
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
target state: running
target state: halted
target halted in ARM state due to debug-request, current mode: Abort
cpsr: 0x400000d7 pc: 0x0000014c
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
^C

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv6$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> halt
> poll
target state: halted
target halted in ARM state due to breakpoint, current mode: System
cpsr: 0x800000df pc: 0x00000140
> reset
JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer:
0x787, Part: 0xf1f0, Version: 0x4)
JTAG Tap/device matched
> poll
target state: running
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x800000df pc: 0x00000128
> jlink_hw_jtag 3
> flash write_image isoc_io_sample.hex 0x0
Verification will fail since checksum in image(0xe1a00000) written to
flash was different from calculated vector checksum(0xb9205f84).
To remove this warning modify build tools on developer PC to inject
correct LPC vector checksum.
wrote 8036 byte from file isoc_io_sample.hex in 2.891050s (2.714466 kb/s)
> reset
JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer:
0x787, Part: 0xf1f0, Version: 0x4)
JTAG Tap/device matched
> init
> poll
target state: running
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: Abort
cpsr: 0x400000d7 pc: 0x0000014c
> reset
JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer:
0x787, Part: 0xf1f0, Version: 0x4)
JTAG Tap/device matched
> Connection closed by foreign host.


-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Mon, May 25, 2009 at 8:09 PM, Xiaofan Chen <xia...@gm...> wrote:
> On Mon, May 25, 2009 at 8:02 PM, Xiaofan Chen <xia...@gm...> wrote:
>> With the simple script, V1906 can talk to J-Link V6. It seems to
>> work with your simple LED 1/2 blinking hex file. I tried both
>> jlink_hw_jtag 2  or 3.
>>
>> More tests to follow.
>
> But it still does not work with the lpcusb isoc hex file.

I mean the device is not functional.

It does not work with jcwren's example either. Here I use
manual reset. The flashing all seems to be successful
but the device is not working.

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv6$ openocd -f myopenocd.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-24-21:41) svn:1906


BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS


$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
RCLK - adaptive
Error: J-Link command EMU_CMD_VERSION failed (-110)

Error: J-Link command EMU_CMD_VERSION impossible return length 0x2d4a
Error: J-Link command EMU_CMD_VERSION failed (-110)

Info : J-Link ARM V6 compiled Dec 03 2007 17:34:18
Info : JLink caps 0xf7fbf
Info : JLink hw version 60000
Info : JLink max mem block 9992
Info : Vref = 3.248 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 1

Info : J-Link JTAG Interface ready
Warn : keep_alive() was not invoked in the 1000ms timelimit. GDB alive
packet not sent! (6123). Workaround: increase "set remotetimeout" in
GDB
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Info : accepting 'telnet' connection from 0
target state: halted
target halted in ARM state due to debug-request, current mode: Abort
cpsr: 0x400000d7 pc: 0x0000010c
Warn : Verification will fail since checksum in image(0xe59ff004)
written to flash was different from calculated vector
checksum(0xb9205f88).
Warn : To remove this warning modify build tools on developer PC to
inject correct LPC vector checksum.
wrote 232748 byte from file lpc2148.hex in 47.024014s (4.833551 kb/s)
^C

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv6$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: Abort
cpsr: 0x400000d7 pc: 0x0000010c
> flash write_image lpc2148.hex 0x0
Verification will fail since checksum in image(0xe59ff004) written to
flash was different from calculated vector checksum(0xb9205f88).
To remove this warning modify build tools on developer PC to inject
correct LPC vector checksum.
wrote 232748 byte from file lpc2148.hex in 47.024014s (4.833551 kb/s)
> Connection closed by foreign host.


So the yellow J-Link V6 behaves the same as V3. Other
than the simple LED blinking program, the two other
hex files are not working.

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Mon, May 25, 2009 at 8:13 PM, Xiaofan Chen <xia...@gm...> wrote:
>>> With the simple script, V1906 can talk to J-Link V6. It seems to
>>> work with your simple LED 1/2 blinking hex file. I tried both
>>> jlink_hw_jtag 2  or 3.
>>>
>>> More tests to follow.
>>
>> But it still does not work with the lpcusb isoc hex file.

According to vbindiff report of the dump file, the first 0x160
portion of the dump is not correct. Other than that, it seems
to be ok.

dump_isoc.bin is from OpenOCD.
isoc_io_sample.bin is from arm-elf-objcopy.

dump_isoc.bin
0000 0000: 18 F0 9F E5 18 F0 9F E5  18 F0 9F E5 18 F0 9F E5  ........ ........
0000 0010: 18 F0 9F E5 00 00 21 A0  10 F0 1F E5 10 F0 9F E5  ......!. ........
0000 0020: 40 00 00 00 E0 00 00 00  C0 00 00 00 C0 00 00 00  @....... ........
0000 0030: C4 00 00 00 00 00 00 00  C0 00 00 00 00 00 00 00  ........ ........
0000 0040: 00 00 80 E1 00 00 20 E1  00 00 A0 E1 00 00 00 E0  ...... . ........
0000 0050: 00 00 20 E1 00 00 A0 E1  00 00 00 E0 00 00 20 E1  .. ..... ...... .
0000 0060: 00 D0 20 E1 40 00 00 E0  D2 F0 21 E3 00 D0 80 E1  .. .@... ..!.....
0000 0070: 01 00 01 E2 50 D0 01 E1  00 D0 20 E1 00 00 00 E0  ....P... .. .....
0000 0080: D3 F0 21 E3 00 D0 80 E1  24 10 9F E5 24 20 9F E5  ..!..... $...$ ..
isoc_io_sample.bin
0000 0000: 18 F0 9F E5 18 F0 9F E5  18 F0 9F E5 18 F0 9F E5  ........ ........
0000 0010: 18 F0 9F E5 00 00 A0 E1  F0 FF 1F E5 14 F0 9F E5  ........ ........
0000 0020: 40 00 00 00 E4 00 00 00  E0 00 00 00 E4 00 00 00  @....... ........
0000 0030: E4 00 00 00 D8 00 00 00  DC 00 00 00 00 00 00 00  ........ ........
0000 0040: 78 00 9F E5 DB F0 21 E3  00 D0 A0 E1 40 00 40 E2  x.....!. ....@.@.
0000 0050: D7 F0 21 E3 00 D0 A0 E1  40 00 40 E2 D1 F0 21 E3  ..!..... @.@...!.
0000 0060: 00 D0 A0 E1 40 00 40 E2  D2 F0 21 E3 00 D0 A0 E1  ....@.@. ..!.....
0000 0070: 01 0C 40 E2 D3 F0 21 E3  00 D0 A0 E1 01 0B 40 E2  ..@...!. ......@.
0000 0080: DF F0 21 E3 00 D0 A0 E1  34 10 9F E5 34 20 9F E5  ..!..... 4...4 ..

dump_isoc.bin
0000 0080: D3 F0 21 E3 00 D0 80 E1  24 10 9F E5 24 20 9F E5  ..!..... $...$ ..
0000 0090: 00 30 80 E1 02 00 50 E1  04 00 81 14 04 00 82 10  .0....P. ........
0000 00A0: 00 00 0F 20 00 00 80 E3  00 11 09 E1 00 00 80 E1  ... .... ........
0000 00B0: 00 00 00 E1 00 00 81 24  0C E0 A0 20 12 01 00 E0  .......$ ... ....
0000 00C0: 01 00 00 40 00 00 00 00  00 00 00 40 00 02 00 40  ...@.... ...@...@
0000 00D0: 00 02 00 40 A8 06 00 40  FE FF FF EA FE FF FF EA  ...@...@ ........
0000 00E0: FE FF FF EA FE FF FF EA  00 00 00 40 00 00 00 40  ........ ...@...@
0000 00F0: 00 00 00 40 08 00 00 40  00 00 00 40 00 00 00 40  ...@...@ ...@...@
0000 0100: 00 00 00 40 00 00 80 00  04 10 05 80 00 00 A0 E1  ...@.... ........
isoc_io_sample.bin
0000 0080: DF F0 21 E3 00 D0 A0 E1  34 10 9F E5 34 20 9F E5  ..!..... 4...4 ..
0000 0090: 34 30 9F E5 03 00 52 E1  04 00 91 34 04 00 82 34  40....R. ...4...4
0000 00A0: FB FF FF 3A 00 00 A0 E3  20 10 9F E5 20 20 9F E5  ...:....  ...  ..
0000 00B0: 02 00 51 E1 04 00 81 34  FC FF FF 3A B7 01 00 EA  ..Q....4 ...:....
0000 00C0: DC 7E 00 40 64 1F 00 00  00 02 00 40 00 02 00 40  .~.@d... ...@...@
0000 00D0: 00 02 00 40 A8 06 00 40  FE FF FF EA FE FF FF EA  ...@...@ ........
0000 00E0: FE FF FF EA FE FF FF EA  FF 00 00 E2 30 40 2D E9  ........ ....0@-.
0000 00F0: 10 30 40 E2 40 50 9F E5  0F 00 50 E3 FF 30 03 E2  .0@.@P.. ..P..0..
0000 0100: 83 E0 A0 E1 00 30 95 95  04 30 95 85 80 C0 A0 E1  .....0.. .0......

dump_isoc.bin
0000 0110: 00 20 80 81 02 20 A0 83  00 30 81 81 00 30 80 81  . ... .. .0...0..
0000 0120: 08 10 01 E0 10 30 83 81  00 20 83 81 00 00 80 E1  .....0.. . ......
0000 0130: 00 30 81 80 00 30 85 85  00 00 9D E0 00 02 02 E0  .0...0.. ........
0000 0140: 00 00 8D E5 04 30 0D E1  00 00 8B 02 00 00 8D E5  .....0.. ........
0000 0150: 00 20 0D E1 00 00 95 01  03 00 00 E0 00 00 0D E1  . ...... ........
0000 0160: 10 30 40 E2 40 00 00 00  07 00 00 00 FF 30 07 E2  .0@.@... .....0..
0000 0170: 83 E0 A0 E1 00 30 95 95  04 30 95 85 80 C0 A0 E1  .....0.. .0......
0000 0180: 03 20 A0 93 03 20 A0 83  12 3C C3 91 12 3E C3 81  . ... .. .<...>..
0000 0190: FF 10 01 E2 11 3C 83 91  11 3E 83 81 05 40 A0 E1  .....<.. .>...@..
isoc_io_sample.bin
0000 0110: 03 20 A0 93 03 20 A0 83  12 3C C3 91 12 3E C3 81  . ... .. .<...>..
0000 0120: FF 10 01 E2 11 3C 83 91  11 3E 83 81 05 40 A0 E1  .....<.. .>...@..
0000 0130: 00 30 85 95 04 30 85 85  30 80 BD E8 00 C0 02 E0  .0...0.. 0.......
0000 0140: 00 00 9F E5 1E FF 2F E1  00 87 93 03 00 00 9F E5  ....../. ........
0000 0150: 1E FF 2F E1 00 87 93 03  FF 00 00 E2 30 40 2D E9  ../..... ....0@-.
0000 0160: 10 30 40 E2 40 50 9F E5  0F 00 50 E3 FF 30 03 E2  .0@.@P.. ..P..0..
0000 0170: 83 E0 A0 E1 00 30 95 95  04 30 95 85 80 C0 A0 E1  .....0.. .0......
0000 0180: 03 20 A0 93 03 20 A0 83  12 3C C3 91 12 3E C3 81  . ... .. .<...>..
0000 0190: FF 10 01 E2 11 3C 83 91  11 3E 83 81 05 40 A0 E1  .....<.. .>...@..

dump_isoc.bin
0000 0110: 00 20 80 81 02 20 A0 83  00 30 81 81 00 30 80 81  . ... .. .0...0..
0000 0120: 08 10 01 E0 10 30 83 81  00 20 83 81 00 00 80 E1  .....0.. . ......
0000 0130: 00 30 81 80 00 30 85 85  00 00 9D E0 00 02 02 E0  .0...0.. ........
0000 0140: 00 00 8D E5 04 30 0D E1  00 00 8B 02 00 00 8D E5  .....0.. ........
0000 0150: 00 20 0D E1 00 00 95 01  03 00 00 E0 00 00 0D E1  . ...... ........
0000 0160: 10 30 40 E2 40 00 00 00  07 00 00 00 FF 30 07 E2  .0@.@... .....0..
0000 0170: 83 E0 A0 E1 00 30 95 95  04 30 95 85 80 C0 A0 E1  .....0.. .0......
0000 0180: 03 20 A0 93 03 20 A0 83  12 3C C3 91 12 3E C3 81  . ... .. .<...>..
0000 0190: FF 10 01 E2 11 3C 83 91  11 3E 83 81 05 40 A0 E1  .....<.. .>...@..
isoc_io_sample.bin
0000 0110: 03 20 A0 93 03 20 A0 83  12 3C C3 91 12 3E C3 81  . ... .. .<...>..
0000 0120: FF 10 01 E2 11 3C 83 91  11 3E 83 81 05 40 A0 E1  .....<.. .>...@..
0000 0130: 00 30 85 95 04 30 85 85  30 80 BD E8 00 C0 02 E0  .0...0.. 0.......
0000 0140: 00 00 9F E5 1E FF 2F E1  00 87 93 03 00 00 9F E5  ....../. ........
0000 0150: 1E FF 2F E1 00 87 93 03  FF 00 00 E2 30 40 2D E9  ../..... ....0@-.
0000 0160: 10 30 40 E2 40 50 9F E5  0F 00 50 E3 FF 30 03 E2  .0@.@P.. ..P..0..
0000 0170: 83 E0 A0 E1 00 30 95 95  04 30 95 85 80 C0 A0 E1  .....0.. .0......
0000 0180: 03 20 A0 93 03 20 A0 83  12 3C C3 91 12 3E C3 81  . ... .. .<...>..
0000 0190: FF 10 01 E2 11 3C 83 91  11 3E 83 81 05 40 A0 E1  .....<.. .>...@..


-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Mon, May 25, 2009 at 9:46 PM, Xiaofan Chen <xia...@gm...> wrote:
>>> But it still does not work with the lpcusb isoc hex file.
>
> According to vbindiff report of the dump file, the first 0x160
> portion of the dump is not correct. Other than that, it seems
> to be ok.
>
> dump_isoc.bin is from OpenOCD.
> isoc_io_sample.bin is from arm-elf-objcopy.
>

Problem solved. I need to erase the first bank!
# erase first bank only:
flash erase_sector 0 0 26

Now it works! Thanks for the help.

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Mon, May 25, 2009 at 9:56 PM, Xiaofan Chen <xia...@gm...> wrote:
> On Mon, May 25, 2009 at 9:46 PM, Xiaofan Chen <xia...@gm...> wrote:
>>>> But it still does not work with the lpcusb isoc hex file.
>>
>> According to vbindiff report of the dump file, the first 0x160
>> portion of the dump is not correct. Other than that, it seems
>> to be ok.
>>
>> dump_isoc.bin is from OpenOCD.
>> isoc_io_sample.bin is from arm-elf-objcopy.
>>
>
> Problem solved. I need to erase the first bank!
> # erase first bank only:
> flash erase_sector 0 0 26
>
> Now it works! Thanks for the help.

It seems that I am a lousy programmer but not too bad at
debugging issues. ;-)

Thanks a lot for the help from Michael Fisher!

mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ openocd -f myopenocd.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-25-21:15) svn:1910

BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS

$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
RCLK - adaptive
Info : J-Link compiled Feb 20 2006 18:20:20 -- Update --
Info : JLink caps 0x3
Info : JLink hw version 30000
Info : Vref = 3.268 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 255

Info : J-Link JTAG Interface ready
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched
Info : accepting 'telnet' connection from 0
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x2000005f pc: 0x00000868
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x2000005f pc: 0x00000868
flash 'lpc2000' found at 0x00000000
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 5f84
b920 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000
erased sectors 0 through 26 on flash bank 0 in 0.255993s
0x00000000: ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff
ffff ffff ffff ffff ffff
0x00000020: ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff
ffff ffff ffff
Warn : Verification will fail since checksum in image(0xe1a00000)
written to flash was different from calculated vector
checksum(0xb9205f84).
Warn : To remove this warning modify build tools on developer PC to
inject correct LPC vector checksum.
wrote 8036 byte from file isoc_io_sample.hex in 1.627033s (4.823293 kb/s)
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 5f84
b920 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 5f84
b920 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000 0000 0000
0x00000040: 0078 e59f f0db e321 d000 e1a0 0040 e240 f0d7 e321 d000
e1a0 0040 e240 f0d1 e321
0x00000060: d000 e1a0 0040 e240 f0d2 e321 d000 e1a0 0c01 e240 f0d3
e321 d000 e1a0 0b01 e240
0x00000080: f0df e321 d000 e1a0 1034 e59f 2034 e59f 3034 e59f 0003
e152 0004 3491 0004 3482
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 5f84
b920 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000 0000 0000
0x00000040: 0078 e59f f0db e321 d000 e1a0 0040 e240 f0d7 e321 d000
e1a0 0040 e240 f0d1 e321
0x00000060: d000 e1a0 0040 e240 f0d2 e321 d000 e1a0 0c01 e240 f0d3
e321 d000 e1a0 0b01 e240
0x00000080: f0df e321 d000 e1a0 1034 e59f 2034 e59f 3034 e59f 0003
e152 0004 3491 0004 3482
0x000000a0: fffb 3aff 0000 e3a0 1020 e59f 2020 e59f 0002 e151 0004
3481 fffc 3aff 01b7 ea00
0x000000c0: 7edc 4000 1f64 0000 0200 4000 0200 4000 0200 4000 06a8
4000 fffe eaff fffe eaff
0x000000e0: fffe eaff fffe eaff 00ff e200 4030 e92d 3010 e240 5040
e59f 000f e350 30ff e203
0x00000100: e083 e1a0 3000 9595 3004 8595 c080 e1a0 2003 93a0 2003
83a0 3c12 91c3 3e12 81c3
0x00000120: 10ff e201 3c11 9183 3e11 8183 4005 e1a0 3000 9585 3004
8585 8030 e8bd c000 e002
Info : JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f
(Manufacturer: 0x787, Part: 0xf1f0, Version: 0x4)
Info : JTAG Tap/device matched


mcuee@ubuntu904:~/Desktop/build/openocd/jlinkv3/flash$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> halt
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x2000005f pc: 0x00000868
> poll
target state: halted
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x2000005f pc: 0x00000868
> flash probe 0
flash 'lpc2000' found at 0x00000000
> mdh 0x0 30
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 5f84
b920 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000
> flash erase_sector 0 0 26
erased sectors 0 through 26 on flash bank 0 in 0.255993s
> mdh 0x0 30
0x00000000: ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff
ffff ffff ffff ffff ffff
0x00000020: ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff
ffff ffff ffff
> flash write_image isoc_io_sample.hex 0x0
Verification will fail since checksum in image(0xe1a00000) written to
flash was different from calculated vector checksum(0xb9205f84).
To remove this warning modify build tools on developer PC to inject
correct LPC vector checksum.
wrote 8036 byte from file isoc_io_sample.hex in 1.627033s (4.823293 kb/s)
> mdh 0x0 30
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 5f84
b920 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000
> mdh 0x0 80
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 5f84
b920 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000 0000 0000
0x00000040: 0078 e59f f0db e321 d000 e1a0 0040 e240 f0d7 e321 d000
e1a0 0040 e240 f0d1 e321
0x00000060: d000 e1a0 0040 e240 f0d2 e321 d000 e1a0 0c01 e240 f0d3
e321 d000 e1a0 0b01 e240
0x00000080: f0df e321 d000 e1a0 1034 e59f 2034 e59f 3034 e59f 0003
e152 0004 3491 0004 3482
> mdh 0x0 160
0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 5f84
b920 fff0 e51f f014 e59f
0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
0000 00dc 0000 0000 0000
0x00000040: 0078 e59f f0db e321 d000 e1a0 0040 e240 f0d7 e321 d000
e1a0 0040 e240 f0d1 e321
0x00000060: d000 e1a0 0040 e240 f0d2 e321 d000 e1a0 0c01 e240 f0d3
e321 d000 e1a0 0b01 e240
0x00000080: f0df e321 d000 e1a0 1034 e59f 2034 e59f 3034 e59f 0003
e152 0004 3491 0004 3482
0x000000a0: fffb 3aff 0000 e3a0 1020 e59f 2020 e59f 0002 e151 0004
3481 fffc 3aff 01b7 ea00
0x000000c0: 7edc 4000 1f64 0000 0200 4000 0200 4000 0200 4000 06a8
4000 fffe eaff fffe eaff
0x000000e0: fffe eaff fffe eaff 00ff e200 4030 e92d 3010 e240 5040
e59f 000f e350 30ff e203
0x00000100: e083 e1a0 3000 9595 3004 8595 c080 e1a0 2003 93a0 2003
83a0 3c12 91c3 3e12 81c3
0x00000120: 10ff e201 3c11 9183 3e11 8183 4005 e1a0 3000 9585 3004
8585 8030 e8bd c000 e002
> reset
JTAG tap: lpc2148.cpu tap/device found: 0x4f1f0f0f (Manufacturer:
0x787, Part: 0xf1f0, Version: 0x4)
JTAG Tap/device matched


-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Mon, May 25, 2009 at 9:58 PM, Xiaofan Chen <xia...@gm...> wrote:
> On Mon, May 25, 2009 at 9:56 PM, Xiaofan Chen <xia...@gm...> wrote:
>> On Mon, May 25, 2009 at 9:46 PM, Xiaofan Chen <xia...@gm...> wrote:
>>>>> But it still does not work with the lpcusb isoc hex file.
>>>
>>> According to vbindiff report of the dump file, the first 0x160
>>> portion of the dump is not correct. Other than that, it seems
>>> to be ok.
>>>
>>> dump_isoc.bin is from OpenOCD.
>>> isoc_io_sample.bin is from arm-elf-objcopy.
>>>
>>
>> Problem solved. I need to erase the first bank!
>> # erase first bank only:
>> flash erase_sector 0 0 26
>>
>> Now it works! Thanks for the help.
>
> It seems that I am a lousy programmer but not too bad at
> debugging issues. ;-)
>
> Thanks a lot for the help from Michael Fisher!
>

I tried to use the other hex file from JCWren's example,
and it is also working.

So I can say problem solved. Maybe this is a known trick
(from what I see in the psas script). So sorry for the false
alarming if this is indeed a known trick.

-- 
Xiaofan http://mcuee.blogspot.com

Re: [Openocd-development] Correct script to flash the lpc-2148

[Magnus L. <lu...@ml...>]

Hi

This looks like a reset problem, not a write to flash problem. This is 
the type of problems we are trying fix with the latest jtag/jlink/ft2232 
patches.

What is the target configuration.

Best regards
Magnus


Xiaofan Chen skrev:
> Relative long email.
>
> I have not tried to use flashing so far. So today I tried to learn how to
> flash the LPC2148 on board of the Olimex LPC-P2148.
>
> I tried to halt the target and then use
> "flash write_image isoc_io_sample.hex 0x0 ihex" but this does
> not seem to work. Then I tried to use the following script from psas
> (in part or in full, dcc or non-dcc)
> http://www.linuxjournal.com/article/10421
>
> #*****************
> # open ocd (on chip debugger) script to flash lpc2148
> # 'info .../OCD/src/openocd/doc/openocd.info'
>
> # 3 is most. 0 is least info.
> debug_level 1
> # stop
> reset halt
> # log file
> log_output write_flash.log
> # pause...500mS
> sleep 500
> # current state
> poll
> # Force ARM7 into supervisor mode
> reg cpsr 0x13
> # mww: Memory word write
> # Set the MEMMAP reg to point to flash (avoids problems while trying to flash)
> mww 0xE01FC040 1
> ###
> # * arm7_9 dcc_downloads <ENABLE|DISABLE> Enable the use of the debug
> #     communications channel (DCC) to write larger (>128 byte) amounts
> #     of memory. DCC downloads offer a huge speed increase, but might be
> #     potentially unsafe, especially with targets running at a very low
> #     speed. This command was introduced with OpenOCD rev. 60.
> arm7_9 dcc_downloads enable
> # Wait for target to enter debug mode. Default time is 5ms.
> wait_halt
> # pause
> sleep 10
> # current state
> poll
> # identify the flash
> flash probe 0
> # erase first bank only:
> flash erase_sector 0 0 26
> # pause
> sleep 20
> # memory display halfword <from address> [COUNT]
> mdh 0x0 30
> # pause
> sleep 20
> ###
> # * flash write_image [ERASE] <FILE> [OFFSET] [TYPE] Write the image
> #     <FILE> to the current target's flash bank(s). A relocation
> #     [OFFSET] can be specified and the file [TYPE] can be specified
> #     explicitly as `bin' (binary), `ihex' (Intel hex), `elf' (ELF file)
> #     or `s19' (Motorola s19). Flash memory will be erased prior to
> #     programming if the `erase' parameter is given.
> flash write_image isoc_io_sample.hex 0x0 ihex
> #flash write_image serial.hex 0x0
> #flash erase write_image serial.hex 0x0
> #flash write_image serial.elf 0x0 elf
> #flash write_image serial.hex 0x0 ihex
> #flash write_image serial.bin 0x0 bin
>
> # pause
> sleep 20
> # memory display halfword <from address> [COUNT]
> mdh 0x0 30
> # pause
> sleep 20
> # can't verify because of 0x14 reserved chksum address (LPC SPEC)
> #verify_image serial.hex 0x0 bin
> # memory display halfword <from address> [COUNT]
> mdh 0x0 30
>
> # pause
> sleep 20
> #reset run_and_halt
> reset
> halt
>
> # pause
> sleep 10
> # stop the open ocd daemon.
> #shutdown
> #*****************
>
>
> The flashing seem to be successful but the target is not working.
>
> target state: halted
> target halted in ARM state due to debug-request, current mode: System
> cpsr: 0x8000005f pc: 0x0000088c
> cpsr (/32): 0x00000013
> dcc downloads are enabled
> target state: halted
> target halted in ARM state due to debug-request, current mode: Supervisor
> cpsr: 0x00000013 pc: 0x0000088c
> flash 'lpc2000' found at 0x00000000
> erased sectors 0 through 26 on flash bank 0 in 0.256274s
> 0x00000000: ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff
> ffff ffff ffff ffff ffff
> 0x00000020: ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff ffff
> ffff ffff ffff
> wrote 8036 byte from file isoc_io_sample.hex in 1.586009s (4.948053 kb/s)
> 0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 0000
> e1a0 fff0 e51f f014 e59f
> 0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
> 0000 00dc 0000
> 0x00000000: f018 e59f f018 e59f f018 e59f f018 e59f f018 e59f 0000
> e1a0 fff0 e51f f014 e59f
> 0x00000020: 0040 0000 00e4 0000 00e0 0000 00e4 0000 00e4 0000 00d8
> 0000 00dc 0000
>   
This error appears after reset command
> Error: invalid mode value encountered
> Error: cpsr contains invalid mode value - communication failure
> Runtime error, file "oocd_flash_lpc2148.script", line 96:
>     Warn : DBGACK set while target was in unknown state. Reset or
> initialize target.
> Error: invalid mode value encountered
> Error: cpsr contains invalid mode value - communication failure
> Warn : DBGACK set while target was in unknown state. Reset or initialize target.
> ... (keeps the  same error)
>
> After this error, I have to unplug everything and then use lpc21isp
> to flash the target so that I can run OpenOCD again with J-Link V3.
>
> I know the hex is correct since the target works when flashing
> with lpc21isp. The hex file is built from the lpcusb project and
> tested with the Linux host program from psas.
>
> What is the correct step to flash the LPC2148?
>
>   

Re: [Openocd-development] Correct script to flash the lpc-2148

[Xiaofan C. <xia...@gm...>]

On Sun, May 24, 2009 at 5:04 PM, Magnus Lundin <lu...@ml...> wrote:
> Hi
>
> This looks like a reset problem, not a write to flash problem. This is the
> type of problems we are trying fix with the latest jtag/jlink/ft2232
> patches.
>
> What is the target configuration.
>

Here it is.

source [find target/lpc2148.cfg]
source [find interface/jlink.cfg]

#----------- Daemon Configuration
telnet_port     4444
gdb_port        3333
tcl_port	6666

# Tell gdb that you can use us to program the device (requires GDB
>=6.7 and libexapt)
gdb_memory_map    enable
gdb_flash_program enable

The script from Michael seems to be better and I can halt the target.
But the flashing problem is still there. Michael is helping me on this.
He is thinking that the hex file is without a checksum and there are
some problems with the startup code. I got the code from the
lpcusb project and lpc21isp seems to be ok with the hex file.


-- 
Xiaofan http://mcuee.blogspot.com