From: Dario A. <Dar...@no...> - 2015-10-16 00:39:18
Attachments:
samd20_swd_failure.txt
samd20_swd_success.txt
|
Cannot connect via SWD when SAMD20 flash (ATSAMD20J18) is not blank (host is Xubuntu 14.10 Utopic on i686): $ openocd -f /usr/local/share/openocd/scripts/board/atmel_samd20_xplained_pro.cfg -d 3 ... Debug: 211 17 cmsis_dap_usb.c:731 cmsis_dap_swd_switch_seq(): JTAG-to-SWD Debug: 212 18 cmsis_dap_usb.c:522 cmsis_dap_swd_run_queue(): Executing 2 queued transactions Debug: 213 18 cmsis_dap_usb.c:545 cmsis_dap_swd_run_queue(): DP read reg 0 0 Debug: 214 18 cmsis_dap_usb.c:545 cmsis_dap_swd_run_queue(): DP write reg 0 1e Debug: 215 19 cmsis_dap_usb.c:583 cmsis_dap_swd_run_queue(): SWD ack not OK: 0 JUNK Debug: 216 19 command.c:628 run_command(): Command failed with error code -4 User : 217 19 command.c:689 command_run_line(): in procedure 'init' in procedure 'ocd_bouncer' Debug: 218 19 command.c:628 run_command(): Command failed with error code -4 User : 219 19 command.c:689 command_run_line(): The problem can be worked around by first erasing the device using Atmel Studio (Win7) before using openocd. Corresponding output when SAMD20 flash is blank: $ openocd -f /usr/local/share/openocd/scripts/board/atmel_samd20_xplained_pro.cfg -d 3 ... Debug: 211 19 cmsis_dap_usb.c:731 cmsis_dap_swd_switch_seq(): JTAG-to-SWD Debug: 212 20 cmsis_dap_usb.c:522 cmsis_dap_swd_run_queue(): Executing 2 queued transactions Debug: 213 20 cmsis_dap_usb.c:545 cmsis_dap_swd_run_queue(): DP read reg 0 0 Debug: 214 20 cmsis_dap_usb.c:545 cmsis_dap_swd_run_queue(): DP write reg 0 1e Debug: 215 21 cmsis_dap_usb.c:600 cmsis_dap_swd_run_queue(): Read result: bc11477 Info : 216 21 adi_v5_swd.c:125 swd_connect(): SWD IDCODE 0x0bc11477 Complete debug logs are attached. Used the following instructions to build and install from source (taken from http://jjmilburn.github.io/2014/09/18/Atmel-SAMD20-EclipseCDT/): $ sudo apt-get install libudev-dev $ git clone git://github.com/signal11/hidapi.git $ cd hidapi $ ./bootstrap $ ./configure $ make $ sudo make install $ cd .. $ git clone git://git.code.sf.net/p/openocd/code openocd $ cd openocd $ ./bootstrap $ ./configure $ make $ sudo make install $ sudo apt-get install libhidapi-hidraw0 $ sudo cp contrib/99-openocd.rules /etc/udev/rules.d/99-openocd.rules $ sudo udevadm control --reload-rules The information contained in this email message, including any attachments or links to documents, may include privileged, confidential and/or inside information and is intended only for use of the individual or entity named above. If the reader of this message is not the intended recipient, or the employee or agent responsible to deliver it to the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please immediately notify the sender and destroy the original message. Thank you. |
From: Tomas V. <to...@us...> - 2015-10-16 08:14:20
|
Hi does your firmware set a sleep mode? You can try proposed changes http://openocd.zylin.com/2778 http://openocd.zylin.com/2606 Check if SRST is connected to RESETN and configure reset_config srst_only and you should be able regain debug control after reset halt Tomas On 16.10.2015 2:04, Dario Alcocer wrote: > Cannot connect via SWD when SAMD20 flash (ATSAMD20J18) is not blank (host is Xubuntu 14.10 Utopic on i686): > > $ openocd -f /usr/local/share/openocd/scripts/board/atmel_samd20_xplained_pro.cfg -d 3 > ... > Debug: 211 17 cmsis_dap_usb.c:731 cmsis_dap_swd_switch_seq(): JTAG-to-SWD > Debug: 212 18 cmsis_dap_usb.c:522 cmsis_dap_swd_run_queue(): Executing 2 queued transactions > Debug: 213 18 cmsis_dap_usb.c:545 cmsis_dap_swd_run_queue(): DP read reg 0 0 > Debug: 214 18 cmsis_dap_usb.c:545 cmsis_dap_swd_run_queue(): DP write reg 0 1e > Debug: 215 19 cmsis_dap_usb.c:583 cmsis_dap_swd_run_queue(): SWD ack not OK: 0 JUNK > Debug: 216 19 command.c:628 run_command(): Command failed with error code -4 > User : 217 19 command.c:689 command_run_line(): in procedure 'init' > in procedure 'ocd_bouncer' > Debug: 218 19 command.c:628 run_command(): Command failed with error code -4 > User : 219 19 command.c:689 command_run_line(): > > The problem can be worked around by first erasing the device using Atmel Studio (Win7) before using openocd. > > Corresponding output when SAMD20 flash is blank: > $ openocd -f /usr/local/share/openocd/scripts/board/atmel_samd20_xplained_pro.cfg -d 3 > ... > Debug: 211 19 cmsis_dap_usb.c:731 cmsis_dap_swd_switch_seq(): JTAG-to-SWD > Debug: 212 20 cmsis_dap_usb.c:522 cmsis_dap_swd_run_queue(): Executing 2 queued transactions > Debug: 213 20 cmsis_dap_usb.c:545 cmsis_dap_swd_run_queue(): DP read reg 0 0 > Debug: 214 20 cmsis_dap_usb.c:545 cmsis_dap_swd_run_queue(): DP write reg 0 1e > Debug: 215 21 cmsis_dap_usb.c:600 cmsis_dap_swd_run_queue(): Read result: bc11477 > Info : 216 21 adi_v5_swd.c:125 swd_connect(): SWD IDCODE 0x0bc11477 > > Complete debug logs are attached. > > Used the following instructions to build and install from source > (taken from http://jjmilburn.github.io/2014/09/18/Atmel-SAMD20-EclipseCDT/): > > $ sudo apt-get install libudev-dev > $ git clone git://github.com/signal11/hidapi.git > $ cd hidapi > $ ./bootstrap > $ ./configure > $ make > $ sudo make install > $ cd .. > > $ git clone git://git.code.sf.net/p/openocd/code openocd > $ cd openocd > $ ./bootstrap > $ ./configure > $ make > $ sudo make install > $ sudo apt-get install libhidapi-hidraw0 > $ sudo cp contrib/99-openocd.rules /etc/udev/rules.d/99-openocd.rules > $ sudo udevadm control --reload-rules > The information contained in this email message, including any attachments or links to documents, may include privileged, confidential and/or inside information and is intended only for use of the individual or entity named above. If the reader of this message is not the intended recipient, or the employee or agent responsible to deliver it to the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please immediately notify the sender and destroy the original message. Thank you. > > > ------------------------------------------------------------------------------ > > > _______________________________________________ > OpenOCD-devel mailing list > Ope...@li... > https://lists.sourceforge.net/lists/listinfo/openocd-devel |
From: Dario A. <Dar...@no...> - 2015-10-17 01:15:27
|
Tomas Venek writes: Tomas> Hi Tomas> does your firmware set a sleep mode? No, I don't believe so. (The flash was programmed with one of Atmel's ASF (Atmel Software Framework) example application.) Tomas> You can try proposed changes Tomas> http://openocd.zylin.com/2778 Tomas> http://openocd.zylin.com/2606 Thanks, I managed to apply these patches to my local build and rebuilt via "make; sudo make install". Tomas> Check if SRST is connected to RESETN and configure Tomas> reset_config srst_only Tomas> and you should be able regain debug control after Tomas> reset halt I'm not sure about SRST; I'll have to see if I can locate a schematic for Atmel's SAMD20 Xplained Pro evaluation board (the one I'm using at the moment.) Regarding "reset_config srst_only", I found the following inside of at91samdXX.cfg: reset_config srst_gates_jtag I changed this to read "reset_config srst_only" and tried running openocd again, without successfully connecting. Do I have to change "cortex_m reset_config" as well to use "srst_only"? (P.S. sorry about the long disclaimer at the end of this message; unfortunately, our email system automatically adds it and I cannot disable it...) -------- The information contained in this email message, including any attachments or links to documents, may include privileged, confidential and/or inside information and is intended only for use of the individual or entity named above. If the reader of this message is not the intended recipient, or the employee or agent responsible to deliver it to the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please immediately notify the sender and destroy the original message. Thank you. |
From: Tomas V. <to...@us...> - 2015-10-17 06:04:57
|
On 17.10.2015 3:00, Dario Alcocer wrote: > > Tomas Venek writes: > > Tomas> Hi > > Tomas> does your firmware set a sleep mode? > > No, I don’t believe so. (The flash was programmed with one of Atmel's > ASF (Atmel Software Framework) example application.) > Some ASF examples use sleep (low_power, sleepwalking_adc...) > > Tomas> You can try proposed changes > > Tomas> http://openocd.zylin.com/2778 > > Tomas> http://openocd.zylin.com/2606 > > Thanks, I managed to apply these patches to my local build and rebuilt > via "make; sudo make install". > > Tomas> Check if SRST is connected to RESETN and configure > > Tomas> reset_config srst_only > > Tomas> and you should be able regain debug control after > > Tomas> reset halt > > I'm not sure about SRST; I'll have to see if I can locate a schematic > for Atmel's SAMD20 Xplained Pro evaluation board (the one I'm using at > the moment.) > I do not have a Xplained kit so I'm not sure about RESETN wiring.Regarding "reset_config srst_only", I found the following inside of at91samdXX.cfg: > > reset_config srst_gates_jtag > > I changed this to read "reset_config srst_only" and tried running > openocd again, without successfully connecting. > Leave "reset_config srst_gates_jtag" in at91samdXX.cfg as is, it is ok. Add "reset_config srst_only" to your openocd.cfg, board config or give this command manually. > Do I have to change "cortex_m reset_config" as well to use "srst_only"? > > No. Start openocd and connect probably fail as before. Then issue a "reset halt". If still no connection try to check if RESETN pin is pulsed with a logic probe (and send a log) |
From: Joerg W. <op...@ur...> - 2015-10-17 07:49:09
|
As Tomas Vanek wrote: > You can try proposed changes > http://openocd.zylin.com/2778 > http://openocd.zylin.com/2606 > > Check if SRST is connected to RESETN and configure > reset_config srst_only > and you should be able regain debug control after > reset halt I just gave that a try, too (on a homemade SAMD20 board). Alas, I still have two issues: * When using the "program" (Tcl?) command, the target does not automatically run afterwards, but needs a hardware reset. I do have this on a SAM4, too, so it's perhaps unrelated. The command ends up in program '"$1"' exit Do I perhaps need a "reset run" before the exit? * When pressing the reset button while debugging, OpenOCD cannot catch up again. I tried the "[mon] reset halt", but it still yields: Open On-Chip Debugger 0.10.0-dev-00036-g48787e1 (2015-10-03-15:03) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html adapter speed: 500 kHz srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst Info : only one transport option; autoselect 'swd' Warn : Interface already configured, ignoring srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst adapter speed: 400 kHz cortex_m reset_config sysresetreq Info : CMSIS-DAP: SWD Supported Info : CMSIS-DAP: JTAG Supported Info : CMSIS-DAP: Interface Initialised (SWD) Info : CMSIS-DAP: FW Version = 01.16.0041 Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 1 Info : CMSIS-DAP: Interface ready Info : clock speed 400 kHz Info : SWD IDCODE 0x0bc11477 Info : at91samd20j18.cpu: hardware has 4 breakpoints, 2 watchpoints Info : accepting 'gdb' connection on tcp/3333 Info : SAMD MCU: SAMD20J18A (256KB Flash, 32KB RAM) undefined debug reason 7 - target needs reset Warn : WARNING! The target is already running. All changes GDB did to registers will be discarded! Waiting for target to halt. Warn : target at91samd20j18.cpu is not halted Polling target at91samd20j18.cpu failed, trying to reexamine Examination failed, GDB will be halted. Polling again in 100ms Polling target at91samd20j18.cpu failed, trying to reexamine Examination failed, GDB will be halted. Polling again in 300ms Polling target at91samd20j18.cpu failed, trying to reexamine Examination failed, GDB will be halted. Polling again in 700ms Polling target at91samd20j18.cpu failed, trying to reexamine Examination failed, GDB will be halted. Polling again in 1500ms Polling target at91samd20j18.cpu failed, trying to reexamine Examination failed, GDB will be halted. Polling again in 3100ms Polling target at91samd20j18.cpu failed, trying to reexamine Examination failed, GDB will be halted. Polling again in 6300ms Info : AP write error, reset will not halt Error: DP initialisation failed in procedure 'reset' in procedure 'ocd_bouncer' Polling target at91samd20j18.cpu failed, trying to reexamine Examination failed, GDB will be halted. Polling again in 6300ms -- cheers, Joerg .-.-. --... ...-- -.. . DL8DTL http://www.sax.de/~joerg/ Never trust an operating system you don't have sources for. ;-) |
From: Tomas V. <to...@us...> - 2015-10-17 08:30:10
|
Hi Joerg On 17.10.2015 9:49, Joerg Wunsch wrote: > As Tomas Vanek wrote: > >> You can try proposed changes >> http://openocd.zylin.com/2778 >> http://openocd.zylin.com/2606 >> >> Check if SRST is connected to RESETN and configure >> reset_config srst_only >> and you should be able regain debug control after >> reset halt > I just gave that a try, too (on a homemade SAMD20 board). > > Alas, I still have two issues: > > * When using the "program" (Tcl?) command, the target does not > automatically run afterwards, but needs a hardware reset. I do have > this on a SAM4, too, so it's perhaps unrelated. The command ends up > in > > program '"$1"' exit > > Do I perhaps need a "reset run" before the exit? program filename reset exit ? Program command issues reset init so MCU is left halted without an extra command to resume/reset run > * When pressing the reset button while debugging, OpenOCD cannot > catch up again. I tried the "[mon] reset halt", but it still > yields: Yes, this is a "feature" of DSU unit. See ref man 12.6.2 CPU Reset extension. With change set #2778 you can release reset by command at91samd dsu_reset_deassert or by any use of reset driven by SWD adapter. I'm aware that OpenOCD should detect this state during poll and release reset automatically but it would need changes in cortex_m code. > Open On-Chip Debugger 0.10.0-dev-00036-g48787e1 (2015-10-03-15:03) > Licensed under GNU GPL v2 > For bug reports, read > http://openocd.org/doc/doxygen/bugs.html > adapter speed: 500 kHz > srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst > Info : only one transport option; autoselect 'swd' > Warn : Interface already configured, ignoring > srst_only separate srst_gates_jtag srst_open_drain connect_deassert_srst > adapter speed: 400 kHz > cortex_m reset_config sysresetreq > Info : CMSIS-DAP: SWD Supported > Info : CMSIS-DAP: JTAG Supported > Info : CMSIS-DAP: Interface Initialised (SWD) > Info : CMSIS-DAP: FW Version = 01.16.0041 > Info : SWCLK/TCK = 1 SWDIO/TMS = 1 TDI = 1 TDO = 1 nTRST = 0 nRESET = 1 > Info : CMSIS-DAP: Interface ready > Info : clock speed 400 kHz > Info : SWD IDCODE 0x0bc11477 > Info : at91samd20j18.cpu: hardware has 4 breakpoints, 2 watchpoints > Info : accepting 'gdb' connection on tcp/3333 > Info : SAMD MCU: SAMD20J18A (256KB Flash, 32KB RAM) > undefined debug reason 7 - target needs reset > Warn : WARNING! The target is already running. All changes GDB did to registers will be discarded! Waiting for target to halt. > Warn : target at91samd20j18.cpu is not halted > Polling target at91samd20j18.cpu failed, trying to reexamine > Examination failed, GDB will be halted. Polling again in 100ms > Polling target at91samd20j18.cpu failed, trying to reexamine > Examination failed, GDB will be halted. Polling again in 300ms > Polling target at91samd20j18.cpu failed, trying to reexamine > Examination failed, GDB will be halted. Polling again in 700ms > Polling target at91samd20j18.cpu failed, trying to reexamine > Examination failed, GDB will be halted. Polling again in 1500ms > Polling target at91samd20j18.cpu failed, trying to reexamine > Examination failed, GDB will be halted. Polling again in 3100ms > Polling target at91samd20j18.cpu failed, trying to reexamine > Examination failed, GDB will be halted. Polling again in 6300ms > Info : AP write error, reset will not halt > Error: DP initialisation failed > in procedure 'reset' > in procedure 'ocd_bouncer' > > > Polling target at91samd20j18.cpu failed, trying to reexamine > Examination failed, GDB will be halted. Polling again in 6300ms > > |
From: Dario A. <Dar...@no...> - 2015-10-23 02:17:42
|
Tomas Vanek writes: Tomas> Check if SRST is connected to RESETN I found the schematic for the D20 Xplained board; it's contained within the following design documents archive, available at: http://www.atmel.com/Images/Atmel-42102-SAMD20-Xplained-Pro_User-Guide.zip The schematic does not use SRST as a label. The SWD interface refers to TARGET_RESET_SENSE, which is connected to RESET_SENSE_INTERNAL via a level shifter. I'm not sure this is the information you requested. Please let me know if there's something else I should look for in the schematic. ---- The information contained in this email message, including any attachments or links to documents, may include privileged, confidential and/or inside information and is intended only for use of the individual or entity named above. If the reader of this message is not the intended recipient, or the employee or agent responsible to deliver it to the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please immediately notify the sender and destroy the original message. Thank you. |
From: Tomas V. <to...@us...> - 2015-10-23 04:50:42
|
SRST is signal name in OpenOCD. Schematics show TARGET_RESET(_INTERNAL) connected ok, you can test it by logic probe on TP301. If SAMD firmware is not doing something insane, SWD should connect without a reset anyway. What ASF example do you use? Modified or not? ASF version? Does the example work? Tomas On 23.10.2015 4:01, Dario Alcocer wrote: > Tomas Vanek writes: > > Tomas> Check if SRST is connected to RESETN > > I found the schematic for the D20 Xplained board; it's contained within the following design documents archive, available at: > > http://www.atmel.com/Images/Atmel-42102-SAMD20-Xplained-Pro_User-Guide.zip > > The schematic does not use SRST as a label. The SWD interface refers to TARGET_RESET_SENSE, which is connected to RESET_SENSE_INTERNAL via a level shifter. > > I'm not sure this is the information you requested. Please let me know if there's something else I should look for in the schematic. > > ---- > > The information contained in this email message, including any attachments or links to documents, may include privileged, confidential and/or inside information and is intended only for use of the individual or entity named above. If the reader of this message is not the intended recipient, or the employee or agent responsible to deliver it to the intended recipient, you are hereby notified that any dissemination, distribution or copying of this communication is strictly prohibited. If you have received this communication in error, please immediately notify the sender and destroy the original message. Thank you. > |