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- Log -----------------------------------------------------------------
commit ec8c3b5a678f3f236c3b574975eff6434e0aab60
Author: Nicolas Pitre <ni...@fl...>
Date: Sat Dec 5 01:01:55 2009 -0500
ARM semihosting: use breakpoint on ARM7
Fall back to software breakpoint when vector catch isn't available.
Possible enhancements:
- add extra optional command parameter to select high vectors
- add extra optional command parameter to select hardware breakpoint
Signed-off-by: Nicolas Pitre <ni...@ma...>
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 25f8cb3..905e108 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2835,7 +2835,6 @@ COMMAND_HANDLER(handle_arm7_9_semihosting_command)
COMMAND_PARSE_ENABLE(CMD_ARGV[0], semihosting);
- /* TODO: support other methods if vector catch is unavailable */
if (arm7_9->has_vector_catch) {
struct reg *vector_catch = &arm7_9->eice_cache
->reg_list[EICE_VEC_CATCH];
@@ -2844,14 +2843,17 @@ COMMAND_HANDLER(handle_arm7_9_semihosting_command)
embeddedice_read_reg(vector_catch);
buf_set_u32(vector_catch->value, 2, 1, semihosting);
embeddedice_store_reg(vector_catch);
+ } else {
+ /* TODO: allow optional high vectors and/or BKPT_HARD */
+ if (semihosting)
+ breakpoint_add(target, 8, 4, BKPT_SOFT);
+ else
+ breakpoint_remove(target, 8);
+ }
- /* FIXME never let that "catch" be dropped! */
-
- arm7_9->armv4_5_common.is_semihosting = semihosting;
+ /* FIXME never let that "catch" be dropped! */
+ arm7_9->armv4_5_common.is_semihosting = semihosting;
- } else if (semihosting) {
- command_print(CMD_CTX, "vector catch unavailable");
- }
}
command_print(CMD_CTX, "semihosting is %s",
commit e8599cc3d81c659c3b8fdf65177006689865d4f4
Author: Nicolas Pitre <ni...@fl...>
Date: Sat Dec 5 01:01:54 2009 -0500
ARM semihosting: work with both low and high vectors
Signed-off-by: Nicolas Pitre <ni...@ma...>
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm_semihosting.c b/src/target/arm_semihosting.c
index 39625f6..d448d54 100644
--- a/src/target/arm_semihosting.c
+++ b/src/target/arm_semihosting.c
@@ -414,18 +414,16 @@ static int do_semihosting(struct target *target)
int arm_semihosting(struct target *target, int *retval)
{
struct arm *arm = target_to_arm(target);
- uint32_t lr, spsr;
+ uint32_t pc, lr, spsr;
struct reg *r;
if (!arm->is_semihosting || arm->core_mode != ARM_MODE_SVC)
return 0;
- /* Check for PC == 8: Supervisor Call vector
- * REVISIT: assumes low exception vectors, not hivecs...
- * safer to test "was this entry from a vector catch".
- */
+ /* Check for PC == 0x00000008 or 0xffff0008: Supervisor Call vector. */
r = arm->core_cache->reg_list + 15;
- if (buf_get_u32(r->value, 0, 32) != 0x08)
+ pc = buf_get_u32(r->value, 0, 32);
+ if (pc != 0x00000008 && pc != 0xffff0008)
return 0;
r = arm_reg_current(arm, 14);
-----------------------------------------------------------------------
Summary of changes:
src/target/arm7_9_common.c | 16 +++++++++-------
src/target/arm_semihosting.c | 10 ++++------
2 files changed, 13 insertions(+), 13 deletions(-)
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