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- Log -----------------------------------------------------------------
commit 4bc3132a1e8229e6475fa64ce095330a71cb10ae
Author: Lennert Buytenhek <bu...@wa...>
Date: Tue Oct 13 22:48:18 2009 +0200
fix detection of PLD instructions
Signed-off-by: Lennert Buytenhek <bu...@ma...>
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 2755cc2..5b0046b 100644
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -110,7 +110,7 @@ static int evaluate_pld(uint32_t opcode,
uint32_t address, arm_instruction_t *instruction)
{
/* PLD */
- if ((opcode & 0x0d70f0000) == 0x0550f000)
+ if ((opcode & 0x0d70f000) == 0x0550f000)
{
instruction->type = ARM_PLD;
commit 0e1d222328e4990d6aea488bbff618622d53b624
Author: Lennert Buytenhek <bu...@wa...>
Date: Tue Oct 13 20:27:03 2009 +0200
fix pass_condition() LE condition code check
The LE check is obviously buggy (as easily triggered during some
testing), but I didn't audit the rest of the cases.
Signed-off-by: Lennert Buytenhek <bu...@ma...>
Signed-off-by: David Brownell <dbr...@us...>
diff --git a/src/target/arm_simulator.c b/src/target/arm_simulator.c
index 7c610a5..93fb3dd 100644
--- a/src/target/arm_simulator.c
+++ b/src/target/arm_simulator.c
@@ -243,9 +243,9 @@ int pass_condition(uint32_t cpsr, uint32_t opcode)
else
return 0;
case 0xd: /* LE */
- if ((cpsr & 0x40000000) &&
- (((cpsr & 0x80000000) && !(cpsr & 0x10000000))
- || (!(cpsr & 0x80000000) && (cpsr & 0x10000000))))
+ if ((cpsr & 0x40000000) ||
+ ((cpsr & 0x80000000) && !(cpsr & 0x10000000))
+ || (!(cpsr & 0x80000000) && (cpsr & 0x10000000)))
return 1;
else
return 0;
-----------------------------------------------------------------------
Summary of changes:
src/target/arm_disassembler.c | 2 +-
src/target/arm_simulator.c | 6 +++---
2 files changed, 4 insertions(+), 4 deletions(-)
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