Author: mlu
Date: 2009-10-02 18:39:50 +0200 (Fri, 02 Oct 2009)
New Revision: 2793
Modified:
trunk/src/target/cortex_a8.c
Log:
More error reporting in Cortex_a8 execute_opcode
Modified: trunk/src/target/cortex_a8.c
===================================================================
--- trunk/src/target/cortex_a8.c 2009-10-02 16:37:22 UTC (rev 2792)
+++ trunk/src/target/cortex_a8.c 2009-10-02 16:39:50 UTC (rev 2793)
@@ -165,8 +165,11 @@
retval = mem_ap_read_atomic_u32(swjdp,
armv7a->debug_base + CPUDBG_DSCR, &dscr);
if (retval != ERROR_OK)
+ {
+ LOG_ERROR("Could not read DSCR register, opcode = 0x%08" PRIx32, opcode);
return retval;
}
+ }
while ((dscr & (1 << DSCR_INSTR_COMP)) == 0); /* Wait for InstrCompl bit to be set */
mem_ap_write_u32(swjdp, armv7a->debug_base + CPUDBG_ITR, opcode);
@@ -176,8 +179,11 @@
retval = mem_ap_read_atomic_u32(swjdp,
armv7a->debug_base + CPUDBG_DSCR, &dscr);
if (retval != ERROR_OK)
+ {
+ LOG_ERROR("Could not read DSCR register");
return retval;
}
+ }
while ((dscr & (1 << DSCR_INSTR_COMP)) == 0); /* Wait for InstrCompl bit to be set */
return retval;
|
