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|
From: <du...@ma...> - 2009-06-21 05:20:21
|
Author: duane
Date: 2009-06-21 05:20:17 +0200 (Sun, 21 Jun 2009)
New Revision: 2334
Modified:
trunk/src/flash/lpc2000.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/flash/lpc2000.c
===================================================================
--- trunk/src/flash/lpc2000.c 2009-06-21 03:20:12 UTC (rev 2333)
+++ trunk/src/flash/lpc2000.c 2009-06-21 03:20:17 UTC (rev 2334)
@@ -497,7 +497,7 @@
if (offset % dst_min_alignment)
{
- LOG_WARNING("offset 0x%x breaks required alignment 0x%x", offset, dst_min_alignment);
+ LOG_WARNING("offset 0x%" PRIx32 " breaks required alignment 0x%" PRIx32, offset, dst_min_alignment);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@@ -518,17 +518,17 @@
int i = 0;
for (i = 0; i < 8; i++)
{
- LOG_DEBUG("0x%2.2x: 0x%8.8x", i * 4, buf_get_u32(buffer + (i * 4), 0, 32));
+ LOG_DEBUG("0x%2.2x: 0x%8.8" PRIx32, i * 4, buf_get_u32(buffer + (i * 4), 0, 32));
if (i != 5)
checksum += buf_get_u32(buffer + (i * 4), 0, 32);
}
checksum = 0 - checksum;
- LOG_DEBUG("checksum: 0x%8.8x", checksum);
+ LOG_DEBUG("checksum: 0x%8.8" PRIx32, checksum);
uint32_t original_value=buf_get_u32(buffer + (5 * 4), 0, 32);
if (original_value!=checksum)
{
- LOG_WARNING("Verification will fail since checksum in image(0x%8.8x) written to flash was different from calculated vector checksum(0x%8.8x).",
+ LOG_WARNING("Verification will fail since checksum in image(0x%8.8" PRIx32 ") written to flash was different from calculated vector checksum(0x%8.8" PRIx32 ").",
original_value, checksum);
LOG_WARNING("To remove this warning modify build tools on developer PC to inject correct LPC vector checksum.");
}
@@ -598,7 +598,7 @@
free(last_buffer);
}
- LOG_DEBUG("writing 0x%x bytes to address 0x%x", thisrun_bytes, bank->base + offset + bytes_written);
+ LOG_DEBUG("writing 0x%" PRIx32 " bytes to address 0x%" PRIx32 , thisrun_bytes, bank->base + offset + bytes_written);
/* Write data */
param_table[0] = bank->base + offset + bytes_written;
@@ -667,7 +667,7 @@
{
lpc2000_flash_bank_t *lpc2000_info = bank->driver_priv;
- snprintf(buf, buf_size, "lpc2000 flash driver variant: %i, clk: %i", lpc2000_info->variant, lpc2000_info->cclk);
+ snprintf(buf, buf_size, "lpc2000 flash driver variant: %i, clk: %" PRIi32 , lpc2000_info->variant, lpc2000_info->cclk);
return ERROR_OK;
}
@@ -708,7 +708,7 @@
}
else
{
- command_print(cmd_ctx, "lpc2000 part id: 0x%8.8x", result_table[0]);
+ command_print(cmd_ctx, "lpc2000 part id: 0x%8.8" PRIx32 , result_table[0]);
}
return ERROR_OK;
|
|
From: <du...@ma...> - 2009-06-21 05:20:15
|
Author: duane
Date: 2009-06-21 05:20:12 +0200 (Sun, 21 Jun 2009)
New Revision: 2333
Modified:
trunk/src/flash/davinci_nand.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/flash/davinci_nand.c
===================================================================
--- trunk/src/flash/davinci_nand.c 2009-06-21 03:20:06 UTC (rev 2332)
+++ trunk/src/flash/davinci_nand.c 2009-06-21 03:20:12 UTC (rev 2333)
@@ -94,7 +94,7 @@
*/
target_read_u32(target, info->aemif + NANDFCR, &nandfcr);
if (!(nandfcr & (1 << info->chipsel))) {
- LOG_ERROR("chip address %08x not NAND-enabled?", info->data);
+ LOG_ERROR("chip address %08" PRIx32 " not NAND-enabled?", info->data);
return ERROR_NAND_OPERATION_FAILED;
}
|
|
From: <du...@ma...> - 2009-06-21 05:20:09
|
Author: duane
Date: 2009-06-21 05:20:06 +0200 (Sun, 21 Jun 2009)
New Revision: 2332
Modified:
trunk/src/flash/mflash.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/flash/mflash.c
===================================================================
--- trunk/src/flash/mflash.c 2009-06-21 03:20:00 UTC (rev 2331)
+++ trunk/src/flash/mflash.c 2009-06-21 03:20:06 UTC (rev 2332)
@@ -414,7 +414,7 @@
ret = mg_mflash_probe();
if (ret == ERROR_OK) {
- command_print(cmd_ctx, "mflash (total %u sectors) found at 0x%8.8x",
+ command_print(cmd_ctx, "mflash (total %" PRIu32 " sectors) found at 0x%8.8" PRIx32 "",
mflash_bank->drv_info->tot_sects, mflash_bank->base );
}
@@ -451,12 +451,12 @@
if (ret != ERROR_OK)
return ret;
- LOG_DEBUG("mflash: %u (0x%8.8x) sector read", sect_num + i, (sect_num + i) * MG_MFLASH_SECTOR_SIZE);
+ LOG_DEBUG("mflash: %" PRIu32 " (0x%8.8" PRIx32 ") sector read", sect_num + i, (sect_num + i) * MG_MFLASH_SECTOR_SIZE);
duration_stop_measure(&duration, NULL);
if ((duration.duration.tv_sec * 1000 + duration.duration.tv_usec / 1000) > 3000) {
- LOG_INFO("mflash: read %u'th sectors", sect_num + i);
+ LOG_INFO("mflash: read %" PRIu32 "'th sectors", sect_num + i);
duration_start_measure(&duration);
}
}
@@ -474,7 +474,7 @@
residue = sect_cnt % 256;
for (i = 0; i < quotient; i++) {
- LOG_DEBUG("mflash: sect num : %u buff : 0x%0lx", sect_num,
+ LOG_DEBUG("mflash: sect num : %" PRIu32 " buff : 0x%0lx", sect_num,
(unsigned long)buff_ptr);
ret = mg_mflash_do_read_sects(buff_ptr, sect_num, 256);
if (ret != ERROR_OK)
@@ -485,7 +485,7 @@
}
if (residue) {
- LOG_DEBUG("mflash: sect num : %u buff : %0lx", sect_num,
+ LOG_DEBUG("mflash: sect num : %" PRIx32 " buff : %0lx", sect_num,
(unsigned long)buff_ptr);
return mg_mflash_do_read_sects(buff_ptr, sect_num, residue);
}
@@ -524,12 +524,12 @@
if (ret != ERROR_OK)
return ret;
- LOG_DEBUG("mflash: %u (0x%8.8x) sector write", sect_num + i, (sect_num + i) * MG_MFLASH_SECTOR_SIZE);
+ LOG_DEBUG("mflash: %" PRIu32 " (0x%8.8" PRIx32 ") sector write", sect_num + i, (sect_num + i) * MG_MFLASH_SECTOR_SIZE);
duration_stop_measure(&duration, NULL);
if ((duration.duration.tv_sec * 1000 + duration.duration.tv_usec / 1000) > 3000) {
- LOG_INFO("mflash: wrote %u'th sectors", sect_num + i);
+ LOG_INFO("mflash: wrote %" PRIu32 "'th sectors", sect_num + i);
duration_start_measure(&duration);
}
}
@@ -552,8 +552,8 @@
residue = sect_cnt % 256;
for (i = 0; i < quotient; i++) {
- LOG_DEBUG("mflash: sect num : %u buff : %0lx", sect_num,
- (unsigned long)buff_ptr);
+ LOG_DEBUG("mflash: sect num : %" PRIu32 "buff : %p", sect_num,
+ buff_ptr);
ret = mg_mflash_do_write_sects(buff_ptr, sect_num, 256, mg_io_cmd_write);
if (ret != ERROR_OK)
return ret;
@@ -563,8 +563,8 @@
}
if (residue) {
- LOG_DEBUG("mflash: sect num : %u buff : %0lx", sect_num,
- (unsigned long)buff_ptr);
+ LOG_DEBUG("mflash: sect num : %" PRIu32 " buff : %p", sect_num,
+ buff_ptr);
return mg_mflash_do_write_sects(buff_ptr, sect_num, residue, mg_io_cmd_write);
}
@@ -592,11 +592,11 @@
if (end_addr < next_sec_addr) {
memcpy(buff_ptr, sect_buff + (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK), end_addr - cur_addr);
- LOG_DEBUG("mflash: copies %u byte from sector offset 0x%8.8x", end_addr - cur_addr, cur_addr);
+ LOG_DEBUG("mflash: copies %" PRIu32 " byte from sector offset 0x%8.8" PRIx32 "", end_addr - cur_addr, cur_addr);
cur_addr = end_addr;
} else {
memcpy(buff_ptr, sect_buff + (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK), next_sec_addr - cur_addr);
- LOG_DEBUG("mflash: copies %u byte from sector offset 0x%8.8x", next_sec_addr - cur_addr, cur_addr);
+ LOG_DEBUG("mflash: copies %" PRIu32 " byte from sector offset 0x%8.8" PRIx32 "", next_sec_addr - cur_addr, cur_addr);
buff_ptr += (next_sec_addr - cur_addr);
cur_addr = next_sec_addr;
}
@@ -627,7 +627,7 @@
return ret;
memcpy(buff_ptr, sect_buff, end_addr - cur_addr);
- LOG_DEBUG("mflash: copies %u byte", end_addr - cur_addr);
+ LOG_DEBUG("mflash: copies %u byte", (unsigned)(end_addr - cur_addr));
}
}
@@ -656,11 +656,11 @@
if (end_addr < next_sec_addr) {
memcpy(sect_buff + (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK), buff_ptr, end_addr - cur_addr);
- LOG_DEBUG("mflash: copies %u byte to sector offset 0x%8.8x", end_addr - cur_addr, cur_addr);
+ LOG_DEBUG("mflash: copies %" PRIu32 " byte to sector offset 0x%8.8" PRIx32 "", end_addr - cur_addr, cur_addr);
cur_addr = end_addr;
} else {
memcpy(sect_buff + (cur_addr & MG_MFLASH_SECTOR_SIZE_MASK), buff_ptr, next_sec_addr - cur_addr);
- LOG_DEBUG("mflash: copies %u byte to sector offset 0x%8.8x", next_sec_addr - cur_addr, cur_addr);
+ LOG_DEBUG("mflash: copies %" PRIu32 " byte to sector offset 0x%8.8" PRIx32 "", next_sec_addr - cur_addr, cur_addr);
buff_ptr += (next_sec_addr - cur_addr);
cur_addr = next_sec_addr;
}
@@ -695,7 +695,7 @@
return ret;
memcpy(sect_buff, buff_ptr, end_addr - cur_addr);
- LOG_DEBUG("mflash: copies %u byte", end_addr - cur_addr);
+ LOG_DEBUG("mflash: copies %" PRIu32 " byte", end_addr - cur_addr);
ret = mg_mflash_write_sects(sect_buff, sect_num, 1);
}
}
@@ -819,7 +819,7 @@
duration_stop_measure(&duration, &duration_text);
- command_print(cmd_ctx, "dump image (address 0x%8.8x size %u) to file %s in %s (%f kB/s)",
+ command_print(cmd_ctx, "dump image (address 0x%8.8" PRIx32 " size %" PRIu32 ") to file %s in %s (%f kB/s)",
address, size, args[1], duration_text,
(float)size / 1024.0 / ((float)duration.duration.tv_sec + ((float)duration.duration.tv_usec / 1000000.0)));
@@ -1252,7 +1252,7 @@
return ERROR_MG_INVALID_PLL;
}
- LOG_INFO("mflash: Fout=%u Hz, feedback=%u,"
+ LOG_INFO("mflash: Fout=%" PRIu32 " Hz, feedback=%u,"
"indiv=%u, outdiv=%u, lock=%u",
(uint32_t)fout, pll.feedback_div,
pll.input_div, pll.output_div,
|
|
From: <du...@ma...> - 2009-06-21 05:20:04
|
Author: duane
Date: 2009-06-21 05:20:00 +0200 (Sun, 21 Jun 2009)
New Revision: 2331
Modified:
trunk/src/flash/cfi.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/flash/cfi.c
===================================================================
--- trunk/src/flash/cfi.c 2009-06-21 03:19:55 UTC (rev 2330)
+++ trunk/src/flash/cfi.c 2009-06-21 03:20:00 UTC (rev 2331)
@@ -378,7 +378,10 @@
pri_ext->suspend_cmd_support = cfi_query_u8(bank, 0, cfi_info->pri_addr + 9);
pri_ext->blk_status_reg_mask = cfi_query_u16(bank, 0, cfi_info->pri_addr + 0xa);
- LOG_DEBUG("feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask);
+ LOG_DEBUG("feature_support: 0x%" PRIx32 ", suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x",
+ pri_ext->feature_support,
+ pri_ext->suspend_cmd_support,
+ pri_ext->blk_status_reg_mask);
pri_ext->vcc_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xc);
pri_ext->vpp_optimal = cfi_query_u8(bank, 0, cfi_info->pri_addr + 0xd);
@@ -597,7 +600,7 @@
buf += printed;
buf_size -= printed;
- printed = snprintf(buf, buf_size, "feature_support: 0x%x, suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x\n", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask);
+ printed = snprintf(buf, buf_size, "feature_support: 0x%" PRIx32 ", suspend_cmd_support: 0x%x, blk_status_reg_mask: 0x%x\n", pri_ext->feature_support, pri_ext->suspend_cmd_support, pri_ext->blk_status_reg_mask);
buf += printed;
buf_size -= printed;
@@ -709,7 +712,7 @@
return retval;
}
- LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base);
+ LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" PRIx32 , i, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
}
@@ -776,7 +779,7 @@
return retval;
}
- LOG_ERROR("couldn't erase block %i of flash bank at base 0x%x", i, bank->base);
+ LOG_ERROR("couldn't erase block %i of flash bank at base 0x%" PRIx32, i, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
}
@@ -841,7 +844,7 @@
for (i = first; i <= last; i++)
{
cfi_command(bank, 0x60, command);
- LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
+ LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
@@ -849,7 +852,7 @@
if (set)
{
cfi_command(bank, 0x01, command);
- LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
+ LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32 , flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
@@ -859,7 +862,7 @@
else
{
cfi_command(bank, 0xd0, command);
- LOG_DEBUG("address: 0x%4.4x, command: 0x%4.4x", flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
+ LOG_DEBUG("address: 0x%4.4" PRIx32 ", command: 0x%4.4" PRIx32, flash_address(bank, i, 0x0), target_buffer_get_u32(target, command));
if((retval = target_write_memory(target, flash_address(bank, i, 0x0), bank->bus_width, 1, command)) != ERROR_OK)
{
return retval;
@@ -1203,7 +1206,7 @@
busy_pattern_val = cfi_command_val(bank, 0x80);
error_pattern_val = cfi_command_val(bank, 0x7e);
- LOG_INFO("Using target buffer at 0x%08x and of size 0x%04x", source->address, buffer_size );
+ LOG_INFO("Using target buffer at 0x%08" PRIx32 " and of size 0x%04" PRIx32, source->address, buffer_size );
/* Programming main loop */
while (count > 0)
@@ -1224,7 +1227,7 @@
buf_set_u32(reg_params[5].value, 0, 32, busy_pattern_val);
buf_set_u32(reg_params[6].value, 0, 32, error_pattern_val);
- LOG_INFO("Write 0x%04x bytes to flash at 0x%08x", thisrun_count, address );
+ LOG_INFO("Write 0x%04" PRIx32 " bytes to flash at 0x%08" PRIx32 , thisrun_count, address );
/* Execute algorithm, assume breakpoint for last instruction */
retval = target_run_algorithm(target, 0, NULL, 7, reg_params,
@@ -1519,7 +1522,7 @@
if ((retval != ERROR_OK) || (retvaltemp != ERROR_OK) || status != 0x80)
{
- LOG_DEBUG("status: 0x%x", status);
+ LOG_DEBUG("status: 0x%" PRIx32 , status);
exit_code = ERROR_FLASH_OPERATION_FAILED;
break;
}
@@ -1572,7 +1575,7 @@
return retval;
}
- LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address);
+ LOG_ERROR("couldn't write word at base 0x%" PRIx32 ", address %" PRIx32 , bank->base, address);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -1594,7 +1597,8 @@
/* Check for valid range */
if (address & buffermask)
{
- LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size);
+ LOG_ERROR("Write address at base 0x%" PRIx32 ", address %" PRIx32 " not aligned to 2^%d boundary",
+ bank->base, address, cfi_info->max_buf_write_size);
return ERROR_FLASH_OPERATION_FAILED;
}
switch(bank->chip_width)
@@ -1613,7 +1617,7 @@
/* Check for valid size */
if (wordcount > bufferwsize)
{
- LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize);
+ LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" PRId32 , wordcount, buffersize);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -1634,7 +1638,7 @@
return retval;
}
- LOG_ERROR("couldn't start buffer write operation at base 0x%x, address %x", bank->base, address);
+ LOG_ERROR("couldn't start buffer write operation at base 0x%" PRIx32 ", address %" PRIx32 , bank->base, address);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -1664,7 +1668,7 @@
return retval;
}
- LOG_ERROR("Buffer write at base 0x%x, address %x failed.", bank->base, address);
+ LOG_ERROR("Buffer write at base 0x%" PRIx32 ", address %" PRIx32 " failed.", bank->base, address);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -1710,7 +1714,7 @@
return retval;
}
- LOG_ERROR("couldn't write word at base 0x%x, address %x", bank->base, address);
+ LOG_ERROR("couldn't write word at base 0x%" PRIx32 ", address %" PRIx32 , bank->base, address);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -1733,7 +1737,7 @@
/* Check for valid range */
if (address & buffermask)
{
- LOG_ERROR("Write address at base 0x%x, address %x not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size);
+ LOG_ERROR("Write address at base 0x%" PRIx32 ", address %" PRIx32 " not aligned to 2^%d boundary", bank->base, address, cfi_info->max_buf_write_size);
return ERROR_FLASH_OPERATION_FAILED;
}
switch(bank->chip_width)
@@ -1751,7 +1755,7 @@
/* Check for valid size */
if (wordcount > bufferwsize)
{
- LOG_ERROR("Number of data words %d exceeds available buffersize %d", wordcount, buffersize);
+ LOG_ERROR("Number of data words %" PRId32 " exceeds available buffersize %" PRId32, wordcount, buffersize);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -1802,7 +1806,7 @@
return retval;
}
- LOG_ERROR("couldn't write block at base 0x%x, address %x, size %x", bank->base, address, bufferwsize);
+ LOG_ERROR("couldn't write block at base 0x%" PRIx32 ", address %" PRIx32 ", size %" PRIx32 , bank->base, address, bufferwsize);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -1972,7 +1976,7 @@
int fallback;
if ((write_p & 0xff) == 0)
{
- LOG_INFO("Programming at %08x, count %08x bytes remaining", write_p, count);
+ LOG_INFO("Programming at %08" PRIx32 ", count %08" PRIx32 " bytes remaining", write_p, count);
}
fallback = 1;
if ((bufferwsize > 0) && (count >= buffersize) && !(write_p & buffermask))
@@ -2025,7 +2029,7 @@
/* handle unaligned tail bytes */
if (count > 0)
{
- LOG_INFO("Fixup %d unaligned tail bytes", count );
+ LOG_INFO("Fixup %" PRId32 " unaligned tail bytes", count );
copy_p = write_p;
for (i = 0; i < bank->bus_width; i++)
@@ -2267,7 +2271,7 @@
cfi_info->max_buf_write_size = cfi_query_u16(bank, 0, 0x2a);
cfi_info->num_erase_regions = cfi_query_u8(bank, 0, 0x2c);
- LOG_DEBUG("size: 0x%x, interface desc: %i, max buffer write size: %x", cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size));
+ LOG_DEBUG("size: 0x%" PRIx32 ", interface desc: %i, max buffer write size: %x", cfi_info->dev_size, cfi_info->interface_desc, (1 << cfi_info->max_buf_write_size));
if (cfi_info->num_erase_regions)
{
@@ -2275,7 +2279,10 @@
for (i = 0; i < cfi_info->num_erase_regions; i++)
{
cfi_info->erase_region_info[i] = cfi_query_u32(bank, 0, 0x2d + (4 * i));
- LOG_DEBUG("erase region[%i]: %i blocks of size 0x%x", i, (cfi_info->erase_region_info[i] & 0xffff) + 1, (cfi_info->erase_region_info[i] >> 16) * 256);
+ LOG_DEBUG("erase region[%i]: %" PRIu32 " blocks of size 0x%" PRIx32 "",
+ i,
+ (cfi_info->erase_region_info[i] & 0xffff) + 1,
+ (cfi_info->erase_region_info[i] >> 16) * 256);
}
}
else
@@ -2337,7 +2344,7 @@
if ((cfi_info->dev_size * bank->bus_width / bank->chip_width) != bank->size)
{
- LOG_WARNING("configuration specifies 0x%x size, but a 0x%x size flash was found", bank->size, cfi_info->dev_size);
+ LOG_WARNING("configuration specifies 0x%" PRIx32 " size, but a 0x%" PRIx32 " size flash was found", bank->size, cfi_info->dev_size);
}
if (cfi_info->num_erase_regions == 0)
@@ -2378,7 +2385,7 @@
}
if (offset != cfi_info->dev_size)
{
- LOG_WARNING("CFI size is 0x%x, but total sector size is 0x%x", cfi_info->dev_size, offset);
+ LOG_WARNING("CFI size is 0x%" PRIx32 ", but total sector size is 0x%" PRIx32 "", cfi_info->dev_size, offset);
}
}
@@ -2553,7 +2560,7 @@
buf += printed;
buf_size -= printed;
- printed = snprintf(buf, buf_size, "size: 0x%x, interface desc: %i, max buffer write size: %x\n",
+ printed = snprintf(buf, buf_size, "size: 0x%" PRIx32 ", interface desc: %i, max buffer write size: %x\n",
cfi_info->dev_size,
cfi_info->interface_desc,
1 << cfi_info->max_buf_write_size);
|
|
From: <du...@ma...> - 2009-06-21 05:19:58
|
Author: duane
Date: 2009-06-21 05:19:55 +0200 (Sun, 21 Jun 2009)
New Revision: 2330
Modified:
trunk/src/flash/stm32x.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/flash/stm32x.c
===================================================================
--- trunk/src/flash/stm32x.c 2009-06-21 03:19:51 UTC (rev 2329)
+++ trunk/src/flash/stm32x.c 2009-06-21 03:19:55 UTC (rev 2330)
@@ -118,7 +118,7 @@
/* wait for busy to clear */
while (((status = stm32x_get_flash_status(bank)) & FLASH_BSY) && (timeout-- > 0))
{
- LOG_DEBUG("status: 0x%x", status);
+ LOG_DEBUG("status: 0x%" PRIx32 "", status);
alive_sleep(1);
}
/* Clear but report errors */
@@ -614,7 +614,7 @@
if (offset & 0x1)
{
- LOG_WARNING("offset 0x%x breaks required 2-byte alignment", offset);
+ LOG_WARNING("offset 0x%" PRIx32 " breaks required 2-byte alignment", offset);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
@@ -720,7 +720,7 @@
/* read stm32 device id register */
target_read_u32(target, 0xE0042000, &device_id);
- LOG_INFO( "device id = 0x%08x", device_id );
+ LOG_INFO( "device id = 0x%08" PRIx32 "", device_id );
/* get flash size from target */
if (target_read_u16(target, 0x1FFFF7E0, &num_pages) != ERROR_OK)
@@ -1061,7 +1061,7 @@
}
target_read_u32(target, STM32_FLASH_OBR, &optionbyte);
- command_print(cmd_ctx, "Option Byte: 0x%x", optionbyte);
+ command_print(cmd_ctx, "Option Byte: 0x%" PRIx32 "", optionbyte);
if (buf_get_u32((uint8_t*)&optionbyte, OPT_ERROR, 1))
command_print(cmd_ctx, "Option Byte Complement Error");
|
|
From: <du...@ma...> - 2009-06-21 05:19:53
|
Author: duane
Date: 2009-06-21 05:19:51 +0200 (Sun, 21 Jun 2009)
New Revision: 2329
Modified:
trunk/src/flash/tms470.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/flash/tms470.c
===================================================================
--- trunk/src/flash/tms470.c 2009-06-21 03:17:52 UTC (rev 2328)
+++ trunk/src/flash/tms470.c 2009-06-21 03:19:51 UTC (rev 2329)
@@ -150,7 +150,7 @@
/* read and parse the device identification register */
target_read_u32(target, 0xFFFFFFF0, &device_ident_reg);
- LOG_INFO("device_ident_reg=0x%08x", device_ident_reg);
+ LOG_INFO("device_ident_reg=0x%08" PRIx32 "", device_ident_reg);
if ((device_ident_reg & 7) == 0)
{
@@ -176,7 +176,7 @@
if (bank->base >= 0x00040000)
{
- LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base);
+ LOG_ERROR("No %s flash bank contains base address 0x%08" PRIx32 ".", part_name, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
tms470_info->ordinal = 0;
@@ -222,7 +222,7 @@
}
else
{
- LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base);
+ LOG_ERROR("No %s flash bank contains base address 0x%08" PRIx32 ".", part_name, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
break;
@@ -271,13 +271,13 @@
}
else
{
- LOG_ERROR("No %s flash bank contains base address 0x%08x.", part_name, bank->base);
+ LOG_ERROR("No %s flash bank contains base address 0x%08" PRIx32 ".", part_name, bank->base);
return ERROR_FLASH_OPERATION_FAILED;
}
break;
default:
- LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", part_number);
+ LOG_WARNING("Could not identify part 0x%02x as a member of the TMS470 family.", (unsigned)part_number);
return ERROR_FLASH_OPERATION_FAILED;
}
@@ -288,7 +288,11 @@
bank->chip_width = 32;
bank->bus_width = 32;
- LOG_INFO("Identified %s, ver=%d, core=%s, nvmem=%s.", part_name, silicon_version, (technology_family ? "1.8v" : "3.3v"), (rom_flash ? "rom" : "flash"));
+ LOG_INFO("Identified %s, ver=%d, core=%s, nvmem=%s.",
+ part_name,
+ (int)(silicon_version),
+ (technology_family ? "1.8v" : "3.3v"),
+ (rom_flash ? "rom" : "flash"));
tms470_info->device_ident_reg = device_ident_reg;
tms470_info->silicon_version = silicon_version;
@@ -325,7 +329,7 @@
{
int start = (0 == strncmp(args[i], "0x", 2)) ? 2 : 0;
- if (1 != sscanf(&args[i][start], "%x", &flashKeys[i]))
+ if (1 != sscanf(&args[i][start], "%" SCNx32 "", &flashKeys[i]))
{
command_print(cmd_ctx, "could not process flash key %s", args[i]);
LOG_ERROR("could not process flash key %s", args[i]);
@@ -343,7 +347,8 @@
if (keysSet)
{
- command_print(cmd_ctx, "using flash keys 0x%08x, 0x%08x, 0x%08x, 0x%08x", flashKeys[0], flashKeys[1], flashKeys[2], flashKeys[3]);
+ command_print(cmd_ctx, "using flash keys 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 ", 0x%08" PRIx32 "",
+ flashKeys[0], flashKeys[1], flashKeys[2], flashKeys[3]);
}
else
{
@@ -427,7 +432,7 @@
uint32_t fmbbusy;
target_read_u32(target, 0xFFE89C08, &fmbbusy);
- LOG_INFO("tms470 fmbbusy=0x%08x -> %s", fmbbusy, fmbbusy & 0x8000 ? "unlocked" : "LOCKED");
+ LOG_INFO("tms470 fmbbusy=0x%08" PRIx32 " -> %s", fmbbusy, fmbbusy & 0x8000 ? "unlocked" : "LOCKED");
return fmbbusy & 0x8000 ? ERROR_OK : ERROR_FLASH_OPERATION_FAILED;
}
@@ -477,7 +482,7 @@
*/
target_read_u32(target, 0x00001FF0 + 4 * i, &tmp);
- LOG_INFO("tms470 writing fmpkey=0x%08x", key_set[i]);
+ LOG_INFO("tms470 writing fmpkey=0x%08" PRIx32 "", key_set[i]);
target_write_u32(target, 0xFFE89C0C, key_set[i]);
}
@@ -565,7 +570,7 @@
fmmac2 &= ~0x0007;
fmmac2 |= (tms470_info->ordinal & 7);
target_write_u32(target, 0xFFE8BC04, fmmac2);
- LOG_DEBUG("set fmmac2=0x%04x", fmmac2);
+ LOG_DEBUG("set fmmac2=0x%04" PRIx32 "", fmmac2);
/*
* Disable level 1 sector protection by setting bit 15 of FMMAC1.
@@ -573,7 +578,7 @@
target_read_u32(target, 0xFFE8BC00, &fmmac1);
fmmac1 |= 0x8000;
target_write_u32(target, 0xFFE8BC00, fmmac1);
- LOG_DEBUG("set fmmac1=0x%04x", fmmac1);
+ LOG_DEBUG("set fmmac1=0x%04" PRIx32 "", fmmac1);
/*
* FMTCREG=0x2fc0;
@@ -610,7 +615,7 @@
LOG_DEBUG("set fmptr3=0x9b64");
}
target_write_u32(target, 0xFFE8A080, fmmaxep);
- LOG_DEBUG("set fmmaxep=0x%04x", fmmaxep);
+ LOG_DEBUG("set fmmaxep=0x%04" PRIx32 "", fmmaxep);
/*
* FMPTR4=0xa000
@@ -630,56 +635,56 @@
sysclk = (plldis ? 1 : (glbctrl & 0x08) ? 4 : 8) * oscMHz / (1 + (glbctrl & 7));
delay = (sysclk > 10) ? (sysclk + 1) / 2 : 5;
target_write_u32(target, 0xFFE8A018, (delay << 4) | (delay << 8));
- LOG_DEBUG("set fmpsetup=0x%04x", (delay << 4) | (delay << 8));
+ LOG_DEBUG("set fmpsetup=0x%04" PRIx32 "", (delay << 4) | (delay << 8));
/*
* FMPVEVACCESS, based on delay.
*/
k = delay | (delay << 8);
target_write_u32(target, 0xFFE8A05C, k);
- LOG_DEBUG("set fmpvevaccess=0x%04x", k);
+ LOG_DEBUG("set fmpvevaccess=0x%04" PRIx32 "", k);
/*
* FMPCHOLD, FMPVEVHOLD, FMPVEVSETUP, based on delay.
*/
k <<= 1;
target_write_u32(target, 0xFFE8A034, k);
- LOG_DEBUG("set fmpchold=0x%04x", k);
+ LOG_DEBUG("set fmpchold=0x%04" PRIx32 "", k);
target_write_u32(target, 0xFFE8A040, k);
- LOG_DEBUG("set fmpvevhold=0x%04x", k);
+ LOG_DEBUG("set fmpvevhold=0x%04" PRIx32 "", k);
target_write_u32(target, 0xFFE8A024, k);
- LOG_DEBUG("set fmpvevsetup=0x%04x", k);
+ LOG_DEBUG("set fmpvevsetup=0x%04" PRIx32 "", k);
/*
* FMCVACCESS, based on delay.
*/
k = delay * 16;
target_write_u32(target, 0xFFE8A060, k);
- LOG_DEBUG("set fmcvaccess=0x%04x", k);
+ LOG_DEBUG("set fmcvaccess=0x%04" PRIx32 "", k);
/*
* FMCSETUP, based on delay.
*/
k = 0x3000 | delay * 20;
target_write_u32(target, 0xFFE8A020, k);
- LOG_DEBUG("set fmcsetup=0x%04x", k);
+ LOG_DEBUG("set fmcsetup=0x%04" PRIx32 "", k);
/*
* FMEHOLD, based on delay.
*/
k = (delay * 20) << 2;
target_write_u32(target, 0xFFE8A038, k);
- LOG_DEBUG("set fmehold=0x%04x", k);
+ LOG_DEBUG("set fmehold=0x%04" PRIx32 "", k);
/*
* PWIDTH, CWIDTH, EWIDTH, based on delay.
*/
target_write_u32(target, 0xFFE8A050, delay * 8);
- LOG_DEBUG("set fmpwidth=0x%04x", delay * 8);
+ LOG_DEBUG("set fmpwidth=0x%04" PRIx32 "", delay * 8);
target_write_u32(target, 0xFFE8A058, delay * 1000);
- LOG_DEBUG("set fmcwidth=0x%04x", delay * 1000);
+ LOG_DEBUG("set fmcwidth=0x%04" PRIx32 "", delay * 1000);
target_write_u32(target, 0xFFE8A054, delay * 5400);
- LOG_DEBUG("set fmewidth=0x%04x", delay * 5400);
+ LOG_DEBUG("set fmewidth=0x%04" PRIx32 "", delay * 5400);
return result;
}
@@ -693,7 +698,7 @@
uint32_t fmmstat;
target_read_u32(target, 0xFFE8BC0C, &fmmstat);
- LOG_DEBUG("set fmmstat=0x%04x", fmmstat);
+ LOG_DEBUG("set fmmstat=0x%04" PRIx32 "", fmmstat);
if (fmmstat & 0x0080)
{
@@ -755,7 +760,7 @@
*/
target_read_u32(target, 0xFFFFFFDC, &glbctrl);
target_write_u32(target, 0xFFFFFFDC, glbctrl | 0x10);
- LOG_DEBUG("set glbctrl=0x%08x", glbctrl | 0x10);
+ LOG_DEBUG("set glbctrl=0x%08" PRIx32 "", glbctrl | 0x10);
/* Force normal read mode. */
target_read_u32(target, 0xFFE89C00, &orig_fmregopt);
@@ -772,13 +777,13 @@
{
target_read_u32(target, 0xFFE88008, &fmbsea);
target_write_u32(target, 0xFFE88008, fmbsea | (1 << sector));
- LOG_DEBUG("set fmbsea=0x%04x", fmbsea | (1 << sector));
+ LOG_DEBUG("set fmbsea=0x%04" PRIx32 "", fmbsea | (1 << sector));
}
else
{
target_read_u32(target, 0xFFE8800C, &fmbseb);
target_write_u32(target, 0xFFE8800C, fmbseb | (1 << (sector - 16)));
- LOG_DEBUG("set fmbseb=0x%04x", fmbseb | (1 << (sector - 16)));
+ LOG_DEBUG("set fmbseb=0x%04" PRIx32 "", fmbseb | (1 << (sector - 16)));
}
bank->sectors[sector].is_protected = 0;
@@ -786,11 +791,11 @@
* clear status regiser, sent erase command, kickoff erase
*/
target_write_u16(target, flashAddr, 0x0040);
- LOG_DEBUG("write *(uint16_t *)0x%08x=0x0040", flashAddr);
+ LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0040", flashAddr);
target_write_u16(target, flashAddr, 0x0020);
- LOG_DEBUG("write *(uint16_t *)0x%08x=0x0020", flashAddr);
+ LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0x0020", flashAddr);
target_write_u16(target, flashAddr, 0xffff);
- LOG_DEBUG("write *(uint16_t *)0x%08x=0xffff", flashAddr);
+ LOG_DEBUG("write *(uint16_t *)0x%08" PRIx32 "=0xffff", flashAddr);
/*
* Monitor FMMSTAT, busy until clear, then check and other flags for
@@ -811,19 +816,19 @@
if (sector < 16)
{
target_write_u32(target, 0xFFE88008, fmbsea);
- LOG_DEBUG("set fmbsea=0x%04x", fmbsea);
+ LOG_DEBUG("set fmbsea=0x%04" PRIx32 "", fmbsea);
bank->sectors[sector].is_protected = fmbsea & (1 << sector) ? 0 : 1;
}
else
{
target_write_u32(target, 0xFFE8800C, fmbseb);
- LOG_DEBUG("set fmbseb=0x%04x", fmbseb);
+ LOG_DEBUG("set fmbseb=0x%04" PRIx32 "", fmbseb);
bank->sectors[sector].is_protected = fmbseb & (1 << (sector - 16)) ? 0 : 1;
}
target_write_u32(target, 0xFFE89C00, orig_fmregopt);
- LOG_DEBUG("set fmregopt=0x%08x", orig_fmregopt);
+ LOG_DEBUG("set fmregopt=0x%08" PRIx32 "", orig_fmregopt);
target_write_u32(target, 0xFFFFFFDC, glbctrl);
- LOG_DEBUG("set glbctrl=0x%08x", glbctrl);
+ LOG_DEBUG("set glbctrl=0x%08" PRIx32 "", glbctrl);
if (result == ERROR_OK)
{
@@ -964,7 +969,7 @@
tms470_read_part_info(bank);
- LOG_INFO("Writing %d bytes starting at 0x%08x", count, bank->base + offset);
+ LOG_INFO("Writing %" PRId32 " bytes starting at 0x%08" PRIx32 "", count, bank->base + offset);
/* set GLBCTRL.4 */
target_read_u32(target, 0xFFFFFFDC, &glbctrl);
@@ -998,7 +1003,7 @@
if (word != 0xffff)
{
- LOG_INFO("writing 0x%04x at 0x%08x", word, addr);
+ LOG_INFO("writing 0x%04x at 0x%08" PRIx32 "", word, addr);
/* clear status register */
target_write_u16(target, addr, 0x0040);
@@ -1023,15 +1028,15 @@
if (fmmstat & 0x3ff)
{
- LOG_ERROR("fmstat=0x%04x", fmmstat);
- LOG_ERROR("Could not program word 0x%04x at address 0x%08x.", word, addr);
+ LOG_ERROR("fmstat=0x%04" PRIx32 "", fmmstat);
+ LOG_ERROR("Could not program word 0x%04x at address 0x%08" PRIx32 ".", word, addr);
result = ERROR_FLASH_OPERATION_FAILED;
break;
}
}
else
{
- LOG_INFO("skipping 0xffff at 0x%08x", addr);
+ LOG_INFO("skipping 0xffff at 0x%08" PRIx32 "", addr);
}
}
@@ -1131,7 +1136,7 @@
if (buffer[i] != 0xff)
{
LOG_WARNING("tms470 bank %d, sector %d, not erased.", tms470_info->ordinal, sector);
- LOG_WARNING("at location 0x%08x: flash data is 0x%02x.", addr + i, buffer[i]);
+ LOG_WARNING("at location 0x%08" PRIx32 ": flash data is 0x%02x.", addr + i, buffer[i]);
bank->sectors[sector].is_erased = 0;
break;
|
|
From: <du...@ma...> - 2009-06-21 05:17:55
|
Author: duane
Date: 2009-06-21 05:17:52 +0200 (Sun, 21 Jun 2009)
New Revision: 2328
Modified:
trunk/src/target/xscale.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/xscale.c
===================================================================
--- trunk/src/target/xscale.c 2009-06-21 03:17:46 UTC (rev 2327)
+++ trunk/src/target/xscale.c 2009-06-21 03:17:52 UTC (rev 2328)
@@ -765,7 +765,7 @@
scan_field_t fields[2];
- LOG_DEBUG("loading miniIC at 0x%8.8x", va);
+ LOG_DEBUG("loading miniIC at 0x%8.8" PRIx32 "", va);
jtag_set_end_state(TAP_IDLE);
xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.ldic); /* LDIC */
@@ -955,7 +955,7 @@
}
LOG_USER("target halted in %s state due to %s, current mode: %s\n"
- "cpsr: 0x%8.8x pc: 0x%8.8x\n"
+ "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
"MMU: %s, D-Cache: %s, I-Cache: %s"
"%s",
armv4_5_state_strings[armv4_5->core_state],
@@ -1039,13 +1039,13 @@
buf_set_u32(armv4_5->core_cache->reg_list[0].value, 0, 32, buffer[0]);
armv4_5->core_cache->reg_list[15].dirty = 1;
armv4_5->core_cache->reg_list[15].valid = 1;
- LOG_DEBUG("r0: 0x%8.8x", buffer[0]);
+ LOG_DEBUG("r0: 0x%8.8" PRIx32 "", buffer[0]);
/* move pc from buffer to register cache */
buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, buffer[1]);
armv4_5->core_cache->reg_list[15].dirty = 1;
armv4_5->core_cache->reg_list[15].valid = 1;
- LOG_DEBUG("pc: 0x%8.8x", buffer[1]);
+ LOG_DEBUG("pc: 0x%8.8" PRIx32 "", buffer[1]);
/* move data from buffer to register cache */
for (i = 1; i <= 7; i++)
@@ -1053,13 +1053,13 @@
buf_set_u32(armv4_5->core_cache->reg_list[i].value, 0, 32, buffer[1 + i]);
armv4_5->core_cache->reg_list[i].dirty = 1;
armv4_5->core_cache->reg_list[i].valid = 1;
- LOG_DEBUG("r%i: 0x%8.8x", i, buffer[i + 1]);
+ LOG_DEBUG("r%i: 0x%8.8" PRIx32 "", i, buffer[i + 1]);
}
buf_set_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32, buffer[9]);
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].dirty = 1;
armv4_5->core_cache->reg_list[ARMV4_5_CPSR].valid = 1;
- LOG_DEBUG("cpsr: 0x%8.8x", buffer[9]);
+ LOG_DEBUG("cpsr: 0x%8.8" PRIx32 "", buffer[9]);
armv4_5->core_mode = buffer[9] & 0x1f;
if (armv4_5_mode_to_number(armv4_5->core_mode) == -1)
@@ -1321,7 +1321,7 @@
uint32_t next_pc;
/* there's a breakpoint at the current PC, we have to step over it */
- LOG_DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
+ LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
xscale_unset_breakpoint(target, breakpoint);
/* calculate PC of next instruction */
@@ -1329,7 +1329,7 @@
{
uint32_t current_opcode;
target_read_u32(target, current_pc, ¤t_opcode);
- LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
+ LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
}
LOG_DEBUG("enable single-step");
@@ -1350,18 +1350,18 @@
/* send CPSR */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
- LOG_DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
+ LOG_DEBUG("writing cpsr with value 0x%8.8" PRIx32 "", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
for (i = 7; i >= 0; i--)
{
/* send register */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
- LOG_DEBUG("writing r%i with value 0x%8.8x", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
+ LOG_DEBUG("writing r%i with value 0x%8.8" PRIx32 "", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
}
/* send PC */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
- LOG_DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
+ LOG_DEBUG("writing PC with value 0x%8.8" PRIx32 "", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
/* wait for and process debug entry */
xscale_debug_entry(target);
@@ -1369,7 +1369,7 @@
LOG_DEBUG("disable single-step");
xscale_disable_single_step(target);
- LOG_DEBUG("set breakpoint at 0x%8.8x", breakpoint->address);
+ LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
xscale_set_breakpoint(target, breakpoint);
}
}
@@ -1393,18 +1393,18 @@
/* send CPSR */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
- LOG_DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
+ LOG_DEBUG("writing cpsr with value 0x%8.8" PRIx32 "", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
for (i = 7; i >= 0; i--)
{
/* send register */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
- LOG_DEBUG("writing r%i with value 0x%8.8x", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
+ LOG_DEBUG("writing r%i with value 0x%8.8" PRIx32 "", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
}
/* send PC */
xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
- LOG_DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
+ LOG_DEBUG("writing PC with value 0x%8.8" PRIx32 "", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
target->debug_reason = DBG_REASON_NOTHALTED;
@@ -1446,7 +1446,7 @@
current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
target_read_u32(target, current_pc, ¤t_opcode);
- LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8x", current_opcode);
+ LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
return retval;
}
@@ -1474,20 +1474,20 @@
/* send CPSR */
if ((retval=xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32)))!=ERROR_OK)
return retval;
- LOG_DEBUG("writing cpsr with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
+ LOG_DEBUG("writing cpsr with value 0x%8.8" PRIx32 "", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32));
for (i = 7; i >= 0; i--)
{
/* send register */
if ((retval=xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32)))!=ERROR_OK)
return retval;
- LOG_DEBUG("writing r%i with value 0x%8.8x", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
+ LOG_DEBUG("writing r%i with value 0x%8.8" PRIx32 "", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32));
}
/* send PC */
if ((retval=xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32)))!=ERROR_OK)
return retval;
- LOG_DEBUG("writing PC with value 0x%8.8x", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
+ LOG_DEBUG("writing PC with value 0x%8.8" PRIx32, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
@@ -1914,7 +1914,7 @@
uint32_t i;
int retval;
- LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32, address, size, count);
if (target->state != TARGET_HALTED)
{
@@ -1991,7 +1991,7 @@
xscale_common_t *xscale = armv4_5->arch_info;
int retval;
- LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32, address, size, count);
if (target->state != TARGET_HALTED)
{
@@ -3650,7 +3650,7 @@
/* read cp15 control register */
xscale_get_reg(reg);
value = buf_get_u32(reg->value, 0, 32);
- command_print(cmd_ctx, "%s (/%i): 0x%x", reg->name, reg->size, value);
+ command_print(cmd_ctx, "%s (/%i): 0x%" PRIx32 "", reg->name, (int)(reg->size), value);
}
else if(argc == 2)
{
|
|
From: <du...@ma...> - 2009-06-21 05:17:50
|
Author: duane
Date: 2009-06-21 05:17:46 +0200 (Sun, 21 Jun 2009)
New Revision: 2327
Modified:
trunk/src/target/trace.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/trace.c
===================================================================
--- trunk/src/target/trace.c 2009-06-21 03:17:40 UTC (rev 2326)
+++ trunk/src/target/trace.c 2009-06-21 03:17:46 UTC (rev 2327)
@@ -29,7 +29,7 @@
{
trace_t *trace = target->trace_info;
- LOG_DEBUG("tracepoint: %i", number);
+ LOG_DEBUG("tracepoint: %i", (int)number);
if (number < trace->num_trace_points)
trace->trace_points[number].hit_counter++;
@@ -58,7 +58,7 @@
for (i = 0; i < trace->num_trace_points; i++)
{
- command_print(cmd_ctx, "trace point 0x%8.8x (%lld times hit)",
+ command_print(cmd_ctx, "trace point 0x%8.8" PRIx32 " (%lld times hit)",
trace->trace_points[i].address,
(long long)trace->trace_points[i].hit_counter);
}
@@ -115,7 +115,7 @@
trace->trace_history_size = strtoul(args[0], NULL, 0);
trace->trace_history = malloc(sizeof(uint32_t) * trace->trace_history_size);
- command_print(cmd_ctx, "new trace history size: %i", trace->trace_history_size);
+ command_print(cmd_ctx, "new trace history size: %i", (int)(trace->trace_history_size));
}
else
{
@@ -139,14 +139,14 @@
{
uint32_t address;
address = trace->trace_points[trace->trace_history[i % trace->trace_history_size]].address;
- command_print(cmd_ctx, "trace point %i: 0x%8.8x",
- trace->trace_history[i % trace->trace_history_size],
- address);
+ command_print(cmd_ctx, "trace point %i: 0x%8.8" PRIx32 "",
+ (int)(trace->trace_history[i % trace->trace_history_size]),
+ address);
}
else
{
- command_print(cmd_ctx, "trace point %i: -not defined-", trace->trace_history[i % trace->trace_history_size]);
+ command_print(cmd_ctx, "trace point %i: -not defined-", (int)(trace->trace_history[i % trace->trace_history_size]));
}
}
}
|
|
From: <du...@ma...> - 2009-06-21 05:17:43
|
Author: duane
Date: 2009-06-21 05:17:40 +0200 (Sun, 21 Jun 2009)
New Revision: 2326
Modified:
trunk/src/target/target_request.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/target_request.c
===================================================================
--- trunk/src/target/target_request.c 2009-06-21 03:17:33 UTC (rev 2325)
+++ trunk/src/target/target_request.c 2009-06-21 03:17:40 UTC (rev 2326)
@@ -71,7 +71,7 @@
debug_msg_receiver_t *c = target->dbgmsg;
uint32_t i;
- LOG_DEBUG("size: %i, length: %i", size, length);
+ LOG_DEBUG("size: %i, length: %i", (int)size, (int)length);
target->type->target_request_data(target, CEIL(length * size, 4), (uint8_t*)data);
@@ -81,7 +81,7 @@
switch (size)
{
case 4:
- line_len += snprintf(line + line_len, 128 - line_len, "%8.8x ", le_to_h_u32(data + (4*i)));
+ line_len += snprintf(line + line_len, 128 - line_len, "%8.8" PRIx32 " ", le_to_h_u32(data + (4*i)));
break;
case 2:
line_len += snprintf(line + line_len, 128 - line_len, "%4.4x ", le_to_h_u16(data + (2*i)));
|
|
From: <du...@ma...> - 2009-06-21 05:17:37
|
Author: duane
Date: 2009-06-21 05:17:33 +0200 (Sun, 21 Jun 2009)
New Revision: 2325
Modified:
trunk/src/target/target.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/target.c
===================================================================
--- trunk/src/target/target.c 2009-06-21 03:17:28 UTC (rev 2324)
+++ trunk/src/target/target.c 2009-06-21 03:17:33 UTC (rev 2325)
@@ -934,8 +934,8 @@
/* only allocate multiples of 4 byte */
if (size % 4)
{
- LOG_ERROR("BUG: code tried to allocate unaligned number of bytes, padding");
- size = CEIL(size, 4);
+ LOG_ERROR("BUG: code tried to allocate unaligned number of bytes (0x%08x), padding", ((unsigned)(size)));
+ size = (size + 3) & (~3);
}
/* see if there's already a matching working area */
@@ -969,7 +969,8 @@
if (free_size < size)
{
- LOG_WARNING("not enough working area available(requested %d, free %d)", size, free_size);
+ LOG_WARNING("not enough working area available(requested %u, free %u)",
+ (unsigned)(size), (unsigned)(free_size));
return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
}
@@ -1101,7 +1102,8 @@
int target_write_buffer(struct target_s *target, uint32_t address, uint32_t size, uint8_t *buffer)
{
int retval;
- LOG_DEBUG("writing buffer of %i byte at 0x%8.8x", size, address);
+ LOG_DEBUG("writing buffer of %i byte at 0x%8.8x",
+ (int)size, (unsigned)address);
if (!target_was_examined(target))
{
@@ -1116,7 +1118,9 @@
if ((address + size - 1) < address)
{
/* GDB can request this when e.g. PC is 0xfffffffc*/
- LOG_ERROR("address+size wrapped(0x%08x, 0x%08x)", address, size);
+ LOG_ERROR("address+size wrapped(0x%08x, 0x%08x)",
+ (unsigned)address,
+ (unsigned)size);
return ERROR_FAIL;
}
@@ -1180,7 +1184,8 @@
int target_read_buffer(struct target_s *target, uint32_t address, uint32_t size, uint8_t *buffer)
{
int retval;
- LOG_DEBUG("reading buffer of %i byte at 0x%8.8x", size, address);
+ LOG_DEBUG("reading buffer of %i byte at 0x%8.8x",
+ (int)size, (unsigned)address);
if (!target_was_examined(target))
{
@@ -1195,7 +1200,9 @@
if ((address + size - 1) < address)
{
/* GDB can request this when e.g. PC is 0xfffffffc*/
- LOG_ERROR("address+size wrapped(0x%08x, 0x%08x)", address, size);
+ LOG_ERROR("address+size wrapped(0x%08" PRIx32 ", 0x%08" PRIx32 ")",
+ address,
+ size);
return ERROR_FAIL;
}
@@ -1261,7 +1268,7 @@
buffer = malloc(size);
if (buffer == NULL)
{
- LOG_ERROR("error allocating buffer for section (%d bytes)", size);
+ LOG_ERROR("error allocating buffer for section (%d bytes)", (int)size);
return ERROR_INVALID_ARGUMENTS;
}
retval = target_read_buffer(target, address, size, buffer);
@@ -1319,12 +1326,15 @@
if (retval == ERROR_OK)
{
*value = target_buffer_get_u32(target, value_buf);
- LOG_DEBUG("address: 0x%8.8x, value: 0x%8.8x", address, *value);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%8.8" PRIx32 "",
+ address,
+ *value);
}
else
{
*value = 0x0;
- LOG_DEBUG("address: 0x%8.8x failed", address);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 " failed",
+ address);
}
return retval;
@@ -1344,12 +1354,15 @@
if (retval == ERROR_OK)
{
*value = target_buffer_get_u16(target, value_buf);
- LOG_DEBUG("address: 0x%8.8x, value: 0x%4.4x", address, *value);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%4.4x",
+ address,
+ *value);
}
else
{
*value = 0x0;
- LOG_DEBUG("address: 0x%8.8x failed", address);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 " failed",
+ address);
}
return retval;
@@ -1366,12 +1379,15 @@
if (retval == ERROR_OK)
{
- LOG_DEBUG("address: 0x%8.8x, value: 0x%2.2x", address, *value);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%2.2x",
+ address,
+ *value);
}
else
{
*value = 0x0;
- LOG_DEBUG("address: 0x%8.8x failed", address);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 " failed",
+ address);
}
return retval;
@@ -1387,7 +1403,9 @@
return ERROR_FAIL;
}
- LOG_DEBUG("address: 0x%8.8x, value: 0x%8.8x", address, value);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%8.8" PRIx32 "",
+ address,
+ value);
target_buffer_set_u32(target, value_buf, value);
if ((retval = target_write_memory(target, address, 4, 1, value_buf)) != ERROR_OK)
@@ -1408,7 +1426,9 @@
return ERROR_FAIL;
}
- LOG_DEBUG("address: 0x%8.8x, value: 0x%8.8x", address, value);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%8.8x",
+ address,
+ value);
target_buffer_set_u16(target, value_buf, value);
if ((retval = target_write_memory(target, address, 2, 1, value_buf)) != ERROR_OK)
@@ -1428,7 +1448,8 @@
return ERROR_FAIL;
}
- LOG_DEBUG("address: 0x%8.8x, value: 0x%2.2x", address, value);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", value: 0x%2.2x",
+ address, value);
if ((retval = target_write_memory(target, address, 1, 1, &value)) != ERROR_OK)
{
@@ -1713,7 +1734,13 @@
for (i = 0; i < cache->num_regs; i++)
{
value = buf_to_str(cache->reg_list[i].value, cache->reg_list[i].size, 16);
- command_print(cmd_ctx, "(%i) %s (/%i): 0x%s (dirty: %i, valid: %i)", count++, cache->reg_list[i].name, cache->reg_list[i].size, value, cache->reg_list[i].dirty, cache->reg_list[i].valid);
+ command_print(cmd_ctx, "(%i) %s (/%i): 0x%s (dirty: %i, valid: %i)",
+ count++,
+ cache->reg_list[i].name,
+ (int)(cache->reg_list[i].size),
+ value,
+ cache->reg_list[i].dirty,
+ cache->reg_list[i].valid);
free(value);
}
cache = cache->next;
@@ -1776,7 +1803,7 @@
arch_type->get(reg);
}
value = buf_to_str(reg->value, reg->size, 16);
- command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, reg->size, value);
+ command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
free(value);
return ERROR_OK;
}
@@ -1791,7 +1818,7 @@
arch_type->set(reg, buf);
value = buf_to_str(reg->value, reg->size, 16);
- command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, reg->size, value);
+ command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, (int)(reg->size), value);
free(value);
free(buf);
@@ -2037,7 +2064,8 @@
{
output_len += snprintf(output + output_len,
sizeof(output) - output_len,
- "0x%8.8x: ", address + (i*size));
+ "0x%8.8x: ",
+ (unsigned)(address + (i*size)));
}
uint32_t value=0;
@@ -2232,7 +2260,9 @@
buffer = malloc(image.sections[i].size);
if (buffer == NULL)
{
- command_print(cmd_ctx, "error allocating buffer for section (%d bytes)", image.sections[i].size);
+ command_print(cmd_ctx,
+ "error allocating buffer for section (%d bytes)",
+ (int)(image.sections[i].size));
break;
}
@@ -2268,7 +2298,9 @@
break;
}
image_size += length;
- command_print(cmd_ctx, "%u byte written at address 0x%8.8x", length, image.sections[i].base_address+offset);
+ command_print(cmd_ctx, "%u byte written at address 0x%8.8" PRIx32 "",
+ (unsigned int)length,
+ image.sections[i].base_address+offset);
}
free(buffer);
@@ -2282,7 +2314,9 @@
if (retval==ERROR_OK)
{
- command_print(cmd_ctx, "downloaded %u byte in %s", image_size, duration_text);
+ command_print(cmd_ctx, "downloaded %u byte in %s",
+ (unsigned int)image_size,
+ duration_text);
}
free(duration_text);
@@ -2423,7 +2457,9 @@
buffer = malloc(image.sections[i].size);
if (buffer == NULL)
{
- command_print(cmd_ctx, "error allocating buffer for section (%d bytes)", image.sections[i].size);
+ command_print(cmd_ctx,
+ "error allocating buffer for section (%d bytes)",
+ (int)(image.sections[i].size));
break;
}
if ((retval = image_read_section(&image, i, 0x0, image.sections[i].size, buffer, &buf_cnt)) != ERROR_OK)
@@ -2469,7 +2505,11 @@
{
if (data[t] != buffer[t])
{
- command_print(cmd_ctx, "Verify operation failed address 0x%08x. Was 0x%02x instead of 0x%02x\n", t + image.sections[i].base_address, data[t], buffer[t]);
+ command_print(cmd_ctx,
+ "Verify operation failed address 0x%08x. Was 0x%02x instead of 0x%02x\n",
+ (unsigned)(t + image.sections[i].base_address),
+ data[t],
+ buffer[t]);
free(data);
free(buffer);
retval=ERROR_FAIL;
@@ -2486,7 +2526,9 @@
}
} else
{
- command_print(cmd_ctx, "address 0x%08x length 0x%08x", image.sections[i].base_address, buf_cnt);
+ command_print(cmd_ctx, "address 0x%08" PRIx32 " length 0x%08" PRIx32 "",
+ image.sections[i].base_address,
+ buf_cnt);
}
free(buffer);
@@ -2502,7 +2544,9 @@
if (retval==ERROR_OK)
{
- command_print(cmd_ctx, "verified %u bytes in %s", image_size, duration_text);
+ command_print(cmd_ctx, "verified %u bytes in %s",
+ (unsigned int)image_size,
+ duration_text);
}
free(duration_text);
@@ -2531,15 +2575,17 @@
{
char* buf = buf_to_str(breakpoint->orig_instr,
breakpoint->length, 16);
- command_print(cmd_ctx, "0x%8.8x, 0x%x, %i, 0x%s",
- breakpoint->address, breakpoint->length,
+ command_print(cmd_ctx, "0x%8.8" PRIx32 ", 0x%x, %i, 0x%s",
+ breakpoint->address,
+ breakpoint->length,
breakpoint->set, buf);
free(buf);
}
else
{
- command_print(cmd_ctx, "0x%8.8x, 0x%x, %i",
- breakpoint->address, breakpoint->length, breakpoint->set);
+ command_print(cmd_ctx, "0x%8.8" PRIx32 ", 0x%x, %i",
+ breakpoint->address,
+ breakpoint->length, breakpoint->set);
}
breakpoint = breakpoint->next;
@@ -2553,7 +2599,7 @@
target_t *target = get_current_target(cmd_ctx);
int retval = breakpoint_add(target, addr, length, hw);
if (ERROR_OK == retval)
- command_print(cmd_ctx, "breakpoint set at 0x%8.8x", addr);
+ command_print(cmd_ctx, "breakpoint set at 0x%8.8" PRIx32 "", addr);
else
LOG_ERROR("Failure setting breakpoint");
return retval;
@@ -2619,7 +2665,13 @@
while (watchpoint)
{
- command_print(cmd_ctx, "address: 0x%8.8x, len: 0x%8.8x, r/w/a: %i, value: 0x%8.8x, mask: 0x%8.8x", watchpoint->address, watchpoint->length, watchpoint->rw, watchpoint->value, watchpoint->mask);
+ command_print(cmd_ctx,
+ "address: 0x%8.8" PRIx32 ", len: 0x%8.8x, r/w/a: %i, value: 0x%8.8" PRIx32 ", mask: 0x%8.8" PRIx32 "",
+ watchpoint->address,
+ watchpoint->length,
+ (int)(watchpoint->rw),
+ watchpoint->value,
+ watchpoint->mask);
watchpoint = watchpoint->next;
}
return ERROR_OK;
@@ -2721,7 +2773,7 @@
target_t *target = get_current_target(cmd_ctx);
retval = target->type->virt2phys(target, va, &pa);
if (retval == ERROR_OK)
- command_print(cmd_ctx, "Physical address 0x%08x", pa);
+ command_print(cmd_ctx, "Physical address 0x%08" PRIx32 "", pa);
return retval;
}
@@ -3057,7 +3109,9 @@
} else {
char buf[100];
Jim_SetResult(interp, Jim_NewEmptyStringObj(interp));
- sprintf(buf, "mem2array address: 0x%08x is not aligned for %d byte reads", addr, width);
+ sprintf(buf, "mem2array address: 0x%08" PRIx32 " is not aligned for %" PRId32 " byte reads",
+ addr,
+ width);
Jim_AppendStrings(interp, Jim_GetResult(interp), buf , NULL);
return JIM_ERR;
}
@@ -3079,7 +3133,10 @@
retval = target_read_memory( target, addr, width, count, buffer );
if (retval != ERROR_OK) {
/* BOO !*/
- LOG_ERROR("mem2array: Read @ 0x%08x, w=%d, cnt=%d, failed", addr, width, count);
+ LOG_ERROR("mem2array: Read @ 0x%08x, w=%d, cnt=%d, failed",
+ (unsigned int)addr,
+ (int)width,
+ (int)count);
Jim_SetResult(interp, Jim_NewEmptyStringObj(interp));
Jim_AppendStrings(interp, Jim_GetResult(interp), "mem2array: cannot read memory", NULL);
e = JIM_ERR;
@@ -3239,7 +3296,9 @@
} else {
char buf[100];
Jim_SetResult(interp, Jim_NewEmptyStringObj(interp));
- sprintf(buf, "array2mem address: 0x%08x is not aligned for %d byte reads", addr, width);
+ sprintf(buf, "array2mem address: 0x%08x is not aligned for %d byte reads",
+ (unsigned int)addr,
+ (int)width);
Jim_AppendStrings(interp, Jim_GetResult(interp), buf , NULL);
return JIM_ERR;
}
@@ -3278,7 +3337,10 @@
retval = target_write_memory(target, addr, width, count, buffer);
if (retval != ERROR_OK) {
/* BOO !*/
- LOG_ERROR("array2mem: Write @ 0x%08x, w=%d, cnt=%d, failed", addr, width, count);
+ LOG_ERROR("array2mem: Write @ 0x%08x, w=%d, cnt=%d, failed",
+ (unsigned int)addr,
+ (int)width,
+ (int)count);
Jim_SetResult(interp, Jim_NewEmptyStringObj(interp));
Jim_AppendStrings(interp, Jim_GetResult(interp), "array2mem: cannot read memory", NULL);
e = JIM_ERR;
@@ -3296,8 +3358,8 @@
target_t *target;
LOG_DEBUG( "**all*targets: event: %d, %s",
- e,
- Jim_Nvp_value2name_simple( nvp_target_event, e )->name );
+ (int)e,
+ Jim_Nvp_value2name_simple( nvp_target_event, e )->name );
target = all_targets;
while (target){
@@ -4379,7 +4441,8 @@
buffer = malloc(image.sections[i].size);
if (buffer == NULL)
{
- command_print(cmd_ctx, "error allocating buffer for section (%d bytes)", image.sections[i].size);
+ command_print(cmd_ctx, "error allocating buffer for section (%d bytes)",
+ (int)(image.sections[i].size));
break;
}
@@ -4421,7 +4484,9 @@
fastload[i].length=length;
image_size += length;
- command_print(cmd_ctx, "%u byte written at address 0x%8.8x", length, image.sections[i].base_address+offset);
+ command_print(cmd_ctx, "%u byte written at address 0x%8.8x",
+ (unsigned int)length,
+ ((unsigned int)(image.sections[i].base_address+offset)));
}
free(buffer);
@@ -4430,7 +4495,7 @@
duration_stop_measure(&duration, &duration_text);
if (retval==ERROR_OK)
{
- command_print(cmd_ctx, "Loaded %u bytes in %s", image_size, duration_text);
+ command_print(cmd_ctx, "Loaded %u bytes in %s", (unsigned int)image_size, duration_text);
command_print(cmd_ctx, "NB!!! image has not been loaded to target, issue a subsequent 'fast_load' to do so.");
}
free(duration_text);
@@ -4461,7 +4526,9 @@
for (i=0; i<fastload_num;i++)
{
target_t *target = get_current_target(cmd_ctx);
- command_print(cmd_ctx, "Write to 0x%08x, length 0x%08x", fastload[i].address, fastload[i].length);
+ command_print(cmd_ctx, "Write to 0x%08x, length 0x%08x",
+ (unsigned int)(fastload[i].address),
+ (unsigned int)(fastload[i].length));
if (retval==ERROR_OK)
{
retval = target_write_buffer(target, fastload[i].address, fastload[i].length, fastload[i].data);
@@ -4472,3 +4539,11 @@
command_print(cmd_ctx, "Loaded image %f kBytes/s", (float)(size/1024.0)/((float)(after-ms)/1000.0));
return retval;
}
+
+
+/*
+ * Local Variables:
+ * c-basic-offset: 4
+ * tab-width: 4
+ * End:
+ */
|
|
From: <du...@ma...> - 2009-06-21 05:17:31
|
Author: duane
Date: 2009-06-21 05:17:28 +0200 (Sun, 21 Jun 2009)
New Revision: 2324
Modified:
trunk/src/target/mips_m4k.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/mips_m4k.c
===================================================================
--- trunk/src/target/mips_m4k.c 2009-06-21 03:17:23 UTC (rev 2323)
+++ trunk/src/target/mips_m4k.c 2009-06-21 03:17:28 UTC (rev 2324)
@@ -146,7 +146,7 @@
mips32_save_context(target);
- LOG_DEBUG("entered debug state at PC 0x%x, target->state: %s",
+ LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s",
*(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value),
Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
@@ -395,7 +395,7 @@
/* Single step past breakpoint at current address */
if ((breakpoint = breakpoint_find(target, resume_pc)))
{
- LOG_DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
+ LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
mips_m4k_unset_breakpoint(target, breakpoint);
mips_m4k_single_step_core(target);
mips_m4k_set_breakpoint(target, breakpoint);
@@ -416,13 +416,13 @@
{
target->state = TARGET_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
- LOG_DEBUG("target resumed at 0x%x", resume_pc);
+ LOG_DEBUG("target resumed at 0x%" PRIx32 "", resume_pc);
}
else
{
target->state = TARGET_DEBUG_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
- LOG_DEBUG("target debug resumed at 0x%x", resume_pc);
+ LOG_DEBUG("target debug resumed at 0x%" PRIx32 "", resume_pc);
}
return ERROR_OK;
@@ -523,7 +523,7 @@
target_write_u32(target, comparator_list[bp_num].reg_address, comparator_list[bp_num].bp_value);
target_write_u32(target, comparator_list[bp_num].reg_address + 0x08, 0x00000000);
target_write_u32(target, comparator_list[bp_num].reg_address + 0x18, 1);
- LOG_DEBUG("bp_num %i bp_value 0x%x", bp_num, comparator_list[bp_num].bp_value);
+ LOG_DEBUG("bp_num %i bp_value 0x%" PRIx32 "", bp_num, comparator_list[bp_num].bp_value);
}
else if (breakpoint->type == BKPT_SOFT)
{
@@ -546,7 +546,7 @@
}
if (verify != MIPS32_SDBBP)
{
- LOG_ERROR("Unable to set 32bit breakpoint at address %08x - check that memory is read/writable", breakpoint->address);
+ LOG_ERROR("Unable to set 32bit breakpoint at address %08" PRIx32 " - check that memory is read/writable", breakpoint->address);
return ERROR_OK;
}
}
@@ -569,7 +569,7 @@
}
if (verify != MIPS16_SDBBP)
{
- LOG_ERROR("Unable to set 16bit breakpoint at address %08x - check that memory is read/writable", breakpoint->address);
+ LOG_ERROR("Unable to set 16bit breakpoint at address %08" PRIx32 " - check that memory is read/writable", breakpoint->address);
return ERROR_OK;
}
}
@@ -733,7 +733,7 @@
mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
- LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
if (target->state != TARGET_HALTED)
{
@@ -787,7 +787,7 @@
mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
- LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
+ LOG_DEBUG("address: 0x%8.8" PRIx32 ", size: 0x%8.8" PRIx32 ", count: 0x%8.8" PRIx32 "", address, size, count);
if (target->state != TARGET_HALTED)
{
|
|
From: <du...@ma...> - 2009-06-21 05:17:27
|
Author: duane
Date: 2009-06-21 05:17:23 +0200 (Sun, 21 Jun 2009)
New Revision: 2323
Modified:
trunk/src/target/mips_ejtag.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/mips_ejtag.c
===================================================================
--- trunk/src/target/mips_ejtag.c 2009-06-21 03:17:16 UTC (rev 2322)
+++ trunk/src/target/mips_ejtag.c 2009-06-21 03:17:23 UTC (rev 2323)
@@ -211,7 +211,7 @@
/* break bit will be cleared by hardware */
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
- LOG_DEBUG("ejtag_ctrl: 0x%8.8x", ejtag_ctrl);
+ LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl);
if((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
LOG_DEBUG("Failed to enter Debug Mode!");
@@ -261,7 +261,7 @@
uint32_t ejtag_version;
mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
- LOG_DEBUG("impcode: 0x%8.8x", ejtag_info->impcode);
+ LOG_DEBUG("impcode: 0x%8.8" PRIx32 "", ejtag_info->impcode);
/* get ejtag version */
ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);
|
|
From: <du...@ma...> - 2009-06-21 05:17:21
|
Author: duane
Date: 2009-06-21 05:17:16 +0200 (Sun, 21 Jun 2009)
New Revision: 2322
Modified:
trunk/src/target/mips32_pracc.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/mips32_pracc.c
===================================================================
--- trunk/src/target/mips32_pracc.c 2009-06-21 03:17:10 UTC (rev 2321)
+++ trunk/src/target/mips32_pracc.c 2009-06-21 03:17:16 UTC (rev 2322)
@@ -143,7 +143,7 @@
* to start of debug vector */
data = 0;
- LOG_ERROR("Error reading unexpected address %8.8x", address);
+ LOG_ERROR("Error reading unexpected address %8.8" PRIx32 "", address);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -200,7 +200,7 @@
}
else
{
- LOG_ERROR("Error writing unexpected address %8.8x", address);
+ LOG_ERROR("Error writing unexpected address %8.8" PRIx32 "", address);
return ERROR_JTAG_DEVICE_ERROR;
}
|
|
From: <du...@ma...> - 2009-06-21 05:17:14
|
Author: duane
Date: 2009-06-21 05:17:10 +0200 (Sun, 21 Jun 2009)
New Revision: 2321
Modified:
trunk/src/target/mips32_dmaacc.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/mips32_dmaacc.c
===================================================================
--- trunk/src/target/mips32_dmaacc.c 2009-06-21 03:17:03 UTC (rev 2320)
+++ trunk/src/target/mips32_dmaacc.c 2009-06-21 03:17:10 UTC (rev 2321)
@@ -74,11 +74,11 @@
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ (retrying)\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)\n", addr);
goto begin_ejtag_dma_read;
}
else
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -120,11 +120,11 @@
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ (retrying)\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)\n", addr);
goto begin_ejtag_dma_read_h;
}
else
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -172,11 +172,11 @@
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ (retrying)\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ (retrying)\n", addr);
goto begin_ejtag_dma_read_b;
}
else
- LOG_ERROR("DMA Read Addr = %08x Data = ERROR ON READ\n", addr);
+ LOG_ERROR("DMA Read Addr = %08" PRIx32 " Data = ERROR ON READ\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -235,11 +235,11 @@
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE (retrying)\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)\n", addr);
goto begin_ejtag_dma_write;
}
else
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -286,11 +286,11 @@
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE (retrying)\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)\n", addr);
goto begin_ejtag_dma_write_h;
}
else
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
@@ -338,11 +338,11 @@
if (ejtag_ctrl & EJTAG_CTRL_DERR)
{
if (retries--) {
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE (retrying)\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE (retrying)\n", addr);
goto begin_ejtag_dma_write_b;
}
else
- LOG_ERROR("DMA Write Addr = %08x Data = ERROR ON WRITE\n", addr);
+ LOG_ERROR("DMA Write Addr = %08" PRIx32 " Data = ERROR ON WRITE\n", addr);
return ERROR_JTAG_DEVICE_ERROR;
}
|
|
From: <du...@ma...> - 2009-06-21 05:17:07
|
Author: duane
Date: 2009-06-21 05:17:03 +0200 (Sun, 21 Jun 2009)
New Revision: 2320
Modified:
trunk/src/target/mips32.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/mips32.c
===================================================================
--- trunk/src/target/mips32.c 2009-06-21 03:16:52 UTC (rev 2319)
+++ trunk/src/target/mips32.c 2009-06-21 03:17:03 UTC (rev 2320)
@@ -164,7 +164,7 @@
reg_value = buf_get_u32(mips32->core_cache->reg_list[num].value, 0, 32);
mips_core_reg = mips32->core_cache->reg_list[num].arch_info;
mips32->core_regs[num] = reg_value;
- LOG_DEBUG("write core reg %i value 0x%x", num , reg_value);
+ LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
mips32->core_cache->reg_list[num].valid = 1;
mips32->core_cache->reg_list[num].dirty = 0;
@@ -264,7 +264,7 @@
exit(-1);
}
- LOG_USER("target halted due to %s, pc: 0x%8.8x",
+ LOG_USER("target halted due to %s, pc: 0x%8.8" PRIx32 "",
Jim_Nvp_value2name_simple( nvp_target_debug_reason, target->debug_reason )->name ,
buf_get_u32(mips32->core_cache->reg_list[MIPS32_PC].value, 0, 32));
@@ -414,7 +414,7 @@
return retval;
}
- LOG_DEBUG("DCR 0x%x numinst %i numdata %i", dcr, mips32->num_inst_bpoints, mips32->num_data_bpoints);
+ LOG_DEBUG("DCR 0x%" PRIx32 " numinst %i numdata %i", dcr, mips32->num_inst_bpoints, mips32->num_data_bpoints);
mips32->bp_scanned = 1;
|
|
From: <du...@ma...> - 2009-06-21 05:17:01
|
Author: duane
Date: 2009-06-21 05:16:52 +0200 (Sun, 21 Jun 2009)
New Revision: 2319
Modified:
trunk/src/target/image.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/image.c
===================================================================
--- trunk/src/target/image.c 2009-06-21 03:16:46 UTC (rev 2318)
+++ trunk/src/target/image.c 2009-06-21 03:16:52 UTC (rev 2319)
@@ -174,7 +174,7 @@
uint8_t cal_checksum = 0;
uint32_t bytes_read = 0;
- if (sscanf(&lpszLine[bytes_read], ":%2x%4x%2x", &count, &address, &record_type) != 3)
+ if (sscanf(&lpszLine[bytes_read], ":%2" SCNx32 "%4" SCNx32 "%2" SCNx32 , &count, &address, &record_type) != 3)
{
return ERROR_IMAGE_FORMAT_ERROR;
}
@@ -269,7 +269,7 @@
/* but we must consume it, and do not create an error. */
while (count-- > 0)
{
- sscanf(&lpszLine[bytes_read], "%2x", &dummy);
+ sscanf(&lpszLine[bytes_read], "%2" SCNx32 , &dummy);
cal_checksum += (uint8_t)dummy;
bytes_read += 2;
}
@@ -305,7 +305,7 @@
{
uint32_t start_address;
- sscanf(&lpszLine[bytes_read], "%8x", &start_address);
+ sscanf(&lpszLine[bytes_read], "%8" SCNx32, &start_address);
cal_checksum += (uint8_t)(start_address >> 24);
cal_checksum += (uint8_t)(start_address >> 16);
cal_checksum += (uint8_t)(start_address >> 8);
@@ -317,11 +317,11 @@
}
else
{
- LOG_ERROR("unhandled IHEX record type: %i", record_type);
+ LOG_ERROR("unhandled IHEX record type: %i", (int)record_type);
return ERROR_IMAGE_FORMAT_ERROR;
}
- sscanf(&lpszLine[bytes_read], "%2x", &checksum);
+ sscanf(&lpszLine[bytes_read], "%2" SCNx32 , &checksum);
bytes_read += 2;
if ((uint8_t)checksum != (uint8_t)(~cal_checksum + 1))
@@ -446,14 +446,14 @@
*size_read = 0;
- LOG_DEBUG("load segment %d at 0x%x (sz=0x%x)",section,offset,size);
+ LOG_DEBUG("load segment %d at 0x%" PRIx32 " (sz=0x%" PRIx32 ")",section,offset,size);
/* read initialized data in current segment if any */
if (offset<field32(elf,segment->p_filesz))
{
/* maximal size present in file for the current segment */
read_size = MIN(size, field32(elf,segment->p_filesz)-offset);
- LOG_DEBUG("read elf: size = 0x%x at 0x%x",read_size,
+ LOG_DEBUG("read elf: size = 0x%" PRIx32 " at 0x%" PRIx32 "",read_size,
field32(elf,segment->p_offset)+offset);
/* read initialized area of the segment */
if ((retval = fileio_seek(&elf->fileio, field32(elf,segment->p_offset)+offset)) != ERROR_OK)
@@ -509,7 +509,7 @@
uint32_t bytes_read = 0;
/* get record type and record length */
- if (sscanf(&lpszLine[bytes_read], "S%1x%2x", &record_type, &count) != 2)
+ if (sscanf(&lpszLine[bytes_read], "S%1" SCNx32 "%2" SCNx32 , &record_type, &count) != 2)
{
return ERROR_IMAGE_FORMAT_ERROR;
}
@@ -537,7 +537,7 @@
{
case 1:
/* S1 - 16 bit address data record */
- sscanf(&lpszLine[bytes_read], "%4x", &address);
+ sscanf(&lpszLine[bytes_read], "%4" SCNx32, &address);
cal_checksum += (uint8_t)(address >> 8);
cal_checksum += (uint8_t)address;
bytes_read += 4;
@@ -546,7 +546,7 @@
case 2:
/* S2 - 24 bit address data record */
- sscanf(&lpszLine[bytes_read], "%6x", &address);
+ sscanf(&lpszLine[bytes_read], "%6" SCNx32 , &address);
cal_checksum += (uint8_t)(address >> 16);
cal_checksum += (uint8_t)(address >> 8);
cal_checksum += (uint8_t)address;
@@ -556,7 +556,7 @@
case 3:
/* S3 - 32 bit address data record */
- sscanf(&lpszLine[bytes_read], "%8x", &address);
+ sscanf(&lpszLine[bytes_read], "%8" SCNx32 , &address);
cal_checksum += (uint8_t)(address >> 24);
cal_checksum += (uint8_t)(address >> 16);
cal_checksum += (uint8_t)(address >> 8);
@@ -603,7 +603,7 @@
while (count-- > 0)
{
- sscanf(&lpszLine[bytes_read], "%2x", &dummy);
+ sscanf(&lpszLine[bytes_read], "%2" SCNx32 , &dummy);
cal_checksum += (uint8_t)dummy;
bytes_read += 2;
}
@@ -627,12 +627,12 @@
}
else
{
- LOG_ERROR("unhandled S19 record type: %i", record_type);
+ LOG_ERROR("unhandled S19 record type: %i", (int)(record_type));
return ERROR_IMAGE_FORMAT_ERROR;
}
/* account for checksum, will always be 0xFF */
- sscanf(&lpszLine[bytes_read], "%2x", &checksum);
+ sscanf(&lpszLine[bytes_read], "%2" SCNx32 , &checksum);
cal_checksum += (uint8_t)checksum;
bytes_read += 2;
@@ -783,7 +783,7 @@
/* don't read past the end of a section */
if (offset + size > image->sections[section].size)
{
- LOG_DEBUG("read past end of section: 0x%8.8x + 0x%8.8x > 0x%8.8x",
+ LOG_DEBUG("read past end of section: 0x%8.8" PRIx32 " + 0x%8.8" PRIx32 " > 0x%8.8" PRIx32 "",
offset, size, image->sections[section].size);
return ERROR_INVALID_ARGUMENTS;
}
|
|
From: <du...@ma...> - 2009-06-21 05:16:49
|
Author: duane
Date: 2009-06-21 05:16:46 +0200 (Sun, 21 Jun 2009)
New Revision: 2318
Modified:
trunk/src/target/feroceon.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/feroceon.c
===================================================================
--- trunk/src/target/feroceon.c 2009-06-21 03:16:38 UTC (rev 2317)
+++ trunk/src/target/feroceon.c 2009-06-21 03:16:46 UTC (rev 2318)
@@ -297,7 +297,7 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
- LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
+ LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
|
|
From: <du...@ma...> - 2009-06-21 05:16:44
|
Author: duane
Date: 2009-06-21 05:16:38 +0200 (Sun, 21 Jun 2009)
New Revision: 2317
Modified:
trunk/src/target/fa526.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/fa526.c
===================================================================
--- trunk/src/target/fa526.c 2009-06-21 03:16:29 UTC (rev 2316)
+++ trunk/src/target/fa526.c 2009-06-21 03:16:38 UTC (rev 2317)
@@ -187,7 +187,7 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
- LOG_DEBUG("xpsr: %8.8x, spsr: %i", xpsr, spsr);
+ LOG_DEBUG("xpsr: %8.8" PRIx32 ", spsr: %i", xpsr, spsr);
/* MSR1 fetched */
arm9tdmi_clock_out(jtag_info, ARMV4_5_MSR_IM(xpsr & 0xff, 0, 1, spsr), 0, NULL, 0);
|
|
From: <du...@ma...> - 2009-06-21 05:16:32
|
Author: duane
Date: 2009-06-21 05:16:29 +0200 (Sun, 21 Jun 2009)
New Revision: 2316
Modified:
trunk/src/target/etm.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/etm.c
===================================================================
--- trunk/src/target/etm.c 2009-06-21 03:16:22 UTC (rev 2315)
+++ trunk/src/target/etm.c 2009-06-21 03:16:29 UTC (rev 2316)
@@ -403,7 +403,7 @@
uint8_t reg_addr = etm_reg->addr & 0x7f;
scan_field_t fields[3];
- LOG_DEBUG("%i: 0x%8.8x", etm_reg->addr, value);
+ LOG_DEBUG("%i: 0x%8.8" PRIx32 "", etm_reg->addr, value);
jtag_set_end_state(TAP_IDLE);
arm_jtag_scann(etm_reg->jtag_info, 0x6);
@@ -801,19 +801,19 @@
next_pc = ctx->last_branch;
break;
case 0x1: /* tracing enabled */
- command_print(cmd_ctx, "--- tracing enabled at 0x%8.8x ---", ctx->last_branch);
+ command_print(cmd_ctx, "--- tracing enabled at 0x%8.8" PRIx32 " ---", ctx->last_branch);
ctx->current_pc = ctx->last_branch;
ctx->pipe_index++;
continue;
break;
case 0x2: /* trace restarted after FIFO overflow */
- command_print(cmd_ctx, "--- trace restarted after FIFO overflow at 0x%8.8x ---", ctx->last_branch);
+ command_print(cmd_ctx, "--- trace restarted after FIFO overflow at 0x%8.8" PRIx32 " ---", ctx->last_branch);
ctx->current_pc = ctx->last_branch;
ctx->pipe_index++;
continue;
break;
case 0x3: /* exit from debug state */
- command_print(cmd_ctx, "--- exit from debug state at 0x%8.8x ---", ctx->last_branch);
+ command_print(cmd_ctx, "--- exit from debug state at 0x%8.8" PRIx32 " ---", ctx->last_branch);
ctx->current_pc = ctx->last_branch;
ctx->pipe_index++;
continue;
@@ -825,14 +825,14 @@
*/
if (!current_pc_ok)
{
- command_print(cmd_ctx, "--- periodic synchronization point at 0x%8.8x ---", next_pc);
+ command_print(cmd_ctx, "--- periodic synchronization point at 0x%8.8" PRIx32 " ---", next_pc);
ctx->current_pc = next_pc;
ctx->pipe_index++;
continue;
}
break;
default: /* reserved */
- LOG_ERROR("BUG: branch reason code 0x%x is reserved", ctx->last_branch_reason);
+ LOG_ERROR("BUG: branch reason code 0x%" PRIx32 " is reserved", ctx->last_branch_reason);
exit(-1);
break;
}
@@ -854,7 +854,7 @@
}
else
{
- command_print(cmd_ctx, "exception vector 0x%2.2x", ctx->last_branch);
+ command_print(cmd_ctx, "exception vector 0x%2.2" PRIx32 "", ctx->last_branch);
ctx->current_pc = ctx->last_branch;
ctx->pipe_index++;
continue;
@@ -917,7 +917,7 @@
if (ctx->ptr_ok)
{
- command_print(cmd_ctx, "address: 0x%8.8x", ctx->last_ptr);
+ command_print(cmd_ctx, "address: 0x%8.8" PRIx32 "", ctx->last_ptr);
}
}
@@ -933,7 +933,7 @@
uint32_t data;
if (etmv1_data(ctx, 4, &data) != 0)
return ERROR_ETM_ANALYSIS_FAILED;
- command_print(cmd_ctx, "data: 0x%8.8x", data);
+ command_print(cmd_ctx, "data: 0x%8.8" PRIx32 "", data);
}
}
}
@@ -942,7 +942,7 @@
uint32_t data;
if (etmv1_data(ctx, arm_access_size(&instruction), &data) != 0)
return ERROR_ETM_ANALYSIS_FAILED;
- command_print(cmd_ctx, "data: 0x%8.8x", data);
+ command_print(cmd_ctx, "data: 0x%8.8" PRIx32 "", data);
}
}
@@ -984,7 +984,7 @@
if (ctx->tracemode & ETMV1_CYCLE_ACCURATE)
{
snprintf(cycles_text, 32, " (%i %s)",
- cycles,
+ (int)cycles,
(cycles == 1) ? "cycle" : "cycles");
}
@@ -1343,17 +1343,17 @@
etm_sys_config_reg = &arm7_9->etm_ctx->reg_cache->reg_list[ETM_SYS_CONFIG];
etm_get_reg(etm_config_reg);
- command_print(cmd_ctx, "pairs of address comparators: %i", buf_get_u32(etm_config_reg->value, 0, 4));
- command_print(cmd_ctx, "pairs of data comparators: %i", buf_get_u32(etm_config_reg->value, 4, 4));
- command_print(cmd_ctx, "memory map decoders: %i", buf_get_u32(etm_config_reg->value, 8, 5));
- command_print(cmd_ctx, "number of counters: %i", buf_get_u32(etm_config_reg->value, 13, 3));
+ command_print(cmd_ctx, "pairs of address comparators: %i", (int)buf_get_u32(etm_config_reg->value, 0, 4));
+ command_print(cmd_ctx, "pairs of data comparators: %i", (int)buf_get_u32(etm_config_reg->value, 4, 4));
+ command_print(cmd_ctx, "memory map decoders: %i", (int)buf_get_u32(etm_config_reg->value, 8, 5));
+ command_print(cmd_ctx, "number of counters: %i", (int)buf_get_u32(etm_config_reg->value, 13, 3));
command_print(cmd_ctx, "sequencer %spresent",
(buf_get_u32(etm_config_reg->value, 16, 1) == 1) ? "" : "not ");
- command_print(cmd_ctx, "number of ext. inputs: %i", buf_get_u32(etm_config_reg->value, 17, 3));
- command_print(cmd_ctx, "number of ext. outputs: %i", buf_get_u32(etm_config_reg->value, 20, 3));
+ command_print(cmd_ctx, "number of ext. inputs: %i", (int)buf_get_u32(etm_config_reg->value, 17, 3));
+ command_print(cmd_ctx, "number of ext. outputs: %i",(int) buf_get_u32(etm_config_reg->value, 20, 3));
command_print(cmd_ctx, "FIFO full %spresent",
(buf_get_u32(etm_config_reg->value, 23, 1) == 1) ? "" : "not ");
- command_print(cmd_ctx, "protocol version: %i", buf_get_u32(etm_config_reg->value, 28, 3));
+ command_print(cmd_ctx, "protocol version: %i", (int)buf_get_u32(etm_config_reg->value, 28, 3));
etm_get_reg(etm_sys_config_reg);
@@ -1431,7 +1431,7 @@
if (arm7_9->etm_ctx->trace_depth > 0)
{
- command_print(cmd_ctx, "%i frames of trace data read", arm7_9->etm_ctx->trace_depth);
+ command_print(cmd_ctx, "%i frames of trace data read", (int)(arm7_9->etm_ctx->trace_depth));
}
}
@@ -1618,11 +1618,13 @@
etm_ctx->trace_data = NULL;
}
- fileio_read_u32(&file, &etm_ctx->capture_status);
- fileio_read_u32(&file, &etm_ctx->portmode);
- fileio_read_u32(&file, &etm_ctx->tracemode);
- fileio_read_u32(&file, &etm_ctx->trace_depth);
-
+ {
+ uint32_t tmp;
+ fileio_read_u32(&file, &tmp); etm_ctx->capture_status = tmp;
+ fileio_read_u32(&file, &tmp); etm_ctx->portmode = tmp;
+ fileio_read_u32(&file, &tmp); etm_ctx->tracemode = tmp;
+ fileio_read_u32(&file, &etm_ctx->trace_depth);
+ }
etm_ctx->trace_data = malloc(sizeof(etmv1_trace_data_t) * etm_ctx->trace_depth);
if (etm_ctx->trace_data == NULL)
{
@@ -1682,7 +1684,7 @@
}
}
- command_print(cmd_ctx, "%i percent of the tracebuffer reserved for after the trigger", etm_ctx->trigger_percent);
+ command_print(cmd_ctx, "%i percent of the tracebuffer reserved for after the trigger", ((int)(etm_ctx->trigger_percent)));
return ERROR_OK;
}
|
|
From: <du...@ma...> - 2009-06-21 05:16:27
|
Author: duane
Date: 2009-06-21 05:16:22 +0200 (Sun, 21 Jun 2009)
New Revision: 2315
Modified:
trunk/src/target/etb.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/etb.c
===================================================================
--- trunk/src/target/etb.c 2009-06-21 03:16:18 UTC (rev 2314)
+++ trunk/src/target/etb.c 2009-06-21 03:16:22 UTC (rev 2315)
@@ -224,7 +224,7 @@
uint8_t reg_addr = etb_reg->addr & 0x7f;
scan_field_t fields[3];
- LOG_DEBUG("%i", etb_reg->addr);
+ LOG_DEBUG("%i", (int)(etb_reg->addr));
jtag_set_end_state(TAP_IDLE);
etb_scann(etb_reg->etb, 0x0);
@@ -313,7 +313,7 @@
uint8_t reg_addr = etb_reg->addr & 0x7f;
scan_field_t fields[3];
- LOG_DEBUG("%i: 0x%8.8x", etb_reg->addr, value);
+ LOG_DEBUG("%i: 0x%8.8" PRIx32 "", (int)(etb_reg->addr), value);
jtag_set_end_state(TAP_IDLE);
etb_scann(etb_reg->etb, 0x0);
@@ -470,7 +470,7 @@
if (etb_timeout == 0)
{
- LOG_ERROR("AcqComp set but DFEmpty won't go high, ETB status: 0x%x",
+ LOG_ERROR("AcqComp set but DFEmpty won't go high, ETB status: 0x%" PRIx32 "",
buf_get_u32(etb_status_reg->value, 0, etb_status_reg->size));
}
|
|
From: <du...@ma...> - 2009-06-21 05:16:20
|
Author: duane
Date: 2009-06-21 05:16:18 +0200 (Sun, 21 Jun 2009)
New Revision: 2314
Modified:
trunk/src/target/embeddedice.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/embeddedice.c
===================================================================
--- trunk/src/target/embeddedice.c 2009-06-21 03:16:14 UTC (rev 2313)
+++ trunk/src/target/embeddedice.c 2009-06-21 03:16:18 UTC (rev 2314)
@@ -186,7 +186,7 @@
*/
if (strcmp(target_get_name(target), "feroceon") == 0)
break;
- LOG_ERROR("unknown EmbeddedICE version (comms ctrl: 0x%8.8x)", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
+ LOG_ERROR("unknown EmbeddedICE version (comms ctrl: 0x%8.8" PRIx32 ")", buf_get_u32(reg_list[EICE_COMMS_CTRL].value, 0, 32));
}
return reg_cache;
@@ -367,7 +367,7 @@
{
embeddedice_reg_t *ice_reg = reg->arch_info;
- LOG_DEBUG("%i: 0x%8.8x", ice_reg->addr, value);
+ LOG_DEBUG("%i: 0x%8.8" PRIx32 "", ice_reg->addr, value);
jtag_set_end_state(TAP_IDLE);
arm_jtag_scann(ice_reg->jtag_info, 0x2);
|
|
From: <du...@ma...> - 2009-06-21 05:16:16
|
Author: duane
Date: 2009-06-21 05:16:14 +0200 (Sun, 21 Jun 2009)
New Revision: 2313
Modified:
trunk/src/target/cortex_m3.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/cortex_m3.c
===================================================================
--- trunk/src/target/cortex_m3.c 2009-06-21 03:16:09 UTC (rev 2312)
+++ trunk/src/target/cortex_m3.c 2009-06-21 03:16:14 UTC (rev 2313)
@@ -175,7 +175,7 @@
mem_ap_read_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
/* Write Debug Fault Status Register to enable processing to resume ?? Try with and without this !! */
mem_ap_write_atomic_u32(swjdp, NVIC_DFSR, cortex_m3->nvic_dfsr);
- LOG_DEBUG(" NVIC_DFSR 0x%x", cortex_m3->nvic_dfsr);
+ LOG_DEBUG(" NVIC_DFSR 0x%" PRIx32 "", cortex_m3->nvic_dfsr);
return ERROR_OK;
}
@@ -249,7 +249,7 @@
cortex_m3_dwt_comparator_t *dwt_list = cortex_m3->dwt_comparator_list;
mem_ap_read_atomic_u32(swjdp, DCB_DEMCR, &dcb_demcr);
- LOG_DEBUG("DCB_DEMCR = 0x%8.8x",dcb_demcr);
+ LOG_DEBUG("DCB_DEMCR = 0x%8.8" PRIx32 "",dcb_demcr);
/* this regsiter is used for emulated dcc channel */
mem_ap_write_u32(swjdp, DCB_DCRDR, 0);
@@ -366,7 +366,7 @@
break;
}
swjdp_transaction_endcheck(swjdp);
- LOG_DEBUG("%s SHCSR 0x%x, SR 0x%x, CFSR 0x%x, AR 0x%x", armv7m_exception_string(armv7m->exception_number), \
+ LOG_DEBUG("%s SHCSR 0x%" PRIx32 ", SR 0x%" PRIx32 ", CFSR 0x%" PRIx32 ", AR 0x%" PRIx32 "", armv7m_exception_string(armv7m->exception_number), \
shcsr, except_sr, cfsr, except_ar);
return ERROR_OK;
}
@@ -441,7 +441,7 @@
cortex_m3_examine_exception_reason(target);
}
- LOG_DEBUG("entered debug state in core mode: %s at PC 0x%x, target->state: %s",
+ LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s",
armv7m_mode_strings[armv7m->core_mode],
*(uint32_t*)(armv7m->core_cache->reg_list[15].value),
Jim_Nvp_value2name_simple( nvp_target_state, target->state )->name);
@@ -485,7 +485,7 @@
if (target->state == TARGET_RESET)
{
/* Cannot switch context while running so endreset is called with target->state == TARGET_RESET */
- LOG_DEBUG("Exit from reset with dcb_dhcsr 0x%x", cortex_m3->dcb_dhcsr);
+ LOG_DEBUG("Exit from reset with dcb_dhcsr 0x%" PRIx32 "", cortex_m3->dcb_dhcsr);
cortex_m3_endreset_event(target);
target->state = TARGET_RUNNING;
prev_target_state = TARGET_RUNNING;
@@ -595,12 +595,12 @@
mem_ap_read_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
if ((dcb_dhcsr & S_HALT) && (cortex_m3->nvic_dfsr & DFSR_VCATCH))
{
- LOG_DEBUG("system reset-halted, dcb_dhcsr 0x%x, nvic_dfsr 0x%x", dcb_dhcsr, cortex_m3->nvic_dfsr);
+ LOG_DEBUG("system reset-halted, dcb_dhcsr 0x%" PRIx32 ", nvic_dfsr 0x%" PRIx32 "", dcb_dhcsr, cortex_m3->nvic_dfsr);
cortex_m3_poll(target);
return ERROR_OK;
}
else
- LOG_DEBUG("waiting for system reset-halt, dcb_dhcsr 0x%x, %i ms", dcb_dhcsr, timeout);
+ LOG_DEBUG("waiting for system reset-halt, dcb_dhcsr 0x%" PRIx32 ", %i ms", dcb_dhcsr, timeout);
}
timeout++;
alive_sleep(1);
@@ -664,7 +664,7 @@
/* Single step past breakpoint at current address */
if ((breakpoint = breakpoint_find(target, resume_pc)))
{
- LOG_DEBUG("unset breakpoint at 0x%8.8x", breakpoint->address);
+ LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
cortex_m3_unset_breakpoint(target, breakpoint);
cortex_m3_single_step_core(target);
cortex_m3_set_breakpoint(target, breakpoint);
@@ -682,13 +682,13 @@
{
target->state = TARGET_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_RESUMED);
- LOG_DEBUG("target resumed at 0x%x", resume_pc);
+ LOG_DEBUG("target resumed at 0x%" PRIx32 "", resume_pc);
}
else
{
target->state = TARGET_DEBUG_RUNNING;
target_call_event_callbacks(target, TARGET_EVENT_DEBUG_RESUMED);
- LOG_DEBUG("target debug resumed at 0x%x", resume_pc);
+ LOG_DEBUG("target debug resumed at 0x%" PRIx32 "", resume_pc);
}
return ERROR_OK;
@@ -734,12 +734,12 @@
if (breakpoint)
cortex_m3_set_breakpoint(target, breakpoint);
- LOG_DEBUG("target stepped dcb_dhcsr = 0x%x nvic_icsr = 0x%x", cortex_m3->dcb_dhcsr, cortex_m3->nvic_icsr);
+ LOG_DEBUG("target stepped dcb_dhcsr = 0x%" PRIx32 " nvic_icsr = 0x%" PRIx32 "", cortex_m3->dcb_dhcsr, cortex_m3->nvic_icsr);
cortex_m3_debug_entry(target);
target_call_event_callbacks(target, TARGET_EVENT_HALTED);
- LOG_DEBUG("target stepped dcb_dhcsr = 0x%x nvic_icsr = 0x%x", cortex_m3->dcb_dhcsr, cortex_m3->nvic_icsr);
+ LOG_DEBUG("target stepped dcb_dhcsr = 0x%" PRIx32 " nvic_icsr = 0x%" PRIx32 "", cortex_m3->dcb_dhcsr, cortex_m3->nvic_icsr);
return ERROR_OK;
}
@@ -921,7 +921,7 @@
comparator_list[fp_num].used = 1;
comparator_list[fp_num].fpcr_value = (breakpoint->address & 0x1FFFFFFC) | hilo | 1;
target_write_u32(target, comparator_list[fp_num].fpcr_address, comparator_list[fp_num].fpcr_value);
- LOG_DEBUG("fpc_num %i fpcr_value 0x%x", fp_num, comparator_list[fp_num].fpcr_value);
+ LOG_DEBUG("fpc_num %i fpcr_value 0x%" PRIx32 "", fp_num, comparator_list[fp_num].fpcr_value);
if (!cortex_m3->fpb_enabled)
{
LOG_DEBUG("FPB wasn't enabled, do it now");
@@ -1114,7 +1114,7 @@
target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address, comparator_list[dwt_num].comp);
target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address|0x4, comparator_list[dwt_num].mask);
target_write_u32(target, comparator_list[dwt_num].dwt_comparator_address|0x8, comparator_list[dwt_num].function);
- LOG_DEBUG("dwt_num %i 0x%x 0x%x 0x%x", dwt_num, comparator_list[dwt_num].comp, comparator_list[dwt_num].mask, comparator_list[dwt_num].function);
+ LOG_DEBUG("dwt_num %i 0x%" PRIx32 " 0x%" PRIx32 " 0x%" PRIx32 "", dwt_num, comparator_list[dwt_num].comp, comparator_list[dwt_num].mask, comparator_list[dwt_num].function);
}
else
{
@@ -1235,7 +1235,7 @@
LOG_ERROR("JTAG failure %i",retval);
return ERROR_JTAG_DEVICE_ERROR;
}
- LOG_DEBUG("load from core reg %i value 0x%x",num,*value);
+ LOG_DEBUG("load from core reg %i value 0x%" PRIx32 "",(int)num,*value);
}
else if (type == ARMV7M_REGISTER_CORE_SP) /* Special purpose core register */
{
@@ -1261,7 +1261,7 @@
break;
}
- LOG_DEBUG("load from special reg %i value 0x%x", num, *value);
+ LOG_DEBUG("load from special reg %i value 0x%" PRIx32 "", (int)num, *value);
}
else
{
@@ -1300,7 +1300,7 @@
armv7m->core_cache->reg_list[num].dirty = armv7m->core_cache->reg_list[num].valid;
return ERROR_JTAG_DEVICE_ERROR;
}
- LOG_DEBUG("write core reg %i value 0x%x", num, value);
+ LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", (int)num, value);
}
else if (type == ARMV7M_REGISTER_CORE_SP) /* Special purpose core register */
{
@@ -1329,7 +1329,7 @@
cortexm3_dap_write_coreregister_u32(swjdp, reg, 20);
- LOG_DEBUG("write special reg %i value 0x%x ", num, value);
+ LOG_DEBUG("write special reg %i value 0x%" PRIx32 " ", (int)num, value);
}
else
{
@@ -1441,7 +1441,7 @@
if (((cpuid >> 4) & 0xc3f) == 0xc23)
LOG_DEBUG("CORTEX-M3 processor detected");
- LOG_DEBUG("cpuid: 0x%8.8x", cpuid);
+ LOG_DEBUG("cpuid: 0x%8.8" PRIx32 "", cpuid);
target_read_u32(target, NVIC_ICTR, &ictr);
cortex_m3->intlinesnum = (ictr & 0x1F) + 1;
@@ -1449,7 +1449,7 @@
for (i = 0; i < cortex_m3->intlinesnum; i++)
{
target_read_u32(target, NVIC_ISE0 + 4 * i, cortex_m3->intsetenable + i);
- LOG_DEBUG("interrupt enable[%i] = 0x%8.8x", i, cortex_m3->intsetenable[i]);
+ LOG_DEBUG("interrupt enable[%i] = 0x%8.8" PRIx32 "", i, cortex_m3->intsetenable[i]);
}
/* Setup FPB */
@@ -1465,7 +1465,7 @@
cortex_m3->fp_comparator_list[i].type = (i < cortex_m3->fp_num_code) ? FPCR_CODE : FPCR_LITERAL;
cortex_m3->fp_comparator_list[i].fpcr_address = FP_COMP0 + 4 * i;
}
- LOG_DEBUG("FPB fpcr 0x%x, numcode %i, numlit %i", fpcr, cortex_m3->fp_num_code, cortex_m3->fp_num_lit);
+ LOG_DEBUG("FPB fpcr 0x%" PRIx32 ", numcode %i, numlit %i", fpcr, cortex_m3->fp_num_code, cortex_m3->fp_num_lit);
/* Setup DWT */
target_read_u32(target, DWT_CTRL, &dwtcr);
|
|
From: <du...@ma...> - 2009-06-21 05:16:12
|
Author: duane
Date: 2009-06-21 05:16:09 +0200 (Sun, 21 Jun 2009)
New Revision: 2312
Modified:
trunk/src/target/breakpoints.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/breakpoints.c
===================================================================
--- trunk/src/target/breakpoints.c 2009-06-21 03:16:05 UTC (rev 2311)
+++ trunk/src/target/breakpoints.c 2009-06-21 03:16:09 UTC (rev 2312)
@@ -84,7 +84,7 @@
}
}
- LOG_DEBUG("added %s breakpoint at 0x%8.8x of length 0x%8.8x",
+ LOG_DEBUG("added %s breakpoint at 0x%8.8" PRIx32 " of length 0x%8.8x",
breakpoint_type_strings[(*breakpoint_p)->type],
(*breakpoint_p)->address, (*breakpoint_p)->length);
@@ -134,7 +134,7 @@
}
else
{
- LOG_ERROR("no breakpoint at address 0x%8.8x found", address);
+ LOG_ERROR("no breakpoint at address 0x%8.8" PRIx32 " found", address);
}
}
@@ -207,7 +207,7 @@
}
}
- LOG_DEBUG("added %s watchpoint at 0x%8.8x of length 0x%8.8x",
+ LOG_DEBUG("added %s watchpoint at 0x%8.8" PRIx32 " of length 0x%8.8x",
watchpoint_rw_strings[(*watchpoint_p)->rw],
(*watchpoint_p)->address, (*watchpoint_p)->length);
@@ -253,7 +253,7 @@
}
else
{
- LOG_ERROR("no watchpoint at address 0x%8.8x found", address);
+ LOG_ERROR("no watchpoint at address 0x%8.8" PRIx32 " found", address);
}
}
|
|
From: <du...@ma...> - 2009-06-21 05:16:08
|
Author: duane
Date: 2009-06-21 05:16:05 +0200 (Sun, 21 Jun 2009)
New Revision: 2311
Modified:
trunk/src/target/armv7m.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/armv7m.c
===================================================================
--- trunk/src/target/armv7m.c 2009-06-21 03:15:59 UTC (rev 2310)
+++ trunk/src/target/armv7m.c 2009-06-21 03:16:05 UTC (rev 2311)
@@ -231,7 +231,7 @@
armv7m->core_cache->reg_list[num].dirty = armv7m->core_cache->reg_list[num].valid;
return ERROR_JTAG_DEVICE_ERROR;
}
- LOG_DEBUG("write core reg %i value 0x%x", num , reg_value);
+ LOG_DEBUG("write core reg %i value 0x%" PRIx32 "", num , reg_value);
armv7m->core_cache->reg_list[num].valid = 1;
armv7m->core_cache->reg_list[num].dirty = 0;
@@ -316,7 +316,7 @@
armv7m->load_core_reg_u32(target, ARMV7M_REGISTER_CORE_GP, 15, &pc);
if (pc != exit_point)
{
- LOG_DEBUG("failed algoritm halted at 0x%x ", pc);
+ LOG_DEBUG("failed algoritm halted at 0x%" PRIx32 " ", pc);
return ERROR_TARGET_TIMEOUT;
}
@@ -444,7 +444,7 @@
regvalue = buf_get_u32(armv7m->core_cache->reg_list[i].value, 0, 32);
if (regvalue != context[i])
{
- LOG_DEBUG("restoring register %s with value 0x%8.8x", armv7m->core_cache->reg_list[i].name, context[i]);
+ LOG_DEBUG("restoring register %s with value 0x%8.8" PRIx32 "", armv7m->core_cache->reg_list[i].name, context[i]);
buf_set_u32(armv7m->core_cache->reg_list[i].value, 0, 32, context[i]);
armv7m->core_cache->reg_list[i].valid = 1;
armv7m->core_cache->reg_list[i].dirty = 1;
@@ -461,7 +461,7 @@
/* get pointers to arch-specific information */
armv7m_common_t *armv7m = target->arch_info;
- LOG_USER("target halted due to %s, current mode: %s %s\nxPSR: 0x%8.8x pc: 0x%8.8x",
+ LOG_USER("target halted due to %s, current mode: %s %s\nxPSR: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "",
Jim_Nvp_value2name_simple( nvp_target_debug_reason,target->debug_reason)->name,
armv7m_mode_strings[armv7m->core_mode],
armv7m_exception_string(armv7m->exception_number),
@@ -720,7 +720,7 @@
dap_ap_read_reg_u32(swjdp, 0xF8, &baseaddr);
retval = swjdp_transaction_endcheck(swjdp);
- command_print(cmd_ctx, "0x%8.8x", baseaddr);
+ command_print(cmd_ctx, "0x%8.8" PRIx32 "", baseaddr);
if (apselsave != apsel)
{
@@ -756,7 +756,7 @@
dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
retval = swjdp_transaction_endcheck(swjdp);
- command_print(cmd_ctx, "0x%8.8x", apid);
+ command_print(cmd_ctx, "0x%8.8" PRIx32 "", apid);
if (apselsave != apsel)
{
dap_ap_select(swjdp, apselsave);
@@ -782,7 +782,7 @@
dap_ap_select(swjdp, apsel);
dap_ap_read_reg_u32(swjdp, 0xFC, &apid);
retval = swjdp_transaction_endcheck(swjdp);
- command_print(cmd_ctx, "ap %i selected, identification register 0x%8.8x", apsel, apid);
+ command_print(cmd_ctx, "ap %i selected, identification register 0x%8.8" PRIx32 "", (int)apsel, apid);
return retval;
}
@@ -801,7 +801,7 @@
}
swjdp->memaccess_tck = memaccess_tck;
- command_print(cmd_ctx, "memory bus access delay set to %i tck", swjdp->memaccess_tck);
+ command_print(cmd_ctx, "memory bus access delay set to %i tck", (int)(swjdp->memaccess_tck));
return ERROR_OK;
}
|
|
From: <du...@ma...> - 2009-06-21 05:16:03
|
Author: duane
Date: 2009-06-21 05:15:59 +0200 (Sun, 21 Jun 2009)
New Revision: 2310
Modified:
trunk/src/target/armv4_5_mmu.c
Log:
C99 printf() -Werror fixes
Modified: trunk/src/target/armv4_5_mmu.c
===================================================================
--- trunk/src/target/armv4_5_mmu.c 2009-06-21 03:15:51 UTC (rev 2309)
+++ trunk/src/target/armv4_5_mmu.c 2009-06-21 03:15:59 UTC (rev 2310)
@@ -43,7 +43,7 @@
4, 1, (uint8_t*)&first_lvl_descriptor);
first_lvl_descriptor = target_buffer_get_u32(target, (uint8_t*)&first_lvl_descriptor);
- LOG_DEBUG("1st lvl desc: %8.8x", first_lvl_descriptor);
+ LOG_DEBUG("1st lvl desc: %8.8" PRIx32 "", first_lvl_descriptor);
if ((first_lvl_descriptor & 0x3) == 0)
{
@@ -88,7 +88,7 @@
second_lvl_descriptor = target_buffer_get_u32(target, (uint8_t*)&second_lvl_descriptor);
- LOG_DEBUG("2nd lvl desc: %8.8x", second_lvl_descriptor);
+ LOG_DEBUG("2nd lvl desc: %8.8" PRIx32 "", second_lvl_descriptor);
if ((second_lvl_descriptor & 0x3) == 0)
{
@@ -200,7 +200,7 @@
switch (pa)
{
case ERROR_TARGET_TRANSLATION_FAULT:
- command_print(cmd_ctx, "no valid translation for 0x%8.8x", va);
+ command_print(cmd_ctx, "no valid translation for 0x%8.8" PRIx32 "", va);
break;
default:
command_print(cmd_ctx, "unknown translation error");
@@ -208,8 +208,8 @@
return ERROR_OK;
}
- command_print(cmd_ctx, "0x%8.8x -> 0x%8.8x, type: %s, cb: %i, domain: %i, ap: %2.2x",
- va, pa, armv4_5_mmu_page_type_names[type], cb, domain, ap);
+ command_print(cmd_ctx, "0x%8.8" PRIx32 " -> 0x%8.8" PRIx32 ", type: %s, cb: %i, domain: %d, ap: %2.2x",
+ va, pa, armv4_5_mmu_page_type_names[type], (int)cb, domain, (int)ap);
}
return ERROR_OK;
@@ -282,12 +282,12 @@
for (i = 0; i < count; i++)
{
if (i%8 == 0)
- output_len += snprintf(output + output_len, 128 - output_len, "0x%8.8x: ", address + (i*size));
+ output_len += snprintf(output + output_len, 128 - output_len, "0x%8.8" PRIx32 ": ", address + (i*size));
switch (size)
{
case 4:
- output_len += snprintf(output + output_len, 128 - output_len, "%8.8x ", target_buffer_get_u32(target, &buffer[i*4]));
+ output_len += snprintf(output + output_len, 128 - output_len, "%8.8" PRIx32 " ", target_buffer_get_u32(target, &buffer[i*4]));
break;
case 2:
output_len += snprintf(output + output_len, 128 - output_len, "%4.4x ", target_buffer_get_u16(target, &buffer[i*2]));
|
