[PATCH]: 2e10729ccc target: cortex-m: fix support for armv8m caches

[<ge...@op...>]

This is an automated email from Gerrit.

"Antonio Borneo <bor...@gm...>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9167

-- gerrit

commit 2e10729ccc3388832454d52997e7af4eeb8c8923
Author: Antonio Borneo <bor...@gm...>
Date:   Sun Oct 12 12:10:46 2025 +0200

    target: cortex-m: fix support for armv8m caches
    
    Scan-build is unable to correctly follow the deferred loading of
    queued read, finalized by the atomic write, thus it incorrectly
    claims that the arrays d_u_ccsidr[] and i_ccsidr[] could be carry
    not initialized values:
    
            armv7m_cache.c:154:31: warning: 1st function call argument
            is an uninitialized value [core.CallAndMessage]
               cache->arch[cl].d_u_size = decode_ccsidr(d_u_ccsidr[cl]);
    
            armv7m_cache.c:172:29: warning: 1st function call argument
            is an uninitialized value [core.CallAndMessage]
               cache->arch[cl].i_size = decode_ccsidr(i_ccsidr[cl]);
    
    Initialize the arrays to zero to hide this false positive.
    
    Change-Id: I6d1e88093cb8807848643139647a571c1b566aa8
    Signed-off-by: Antonio Borneo <bor...@gm...>
    Fixes: 04da6e2c6246 ("target: cortex-m: add support for armv8m caches")

diff --git a/src/target/armv7m_cache.c b/src/target/armv7m_cache.c
index cb57c0e25b..cc0c9d1404 100644
--- a/src/target/armv7m_cache.c
+++ b/src/target/armv7m_cache.c
@@ -111,7 +111,7 @@ int armv7m_identify_cache(struct target *target)
 		clidr, cache->loc);
 
 	// retrieve all available inner caches
-	uint32_t d_u_ccsidr[8], i_ccsidr[8];
+	uint32_t d_u_ccsidr[8] = {0}, i_ccsidr[8] = {0};
 	for (unsigned int cl = 0; cl < cache->loc; cl++) {
 		unsigned int ctype = FIELD_GET(CLIDR_CTYPE_MASK(cl + 1), clidr);
 

--