[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-1083-g09a54c3a8

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commit 09a54c3a89af563329adf757990e0c6dd83a1095
Author: Tomas Vanek <va...@fb...>
Date:   Fri Jan 3 18:23:07 2025 +0100

    target/arm_adi: add URLs of latest ARM ADI spec
    
    While on it warn about screwed SWD diagrams in ADI spec
    and add reference to a SWD timing diagram.
    
    Change-Id: I628d707ebf8ce7c22ba19bdcfd06028d4eaa60f8
    Signed-off-by: Tomas Vanek <va...@fb...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8690
    Tested-by: jenkins

diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index df897b80e..67a3fcc57 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -50,8 +50,16 @@
 /*
  * Relevant specifications from ARM include:
  *
- * ARM(tm) Debug Interface v5 Architecture Specification    ARM IHI 0031F
+ * ARM(tm) Debug Interface v5 Architecture Specification    ARM IHI 0031G
+ * https://developer.arm.com/documentation/ihi0031/latest/
+ *
  * ARM(tm) Debug Interface v6 Architecture Specification    ARM IHI 0074C
+ * https://developer.arm.com/documentation/ihi0074/latest/
+ *
+ * Note that diagrams B4-1 to B4-7 in both ADI specifications show
+ * SWCLK signal mostly in wrong polarity. See detailed SWD timing
+ * https://developer.arm.com/documentation/dui0499/b/arm-dstream-target-interface-connections/swd-timing-requirements
+ *
  * CoreSight(tm) v1.0 Architecture Specification            ARM IHI 0029B
  *
  * CoreSight(tm) DAP-Lite TRM, ARM DDI 0316D

-----------------------------------------------------------------------

Summary of changes:
 src/target/arm_adi_v5.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)


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