Re: [OpenOCD-user] Openocd does not appear to reset the target properly.

[Paul F. <fer...@gm...>]

On Sun, Jun 22, 2025 at 09:51:53AM -0700, Thomas D. Dean wrote:
> Here is the question: Why did cycling power also fix the problem? There is
> no OS, so memory use should be static. Something in core 0 is using the
> stack allocated to core1_main. Maybe in cyw43? I don't think pico-sdk.

I suspect some race condition. What OpenOCD does (have to) is using
SYSRESETREQ on one core, then on the other (probably, not sure,
haven't worked with SMP targets like that, you can see what exactly is
happening in that regard with -d3 option). While Power-On-Reset I
guess is doing it simultaneously so they start running (or the second
core starts stopped?) at the same time.

Regular targets just have an external RESET (SRST) signal which
adapter pulls down same as a reset button or external watchdog would.

I do not have a good explanation of why it can lead exactly to what
you describe (I'm not sure what "starting core 1" and "exiting main"
implies on this platform to begin with).

I wonder if it behaves differently if you instead try
-c "program /path/to.elf verify; reset halt; resume; shutdown"

(reset halt should make the cores stop at reset vector first)

> Thanks for your help. Sorry for the noise. We did find one problem. Is
> someone going to make the change in git?

Eventually, yes :) Thank you for reporting it.

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