Re: [OpenOCD-user] Openocd does not appear to reset the target properly.

[Thomas D. D. <to...@wa...>]

On 6/21/25 11:21, Paul Fertser wrote:
> Hello Thomas,
> 
> On Sat, Jun 21, 2025 at 09:11:15AM -0700, Thomas D. Dean wrote:
>> CX seems to come from rp2040.cfg line 88
> ...
>> Debug: 42 2 command.c:86 script_debug(): command - rp2040.core0 configure -event reset-init  rp2xxx rom_api_call 0 CX
> 
> Indeed, that number 0 shouldn't be there. Please try to modify this
> config file to have just "rp2xxx rom_api_call 0 CX".
> 
 > git diff
diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
index da88a3125..80b4b138c 100644
--- a/tcl/target/rp2040.cfg
+++ b/tcl/target/rp2040.cfg
@@ -85,7 +85,7 @@ if { $_USE_CORE != 1 } {

  	# After a rescue reset and fi BOOTSEL is halted connect the flash to 
enable
  	# reads from the XIP cached mapping area
-	$_TARGETNAME_0 configure -event reset-init { rp2xxx rom_api_call 0 CX }
+	$_TARGETNAME_0 configure -event reset-init { rp2xxx rom_api_call CX }
  }

  # core 1


That fixed the CX error.  But, it seems openocd does not cleanly reset 
the pico_w. Thanks.

If I
1. connect the RPi debug probe to USB and pico_w.
2. power on the pico_w.
3. sudo openocd -f interface/cmsis-dap.cfg -f target/rp2040.cfg \
      -c "adapter speed 5000" -c "program $1 verify reset exit"

Openocd seems to finish without error.

Attempting to connect with firefox never does, just sets there spining.

4. Cycle power on the pico_w

Now, firefox connects and displays the page properly.

I noticed that cmake says the build type for my project is release, the 
*.elf file has debug symbols. and openocd output has debug and breakpoint.

 > sudo openocd -f interface/cmsis-dap.cfg -f target/rp2040.cfg \
      -c "adapter speed 5000" -c "program $1 verify reset exit"
Open On-Chip Debugger 0.12.0+dev-01055-ga9015ba79 (2025-06-21-15:53)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : [rp2040.core0] Hardware thread awareness created
Info : [rp2040.core1] Hardware thread awareness created
adapter speed: 5000 kHz
Info : Using CMSIS-DAPv2 interface with VID:PID=0x2e8a:0x000c, 
serial=E6614103E73C8B25
Info : CMSIS-DAP: SWD supported
Info : CMSIS-DAP: Atomic commands supported
Info : CMSIS-DAP: Test domain timer supported
Info : CMSIS-DAP: FW Version = 2.0.0
Info : CMSIS-DAP: Interface Initialised (SWD)
Info : SWCLK/TCK = 0 SWDIO/TMS = 0 TDI = 0 TDO = 0 nTRST = 0 nRESET = 0
Info : CMSIS-DAP: Interface ready
Info : clock speed 5000 kHz
Info : SWD DPIDR 0x0bc12477, DLPIDR 0x00000001
Info : SWD DPIDR 0x0bc12477, DLPIDR 0x10000001
Info : [rp2040.core0] Cortex-M0+ r0p1 processor detected
Info : [rp2040.core0] target has 4 breakpoints, 2 watchpoints
Info : [rp2040.core0] Examination succeed
Info : [rp2040.core1] Cortex-M0+ r0p1 processor detected
Info : [rp2040.core1] target has 4 breakpoints, 2 watchpoints
Info : [rp2040.core1] Examination succeed
Info : [rp2040.core0] starting gdb server on 3333
Info : Listening on port 3333 for gdb connections
[rp2040.core0] halted due to debug-request, current mode: Thread
xPSR: 0xf1000000 pc: 0x000000ea msp: 0x20041f00
[rp2040.core1] halted due to debug-request, current mode: Thread
xPSR: 0xf1000000 pc: 0x000000ea msp: 0x20041f00
Info : RP2040 rev 2, QSPI Flash win w25q16jv id = 0x1540ef size = 2048 
KiB in 512 sectors
Info : RP2xxx ROM API function CX @ 2321
** Programming Started **
Info : Padding image section 1 at 0x1004c324 with 220 bytes (bank write 
end alignment)
Warn : Adding extra erase range, 0x1004c400 .. 0x1004cfff
Info :   Erase chunk: 0x00000000 -> 0x0001ffff
Info :   Erase chunk: 0x00020000 -> 0x0003ffff
Info :   Erase chunk: 0x00040000 -> 0x0004cfff
** Programming Finished **
** Verify Started **
** Verified OK **
** Resetting Target **
shutdown command invoked

Any ideas?

Tom Dean