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[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-961-g5bb7dbc23
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From: openocd-gerrit <ope...@us...> - 2025-04-25 09:47:07
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via 376d11c2e38303094976186d59502ab7d3073452 (commit)
from f039fe7f9d1ecfc1ca25574d5527c35db119e77b (commit)
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- Log -----------------------------------------------------------------
commit 5bb7dbc2312f4ce84224720eb258ebcae2089e28
Author: Luke Wren <lu...@ra...>
Date: Fri Dec 13 21:56:45 2024 +0100
flash/nor/rp2xxx: fix flash operation after halt in RISC-V bootsel
Calling ROM API set_bootrom_stack() function allows ROM API functionality
after OpenOCD halt or reset halt in RISC-V bootloder (emulated ARM code)
Change-Id: I3b255738d61876e876a94207804d9cbe1a7593c2
Signed-off-by: Tomas Vanek <va...@fb...>
Signed-off-by: Luke Wren <lu...@ra...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8729
Tested-by: jenkins
diff --git a/src/flash/nor/rp2xxx.c b/src/flash/nor/rp2xxx.c
index fce501703..280f077c1 100644
--- a/src/flash/nor/rp2xxx.c
+++ b/src/flash/nor/rp2xxx.c
@@ -26,6 +26,7 @@
#define FUNC_FLASH_FLUSH_CACHE MAKE_TAG('F', 'C')
#define FUNC_FLASH_ENTER_CMD_XIP MAKE_TAG('C', 'X')
#define FUNC_BOOTROM_STATE_RESET MAKE_TAG('S', 'R')
+#define FUNC_BOOTROM_SET_STACK MAKE_TAG('S', 'S')
#define FUNC_FLASH_RESET_ADDRESS_TRANS MAKE_TAG('R', 'A')
/* ROM table flags for RP2350 A1 ROM onwards */
@@ -201,6 +202,7 @@ struct rp2xxx_flash_bank {
uint16_t jump_flash_reset_address_trans;
uint16_t jump_enter_cmd_xip;
uint16_t jump_bootrom_reset_state;
+ uint16_t jump_bootrom_set_varm_stack;
char dev_name[20];
bool size_override;
@@ -445,6 +447,15 @@ static int rp2xxx_populate_rom_pointer_cache(struct target *target, struct rp2xx
LOG_WARNING("Function FUNC_BOOTROM_STATE_RESET not found in RP2xxx ROM. (probably an RP2350 A0)");
}
+ if (!is_arm(target_to_arm(target))) {
+ err = rp2xxx_lookup_rom_symbol(target, FUNC_BOOTROM_SET_STACK, symtype_func,
+ &priv->jump_bootrom_set_varm_stack);
+ if (err != ERROR_OK) {
+ priv->jump_bootrom_set_varm_stack = 0;
+ LOG_WARNING("Function FUNC_BOOTROM_SET_STACK not found in RP2xxx ROM. (probably an RP2350 A0)");
+ }
+ }
+
err = rp2xxx_lookup_rom_symbol(target, FUNC_FLASH_RESET_ADDRESS_TRANS,
symtype_func, &priv->jump_flash_reset_address_trans);
if (err != ERROR_OK) {
@@ -720,6 +731,9 @@ static int setup_for_raw_flash_cmd(struct target *target, struct rp2xxx_flash_ba
if (!priv->jump_bootrom_reset_state) {
LOG_WARNING("RP2350 flash: no bootrom_reset_method\n");
} else {
+ /* This is mainly required to clear varmulet_enclosing_cpu pointers on RISC-V, in case
+ an Arm -> RISC-V call has been interrupted (these pointers are used to handle
+ reentrant calls to the ROM emulator) */
LOG_DEBUG("Clearing core 0 ROM state");
err = rp2xxx_call_rom_func(target, priv, priv->jump_bootrom_reset_state,
reset_args, ARRAY_SIZE(reset_args));
@@ -728,6 +742,39 @@ static int setup_for_raw_flash_cmd(struct target *target, struct rp2xxx_flash_ba
return err;
}
}
+ if (!is_arm(target_to_arm(target)) && priv->jump_bootrom_set_varm_stack) {
+ /* Pass {0, 0} to set_varmulet_user_stack() to enable automatic emulation of Arm APIs
+ using the ROM's default stacks. Usually the bootrom does this before exiting to user
+ code, but it needs to be done manually when the USB bootloader has been interrupted. */
+ LOG_DEBUG("Enabling default Arm emulator stacks for RISC-V ROM calls\n");
+ struct working_area *set_stack_mem_args;
+ err = target_alloc_working_area(target, 2 * sizeof(uint32_t), &set_stack_mem_args);
+ if (err != ERROR_OK) {
+ LOG_ERROR("Failed to allocate memory for arguments to set_varmulet_user_stack()");
+ return err;
+ }
+
+ err = target_write_u32(target, set_stack_mem_args->address, 0);
+ if (err == ERROR_OK)
+ err = target_write_u32(target, set_stack_mem_args->address + 4, 0);
+
+ if (err != ERROR_OK) {
+ LOG_ERROR("Failed to initialise memory arguments for set_varmulet_user_stack()");
+ target_free_working_area(target, set_stack_mem_args);
+ return err;
+ }
+
+ uint32_t set_stack_register_args[1] = {
+ set_stack_mem_args->address
+ };
+ err = rp2xxx_call_rom_func(target, priv, priv->jump_bootrom_set_varm_stack,
+ set_stack_register_args, ARRAY_SIZE(set_stack_register_args));
+ target_free_working_area(target, set_stack_mem_args);
+ if (err != ERROR_OK) {
+ LOG_ERROR("Failed to initialise Arm emulation stacks for RISC-V: 0x%08" PRIx32, err);
+ return err;
+ }
+ }
}
LOG_DEBUG("Connecting flash IOs and issuing XIP exit sequence to flash");
commit 376d11c2e38303094976186d59502ab7d3073452
Author: Tomas Vanek <va...@fb...>
Date: Sat Aug 17 16:21:06 2024 +0200
tcl/target/rp2040: add flash size override and reset init event
Allow flash size override and suppress flash size detection
by setting FLASHSIZE Tcl variable.
reset-init event calls 'connect XIP' ROM API function to make
flash content accessible at the XIP mapping memory area.
Ported from rp2350.cfg
Change-Id: I9b352b1ef6d4c6d4b78a6b61e900ce01355c8eff
Signed-off-by: Tomas Vanek <va...@fb...>
Reviewed-on: https://review.openocd.org/c/openocd/+/8461
Reviewed-by: Jonathan Bell <jon...@ra...>
Tested-by: jenkins
diff --git a/tcl/target/rp2040.cfg b/tcl/target/rp2040.cfg
index 5fae390b4..f64d4322b 100644
--- a/tcl/target/rp2040.cfg
+++ b/tcl/target/rp2040.cfg
@@ -20,6 +20,14 @@ if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE 0x10000
}
+# Nonzero FLASHSIZE supresses QSPI flash size detection
+if { [info exists FLASHSIZE] } {
+ set _FLASHSIZE $FLASHSIZE
+} else {
+ # Detect QSPI flash size based on flash ID or SFDP
+ set _FLASHSIZE 0
+}
+
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
@@ -74,6 +82,10 @@ if { $_USE_CORE != 1 } {
target create $_TARGETNAME_0 cortex_m -dap $_CHIPNAME.dap0 -coreid 0
# srst does not exist; use SYSRESETREQ to perform a soft reset
$_TARGETNAME_0 cortex_m reset_config sysresetreq
+
+ # After a rescue reset and fi BOOTSEL is halted connect the flash to enable
+ # reads from the XIP cached mapping area
+ $_TARGETNAME_0 configure -event reset-init { rp2xxx rom_api_call 0 CX }
}
# core 1
@@ -95,11 +107,11 @@ if { $_USE_CORE == 1 } {
} else {
set _FLASH_TARGET $_TARGETNAME_0
}
-# Backup the work area. The flash probe runs an algorithm on the target CPU.
-# The flash is probed during gdb connect if gdb memory_map is enabled (by default).
-$_FLASH_TARGET configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup 1
+# QSPI flash size detection during gdb connect requires to back-up RAM
+set _WKA_BACKUP [expr { $_FLASHSIZE == 0 }]
+$_FLASH_TARGET configure -work-area-phys 0x20010000 -work-area-size $_WORKAREASIZE -work-area-backup $_WKA_BACKUP
set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME rp2xxx 0x10000000 0 0 0 $_FLASH_TARGET
+flash bank $_FLASHNAME rp2xxx 0x10000000 $_FLASHSIZE 0 0 $_FLASH_TARGET
if { $_BOTH_CORES } {
# Alias to ensure gdb connecting to core 1 gets the correct memory map
-----------------------------------------------------------------------
Summary of changes:
src/flash/nor/rp2xxx.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++
tcl/target/rp2040.cfg | 20 ++++++++++++++++----
2 files changed, 63 insertions(+), 4 deletions(-)
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Main OpenOCD repository
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