From: Michał W. <mic...@gm...> - 2025-01-15 12:25:03
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Hello, I made a custom board base on Allwinner V851s which contains embedded A7 and RiscV units. I want to debug the A7 core with OpenOCD and J-Link. Unfortunately, the V851s does not have a reset pin, so entering debug mode is a big question mark for me. In target list I found a allwinner_v3s.cfg. Quote " # JTAG is enabled by default after power-on on listed JTAG_* pins. So far the # boot sequence is: # Time Action # 0000ms Power ON # 0200ms JTAG enabled # 0220ms JTAG pins switched to SD mode " To do power cycles EEZ H24005 was used. Now, my question is, is it possible to somehow configure the srst pin to make a power cycle? Maybe there is some other way to enter debug mode. Please share with me how to enter into debug mode for this unit. Thanks BR Michal |