[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-706-g75b418faa

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commit 75b418faa7b9849a118c86ccac019d2d9ea235af
Author: Adam Novak <int...@gm...>
Date:   Sun Aug 25 22:36:29 2024 -0400

    tcl/board: Support for Digilent Anvyl board
    
    Support Digilent Anvyl board JTAG chain
    
    Change-Id: I6fb52284429af6c98c19411fc8bc3ab983dfa9b8
    Signed-off-by: Adam Novak <int...@gm...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8467
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/board/digilent_anvyl.cfg b/tcl/board/digilent_anvyl.cfg
new file mode 100644
index 000000000..e82002877
--- /dev/null
+++ b/tcl/board/digilent_anvyl.cfg
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Digilent Anvyl with Xilinx Spartan-6 FPGA
+# https://digilent.com/reference/programmable-logic/anvyl/start
+# Almost the same setup as the Digilent Nexys Video board or the Digilent HS1
+# adapter.
+adapter driver ftdi
+adapter speed 30000
+
+ftdi device_desc "Digilent USB Device"
+ftdi vid_pid 0x0403 0x6010
+
+# channel 0 is the JTAG channel
+# channel 1 is a user serial channel to pins on the FPGA
+ftdi channel 0
+
+# just TCK TDI TDO TMS, no reset
+ftdi layout_init 0x0088 0x008b
+reset_config none
+
+# Enable sampling on falling edge for high JTAG speeds.
+ftdi tdo_sample_edge falling
+
+transport select jtag
+
+source [find cpld/xilinx-xc6s.cfg]
+source [find cpld/jtagspi.cfg]

-----------------------------------------------------------------------

Summary of changes:
 .../{digilent_nexys_video.cfg => digilent_anvyl.cfg}      | 15 ++++++++-------
 1 file changed, 8 insertions(+), 7 deletions(-)
 copy tcl/board/{digilent_nexys_video.cfg => digilent_anvyl.cfg} (52%)


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