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Re: [OpenOCD-user] Unable to perform single stepping on Raspberry Pi 2 with FTDI FT2232H
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From: Bob M <bo...@el...> - 2024-07-10 07:30:43
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On 03/07/2024 12:44, Tommy Murphy wrote: > First thing to do in such situations is to capture and upload/post a > verbose `openocd -d3` log for the problem scenario and that may shed > some light on what's happening and why single stepping results in simply > resuming execution. Sorry for the delay in response; I only get a chance once a week to play with this stuff. Output of `-d3` below. The `halt` is issued on line 411 and `step` issued on line 521. Open On-Chip Debugger 0.12.0+dev-01638-g23c33e1d3 (2024-07-03-08:34) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html User : 3 1 options.c:52 configuration_output_handler(): debug_level: 3User : 4 1 options.c:52 configuration_output_handler(): Debug: 5 1 options.c:346 parse_cmdline_args(): ARGV[0] = "openocd/build/src/openocd" Debug: 6 1 options.c:346 parse_cmdline_args(): ARGV[1] = "-f" Debug: 7 1 options.c:346 parse_cmdline_args(): ARGV[2] = "config/interface/ft2232h.cfg" Debug: 8 1 options.c:346 parse_cmdline_args(): ARGV[3] = "-f" Debug: 9 1 options.c:346 parse_cmdline_args(): ARGV[4] = "config/board/rpi2.cfg" Debug: 10 1 options.c:346 parse_cmdline_args(): ARGV[5] = "-d3" Debug: 11 1 options.c:233 add_default_dirs(): bindir=/usr/local/bin Debug: 12 1 options.c:234 add_default_dirs(): pkgdatadir=/usr/local/share/openocd Debug: 13 1 options.c:235 add_default_dirs(): exepath=/home/bob/projects/openocd-raspberry-pi-2b/openocd/build/src Debug: 14 1 options.c:236 add_default_dirs(): bin2data=../share/openocd Debug: 15 1 configuration.c:33 add_script_search_dir(): adding /home/bob/.config/openocd Debug: 16 1 configuration.c:33 add_script_search_dir(): adding /home/bob/.openocd Debug: 17 1 configuration.c:33 add_script_search_dir(): adding /home/bob/projects/openocd-raspberry-pi-2b/openocd/build/src/../share/openocd/site Debug: 18 1 configuration.c:33 add_script_search_dir(): adding /home/bob/projects/openocd-raspberry-pi-2b/openocd/build/src/../share/openocd/scripts Debug: 19 1 command.c:153 script_debug(): command - ocd_find config/interface/ft2232h.cfg Debug: 20 1 configuration.c:88 find_file(): found config/interface/ft2232h.cfg Debug: 21 1 command.c:153 script_debug(): command - adapter driver ftdi Debug: 22 1 command.c:153 script_debug(): command - ftdi vid_pid 0x0403 0x6010 Debug: 23 1 command.c:153 script_debug(): command - echo DEPRECATED! use 'ftdi channel' not 'ftdi_channel' User : 24 1 command.c:678 handle_echo(): DEPRECATED! use 'ftdi channel' not 'ftdi_channel' Debug: 25 1 command.c:153 script_debug(): command - ftdi channel 0 Debug: 26 1 command.c:153 script_debug(): command - ftdi layout_init 0x0008 0x000b Debug: 27 1 command.c:153 script_debug(): command - ftdi layout_signal nSRST -data 0x0020 -oe 0x0020 Debug: 28 1 command.c:153 script_debug(): command - ocd_find config/board/rpi2.cfg Debug: 29 1 configuration.c:88 find_file(): found config/board/rpi2.cfg Debug: 30 1 command.c:153 script_debug(): command - ocd_find config/target/bcm2836.cfg Debug: 31 1 configuration.c:88 find_file(): found config/target/bcm2836.cfg Debug: 32 1 command.c:153 script_debug(): command - transport select Info : 33 1 transport.c:267 handle_transport_select(): auto-selecting first available session transport "jtag". To override use 'transport select <transport>'. Debug: 34 1 command.c:153 script_debug(): command - transport select Debug: 35 1 command.c:153 script_debug(): command - jtag newtap bcm2836 cpu -expected-id 0x4ba00477 -irlen 4 Debug: 36 1 tcl.c:401 handle_jtag_newtap_args(): Creating New Tap, Chip: bcm2836, Tap: cpu, Dotted: bcm2836.cpu, 4 params Debug: 37 1 core.c:1474 jtag_tap_init(): Created Tap: bcm2836.cpu @ abs position 0, irlen 4, capture: 0x1 mask: 0x3 Debug: 38 1 command.c:153 script_debug(): command - adapter speed 4000 Debug: 39 1 adapter.c:250 adapter_config_khz(): handle adapter khz Debug: 40 1 adapter.c:214 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 41 1 adapter.c:214 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 42 1 command.c:153 script_debug(): command - dap create bcm2836.dap -chain-position bcm2836.cpu Debug: 43 1 command.c:153 script_debug(): command - target create bcm2836.ap mem_ap -dap bcm2836.dap -ap-num 0 Debug: 44 1 command.c:153 script_debug(): command - target create bcm2836.cpu0 cortex_a -dap bcm2836.dap -coreid 0 -dbgbase 0x80010000 Debug: 45 1 command.c:153 script_debug(): command - bcm2836.cpu0 configure -event reset-assert-post cortex_a dbginit Debug: 46 1 command.c:153 script_debug(): command - target create bcm2836.cpu1 cortex_a -dap bcm2836.dap -coreid 1 -dbgbase 0x80012000 Debug: 47 1 command.c:259 register_command(): command 'arm' is already registered Debug: 48 1 command.c:259 register_command(): command 'arm reg' is already registered Debug: 49 1 command.c:259 register_command(): command 'arm mcr' is already registered Debug: 50 1 command.c:259 register_command(): command 'arm mrc' is already registered Debug: 51 1 command.c:259 register_command(): command 'arm mcrr' is already registered Debug: 52 1 command.c:259 register_command(): command 'arm mrrc' is already registered Debug: 53 1 command.c:259 register_command(): command 'arm core_state' is already registered Debug: 54 1 command.c:259 register_command(): command 'arm disassemble' is already registered Debug: 55 1 command.c:259 register_command(): command 'arm semihosting' is already registered Debug: 56 1 command.c:259 register_command(): command 'arm semihosting_redirect' is already registered Debug: 57 1 command.c:259 register_command(): command 'arm semihosting_cmdline' is already registered Debug: 58 1 command.c:259 register_command(): command 'arm semihosting_fileio' is already registered Debug: 59 1 command.c:259 register_command(): command 'arm semihosting_resexit' is already registered Debug: 60 1 command.c:259 register_command(): command 'arm semihosting_read_user_param' is already registered Debug: 61 1 command.c:259 register_command(): command 'arm semihosting_basedir' is already registered Debug: 62 1 command.c:259 register_command(): command 'cache_config' is already registered Debug: 63 1 command.c:259 register_command(): command 'cache_config l2x' is already registered Debug: 64 1 command.c:259 register_command(): command 'cache' is already registered Debug: 65 1 command.c:259 register_command(): command 'cache l1' is already registered Debug: 66 1 command.c:259 register_command(): command 'cache l1 info' is already registered Debug: 67 1 command.c:259 register_command(): command 'cache l1 d' is already registered Debug: 68 1 command.c:259 register_command(): command 'cache l1 d flush_all' is already registered Debug: 69 1 command.c:259 register_command(): command 'cache l1 d inval' is already registered Debug: 70 1 command.c:259 register_command(): command 'cache l1 d clean' is already registered Debug: 71 1 command.c:259 register_command(): command 'cache l1 i' is already registered Debug: 72 1 command.c:259 register_command(): command 'cache l1 i inval_all' is already registered Debug: 73 1 command.c:259 register_command(): command 'cache l1 i inval' is already registered Debug: 74 1 command.c:259 register_command(): command 'cache l2x' is already registered Debug: 75 1 command.c:259 register_command(): command 'cache l2x conf' is already registered Debug: 76 1 command.c:259 register_command(): command 'cache l2x info' is already registered Debug: 77 1 command.c:259 register_command(): command 'cache l2x flush_all' is already registered Debug: 78 1 command.c:259 register_command(): command 'cache l2x flush' is already registered Debug: 79 1 command.c:259 register_command(): command 'cache l2x inval' is already registered Debug: 80 1 command.c:259 register_command(): command 'cache l2x clean' is already registered Debug: 81 1 command.c:259 register_command(): command 'cortex_a' is already registered Debug: 82 1 command.c:259 register_command(): command 'cortex_a cache_info' is already registered Debug: 83 1 command.c:259 register_command(): command 'cortex_a dbginit' is already registered Debug: 84 1 command.c:259 register_command(): command 'cortex_a maskisr' is already registered Debug: 85 1 command.c:259 register_command(): command 'cortex_a dacrfixup' is already registered Debug: 86 1 command.c:259 register_command(): command 'cortex_a mmu' is already registered Debug: 87 1 command.c:259 register_command(): command 'cortex_a mmu dump' is already registered Debug: 88 1 command.c:259 register_command(): command 'cortex_a smp' is already registered Debug: 89 1 command.c:259 register_command(): command 'cortex_a smp_gdb' is already registered Debug: 90 1 command.c:153 script_debug(): command - bcm2836.cpu1 configure -event reset-assert-post cortex_a dbginit Debug: 91 1 command.c:153 script_debug(): command - target create bcm2836.cpu2 cortex_a -dap bcm2836.dap -coreid 2 -dbgbase 0x80014000 Debug: 92 1 command.c:259 register_command(): command 'arm' is already registered Debug: 93 1 command.c:259 register_command(): command 'arm reg' is already registered Debug: 94 1 command.c:259 register_command(): command 'arm mcr' is already registered Debug: 95 1 command.c:259 register_command(): command 'arm mrc' is already registered Debug: 96 1 command.c:259 register_command(): command 'arm mcrr' is already registered Debug: 97 1 command.c:259 register_command(): command 'arm mrrc' is already registered Debug: 98 1 command.c:259 register_command(): command 'arm core_state' is already registered Debug: 99 1 command.c:259 register_command(): command 'arm disassemble' is already registered Debug: 100 1 command.c:259 register_command(): command 'arm semihosting' is already registered Debug: 101 1 command.c:259 register_command(): command 'arm semihosting_redirect' is already registered Debug: 102 1 command.c:259 register_command(): command 'arm semihosting_cmdline' is already registered Debug: 103 1 command.c:259 register_command(): command 'arm semihosting_fileio' is already registered Debug: 104 1 command.c:259 register_command(): command 'arm semihosting_resexit' is already registered Debug: 105 1 command.c:259 register_command(): command 'arm semihosting_read_user_param' is already registered Debug: 106 1 command.c:259 register_command(): command 'arm semihosting_basedir' is already registered Debug: 107 1 command.c:259 register_command(): command 'cache_config' is already registered Debug: 108 1 command.c:259 register_command(): command 'cache_config l2x' is already registered Debug: 109 1 command.c:259 register_command(): command 'cache' is already registered Debug: 110 1 command.c:259 register_command(): command 'cache l1' is already registered Debug: 111 1 command.c:259 register_command(): command 'cache l1 info' is already registered Debug: 112 1 command.c:259 register_command(): command 'cache l1 d' is already registered Debug: 113 1 command.c:259 register_command(): command 'cache l1 d flush_all' is already registered Debug: 114 1 command.c:259 register_command(): command 'cache l1 d inval' is already registered Debug: 115 1 command.c:259 register_command(): command 'cache l1 d clean' is already registered Debug: 116 1 command.c:259 register_command(): command 'cache l1 i' is already registered Debug: 117 1 command.c:259 register_command(): command 'cache l1 i inval_all' is already registered Debug: 118 1 command.c:259 register_command(): command 'cache l1 i inval' is already registered Debug: 119 1 command.c:259 register_command(): command 'cache l2x' is already registered Debug: 120 1 command.c:259 register_command(): command 'cache l2x conf' is already registered Debug: 121 1 command.c:259 register_command(): command 'cache l2x info' is already registered Debug: 122 1 command.c:259 register_command(): command 'cache l2x flush_all' is already registered Debug: 123 1 command.c:259 register_command(): command 'cache l2x flush' is already registered Debug: 124 1 command.c:259 register_command(): command 'cache l2x inval' is already registered Debug: 125 1 command.c:259 register_command(): command 'cache l2x clean' is already registered Debug: 126 1 command.c:259 register_command(): command 'cortex_a' is already registered Debug: 127 1 command.c:259 register_command(): command 'cortex_a cache_info' is already registered Debug: 128 1 command.c:259 register_command(): command 'cortex_a dbginit' is already registered Debug: 129 1 command.c:259 register_command(): command 'cortex_a maskisr' is already registered Debug: 130 1 command.c:259 register_command(): command 'cortex_a dacrfixup' is already registered Debug: 131 1 command.c:259 register_command(): command 'cortex_a mmu' is already registered Debug: 132 1 command.c:259 register_command(): command 'cortex_a mmu dump' is already registered Debug: 133 1 command.c:259 register_command(): command 'cortex_a smp' is already registered Debug: 134 1 command.c:259 register_command(): command 'cortex_a smp_gdb' is already registered Debug: 135 1 command.c:153 script_debug(): command - bcm2836.cpu2 configure -event reset-assert-post cortex_a dbginit Debug: 136 1 command.c:153 script_debug(): command - target create bcm2836.cpu3 cortex_a -dap bcm2836.dap -coreid 3 -dbgbase 0x80016000 Debug: 137 1 command.c:259 register_command(): command 'arm' is already registered Debug: 138 1 command.c:259 register_command(): command 'arm reg' is already registered Debug: 139 1 command.c:259 register_command(): command 'arm mcr' is already registered Debug: 140 1 command.c:259 register_command(): command 'arm mrc' is already registered Debug: 141 1 command.c:259 register_command(): command 'arm mcrr' is already registered Debug: 142 1 command.c:259 register_command(): command 'arm mrrc' is already registered Debug: 143 1 command.c:259 register_command(): command 'arm core_state' is already registered Debug: 144 1 command.c:259 register_command(): command 'arm disassemble' is already registered Debug: 145 1 command.c:259 register_command(): command 'arm semihosting' is already registered Debug: 146 1 command.c:259 register_command(): command 'arm semihosting_redirect' is already registered Debug: 147 1 command.c:259 register_command(): command 'arm semihosting_cmdline' is already registered Debug: 148 1 command.c:259 register_command(): command 'arm semihosting_fileio' is already registered Debug: 149 1 command.c:259 register_command(): command 'arm semihosting_resexit' is already registered Debug: 150 1 command.c:259 register_command(): command 'arm semihosting_read_user_param' is already registered Debug: 151 1 command.c:259 register_command(): command 'arm semihosting_basedir' is already registered Debug: 152 1 command.c:259 register_command(): command 'cache_config' is already registered Debug: 153 1 command.c:259 register_command(): command 'cache_config l2x' is already registered Debug: 154 1 command.c:259 register_command(): command 'cache' is already registered Debug: 155 1 command.c:259 register_command(): command 'cache l1' is already registered Debug: 156 1 command.c:259 register_command(): command 'cache l1 info' is already registered Debug: 157 1 command.c:259 register_command(): command 'cache l1 d' is already registered Debug: 158 1 command.c:259 register_command(): command 'cache l1 d flush_all' is already registered Debug: 159 1 command.c:259 register_command(): command 'cache l1 d inval' is already registered Debug: 160 1 command.c:259 register_command(): command 'cache l1 d clean' is already registered Debug: 161 1 command.c:259 register_command(): command 'cache l1 i' is already registered Debug: 162 1 command.c:259 register_command(): command 'cache l1 i inval_all' is already registered Debug: 163 1 command.c:259 register_command(): command 'cache l1 i inval' is already registered Debug: 164 1 command.c:259 register_command(): command 'cache l2x' is already registered Debug: 165 1 command.c:259 register_command(): command 'cache l2x conf' is already registered Debug: 166 1 command.c:259 register_command(): command 'cache l2x info' is already registered Debug: 167 1 command.c:259 register_command(): command 'cache l2x flush_all' is already registered Debug: 168 1 command.c:259 register_command(): command 'cache l2x flush' is already registered Debug: 169 1 command.c:259 register_command(): command 'cache l2x inval' is already registered Debug: 170 1 command.c:259 register_command(): command 'cache l2x clean' is already registered Debug: 171 1 command.c:259 register_command(): command 'cortex_a' is already registered Debug: 172 1 command.c:259 register_command(): command 'cortex_a cache_info' is already registered Debug: 173 1 command.c:259 register_command(): command 'cortex_a dbginit' is already registered Debug: 174 1 command.c:259 register_command(): command 'cortex_a maskisr' is already registered Debug: 175 1 command.c:259 register_command(): command 'cortex_a dacrfixup' is already registered Debug: 176 1 command.c:259 register_command(): command 'cortex_a mmu' is already registered Debug: 177 1 command.c:259 register_command(): command 'cortex_a mmu dump' is already registered Debug: 178 1 command.c:259 register_command(): command 'cortex_a smp' is already registered Debug: 179 1 command.c:259 register_command(): command 'cortex_a smp_gdb' is already registered Debug: 180 1 command.c:153 script_debug(): command - bcm2836.cpu3 configure -event reset-assert-post cortex_a dbginit Debug: 181 1 command.c:153 script_debug(): command - targets bcm2836.cpu0 Debug: 182 1 command.c:153 script_debug(): command - transport select jtag Warn : 183 1 transport.c:280 handle_transport_select(): Transport "jtag" was already selected Debug: 184 1 command.c:153 script_debug(): command - reset_config trst_only User : 185 1 options.c:52 configuration_output_handler(): trst_only separate trst_push_pullUser : 186 1 options.c:52 configuration_output_handler(): Info : 187 1 server.c:298 add_service(): Listening on port 6666 for tcl connections Info : 188 1 server.c:298 add_service(): Listening on port 4444 for telnet connections Debug: 189 1 command.c:153 script_debug(): command - init Debug: 190 1 command.c:153 script_debug(): command - target init Debug: 191 1 command.c:153 script_debug(): command - target names Debug: 192 2 command.c:153 script_debug(): command - bcm2836.ap cget -event gdb-flash-erase-start Debug: 193 2 command.c:153 script_debug(): command - bcm2836.ap configure -event gdb-flash-erase-start reset init Debug: 194 2 command.c:153 script_debug(): command - bcm2836.ap cget -event gdb-flash-write-end Debug: 195 2 command.c:153 script_debug(): command - bcm2836.ap configure -event gdb-flash-write-end reset halt Debug: 196 2 command.c:153 script_debug(): command - bcm2836.ap cget -event gdb-attach Debug: 197 2 command.c:153 script_debug(): command - bcm2836.ap configure -event gdb-attach halt 1000 Debug: 198 2 command.c:153 script_debug(): command - bcm2836.cpu0 cget -event gdb-flash-erase-start Debug: 199 2 command.c:153 script_debug(): command - bcm2836.cpu0 configure -event gdb-flash-erase-start reset init Debug: 200 2 command.c:153 script_debug(): command - bcm2836.cpu0 cget -event gdb-flash-write-end Debug: 201 2 command.c:153 script_debug(): command - bcm2836.cpu0 configure -event gdb-flash-write-end reset halt Debug: 202 2 command.c:153 script_debug(): command - bcm2836.cpu0 cget -event gdb-attach Debug: 203 2 command.c:153 script_debug(): command - bcm2836.cpu0 configure -event gdb-attach halt 1000 Debug: 204 2 command.c:153 script_debug(): command - bcm2836.cpu1 cget -event gdb-flash-erase-start Debug: 205 2 command.c:153 script_debug(): command - bcm2836.cpu1 configure -event gdb-flash-erase-start reset init Debug: 206 2 command.c:153 script_debug(): command - bcm2836.cpu1 cget -event gdb-flash-write-end Debug: 207 2 command.c:153 script_debug(): command - bcm2836.cpu1 configure -event gdb-flash-write-end reset halt Debug: 208 2 command.c:153 script_debug(): command - bcm2836.cpu1 cget -event gdb-attach Debug: 209 2 command.c:153 script_debug(): command - bcm2836.cpu1 configure -event gdb-attach halt 1000 Debug: 210 2 command.c:153 script_debug(): command - bcm2836.cpu2 cget -event gdb-flash-erase-start Debug: 211 2 command.c:153 script_debug(): command - bcm2836.cpu2 configure -event gdb-flash-erase-start reset init Debug: 212 2 command.c:153 script_debug(): command - bcm2836.cpu2 cget -event gdb-flash-write-end Debug: 213 2 command.c:153 script_debug(): command - bcm2836.cpu2 configure -event gdb-flash-write-end reset halt Debug: 214 2 command.c:153 script_debug(): command - bcm2836.cpu2 cget -event gdb-attach Debug: 215 2 command.c:153 script_debug(): command - bcm2836.cpu2 configure -event gdb-attach halt 1000 Debug: 216 2 command.c:153 script_debug(): command - bcm2836.cpu3 cget -event gdb-flash-erase-start Debug: 217 2 command.c:153 script_debug(): command - bcm2836.cpu3 configure -event gdb-flash-erase-start reset init Debug: 218 2 command.c:153 script_debug(): command - bcm2836.cpu3 cget -event gdb-flash-write-end Debug: 219 2 command.c:153 script_debug(): command - bcm2836.cpu3 configure -event gdb-flash-write-end reset halt Debug: 220 2 command.c:153 script_debug(): command - bcm2836.cpu3 cget -event gdb-attach Debug: 221 2 command.c:153 script_debug(): command - bcm2836.cpu3 configure -event gdb-attach halt 1000 Debug: 222 2 target.c:1588 handle_target_init_command(): Initializing targets... Debug: 223 2 mem_ap.c:61 mem_ap_init_target(): mem_ap_init_target Debug: 224 2 semihosting_common.c:107 semihosting_common_init(): Debug: 225 2 semihosting_common.c:107 semihosting_common_init(): Debug: 226 2 semihosting_common.c:107 semihosting_common_init(): Debug: 227 2 semihosting_common.c:107 semihosting_common_init(): Debug: 228 2 ftdi.c:655 ftdi_initialize(): ftdi interface using shortest path jtag state transitions Debug: 229 12 mpsse.c:424 mpsse_purge(): - Debug: 230 16 mpsse.c:705 mpsse_loopback_config(): off Debug: 231 16 mpsse.c:750 mpsse_set_frequency(): target 4000000 Hz Debug: 232 16 mpsse.c:742 mpsse_rtck_config(): off Debug: 233 16 mpsse.c:731 mpsse_divide_by_5_config(): off Debug: 234 16 mpsse.c:711 mpsse_set_divisor(): 7 Debug: 235 16 mpsse.c:774 mpsse_set_frequency(): actually 3750000 Hz Debug: 236 16 adapter.c:214 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 237 16 adapter.c:218 adapter_khz_to_speed(): have adapter set up Debug: 238 16 mpsse.c:750 mpsse_set_frequency(): target 4000000 Hz Debug: 239 16 mpsse.c:742 mpsse_rtck_config(): off Debug: 240 16 mpsse.c:731 mpsse_divide_by_5_config(): off Debug: 241 16 mpsse.c:711 mpsse_set_divisor(): 7 Debug: 242 16 mpsse.c:774 mpsse_set_frequency(): actually 3750000 Hz Debug: 243 16 adapter.c:214 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 244 16 adapter.c:218 adapter_khz_to_speed(): have adapter set up Info : 245 16 adapter.c:178 adapter_init(): clock speed 4000 kHz Debug: 246 16 openocd.c:133 handle_init_command(): Debug Adapter init complete Debug: 247 16 command.c:153 script_debug(): command - transport init Debug: 248 16 transport.c:219 handle_transport_init(): handle_transport_init Debug: 249 16 core.c:830 jtag_add_reset(): SRST line released Debug: 250 16 core.c:855 jtag_add_reset(): TRST line released Debug: 251 16 core.c:328 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 252 16 command.c:153 script_debug(): command - jtag arp_init Debug: 253 16 core.c:1509 jtag_init_inner(): Init JTAG chain Debug: 254 16 core.c:328 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 255 16 core.c:1234 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS Debug: 256 16 core.c:328 jtag_call_event_callbacks(): jtag event: TAP reset Info : 257 17 core.c:1133 jtag_examine_chain_display(): JTAG tap: bcm2836.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd), part: 0xba00, ver: 0x4) Debug: 258 17 core.c:1364 jtag_validate_ircapture(): IR capture validation scan Debug: 259 17 core.c:1421 jtag_validate_ircapture(): bcm2836.cpu: IR capture 0x01 Debug: 260 17 command.c:153 script_debug(): command - dap init Debug: 261 17 arm_dap.c:96 dap_init_all(): Initializing all DAPs ... Debug: 262 17 arm_dap.c:120 dap_init_all(): DAP bcm2836.cpu configured by default to use ADIv5 protocol Debug: 263 17 arm_adi_v5.c:783 dap_dp_init(): bcm2836.dap Debug: 264 17 arm_adi_v5.c:815 dap_dp_init(): DAP: wait CDBGPWRUPACK Debug: 265 17 arm_adi_v5.h:682 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000 Debug: 266 17 arm_adi_v5.c:823 dap_dp_init(): DAP: wait CSYSPWRUPACK Debug: 267 17 arm_adi_v5.h:682 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000 Debug: 268 17 openocd.c:150 handle_init_command(): Examining targets... Debug: 269 17 target.c:674 target_examine_one(): [bcm2836.ap] Examination started Debug: 270 17 target.c:1774 target_call_event_callbacks(): target event 19 (examine-start) for core bcm2836.ap Debug: 271 17 arm_adi_v5.c:1192 dap_get_ap(): refcount AP#0x0 get 1 Debug: 272 17 arm_adi_v5.c:933 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0 Debug: 273 17 target.c:1774 target_call_event_callbacks(): target event 21 (examine-end) for core bcm2836.ap Info : 274 17 target.c:690 target_examine_one(): [bcm2836.ap] Examination succeed Debug: 275 17 target.c:674 target_examine_one(): [bcm2836.cpu0] Examination started Debug: 276 17 target.c:1774 target_call_event_callbacks(): target event 19 (examine-start) for core bcm2836.cpu0 Debug: 277 17 arm_adi_v5.c:1192 dap_get_ap(): refcount AP#0x0 get 2 Debug: 278 18 arm_adi_v5.c:1135 dap_find_get_ap(): Found MEM-AP APB2 or APB3 at AP index: 0 (IDR=0x24770002) Debug: 279 18 arm_adi_v5.c:933 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0 Debug: 280 18 cortex_a.c:2962 cortex_a_examine_first(): didr = 0x3515f005 Debug: 281 18 cortex_a.c:2963 cortex_a_examine_first(): cpuid = 0x410fc075 Debug: 282 19 cortex_a.c:2972 cortex_a_examine_first(): [bcm2836.cpu0] DBGPRSR 0x2b Debug: 283 19 cortex_a.c:2981 cortex_a_examine_first(): [bcm2836.cpu0] was reset! Debug: 284 19 cortex_a.c:2988 cortex_a_examine_first(): [bcm2836.cpu0] DBGOSLSR 0xa Debug: 285 19 cortex_a.c:2994 cortex_a_examine_first(): [bcm2836.cpu0] OSLock set! Trying to unlock Debug: 286 19 cortex_a.c:3018 cortex_a_examine_first(): [bcm2836.cpu0] has security extensions Debug: 287 19 cortex_a.c:3022 cortex_a_examine_first(): [bcm2836.cpu0] has virtualization extensions Info : 288 19 arm_dpm.c:1148 arm_dpm_setup(): bcm2836.cpu0: hardware has 6 breakpoints, 4 watchpoints Debug: 289 19 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010140 Debug: 290 19 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010144 Debug: 291 20 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010148 Debug: 292 20 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 8001014c Debug: 293 20 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010150 Debug: 294 20 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010154 Debug: 295 20 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800101c0 Debug: 296 21 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800101c4 Debug: 297 21 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800101c8 Debug: 298 21 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800101cc Debug: 299 21 cortex_a.c:3055 cortex_a_examine_first(): Configured 6 hw breakpoints Debug: 300 21 cortex_a.c:3069 cortex_a_examine_first(): Configured 4 hw watchpoints Debug: 301 22 target.c:1774 target_call_event_callbacks(): target event 21 (examine-end) for core bcm2836.cpu0 Info : 302 22 target.c:690 target_examine_one(): [bcm2836.cpu0] Examination succeed Debug: 303 22 target.c:674 target_examine_one(): [bcm2836.cpu1] Examination started Debug: 304 22 target.c:1774 target_call_event_callbacks(): target event 19 (examine-start) for core bcm2836.cpu1 Debug: 305 22 arm_adi_v5.c:1192 dap_get_ap(): refcount AP#0x0 get 3 Debug: 306 22 arm_adi_v5.c:1135 dap_find_get_ap(): Found MEM-AP APB2 or APB3 at AP index: 0 (IDR=0x24770002) Debug: 307 22 arm_adi_v5.c:933 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0 Debug: 308 23 cortex_a.c:2962 cortex_a_examine_first(): didr = 0x3515f005 Debug: 309 23 cortex_a.c:2963 cortex_a_examine_first(): cpuid = 0x410fc075 Debug: 310 23 cortex_a.c:2972 cortex_a_examine_first(): [bcm2836.cpu1] DBGPRSR 0x2b Debug: 311 23 cortex_a.c:2981 cortex_a_examine_first(): [bcm2836.cpu1] was reset! Debug: 312 23 cortex_a.c:2988 cortex_a_examine_first(): [bcm2836.cpu1] DBGOSLSR 0xa Debug: 313 23 cortex_a.c:2994 cortex_a_examine_first(): [bcm2836.cpu1] OSLock set! Trying to unlock Debug: 314 24 cortex_a.c:3018 cortex_a_examine_first(): [bcm2836.cpu1] has security extensions Debug: 315 24 cortex_a.c:3022 cortex_a_examine_first(): [bcm2836.cpu1] has virtualization extensions Info : 316 24 arm_dpm.c:1148 arm_dpm_setup(): bcm2836.cpu1: hardware has 6 breakpoints, 4 watchpoints Debug: 317 24 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012140 Debug: 318 24 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012144 Debug: 319 24 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012148 Debug: 320 24 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 8001214c Debug: 321 25 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012150 Debug: 322 25 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012154 Debug: 323 25 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800121c0 Debug: 324 25 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800121c4 Debug: 325 25 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800121c8 Debug: 326 25 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800121cc Debug: 327 26 cortex_a.c:3055 cortex_a_examine_first(): Configured 6 hw breakpoints Debug: 328 26 cortex_a.c:3069 cortex_a_examine_first(): Configured 4 hw watchpoints Debug: 329 27 target.c:1774 target_call_event_callbacks(): target event 21 (examine-end) for core bcm2836.cpu1 Info : 330 27 target.c:690 target_examine_one(): [bcm2836.cpu1] Examination succeed Debug: 331 27 target.c:674 target_examine_one(): [bcm2836.cpu2] Examination started Debug: 332 27 target.c:1774 target_call_event_callbacks(): target event 19 (examine-start) for core bcm2836.cpu2 Debug: 333 27 arm_adi_v5.c:1192 dap_get_ap(): refcount AP#0x0 get 4 Debug: 334 27 arm_adi_v5.c:1135 dap_find_get_ap(): Found MEM-AP APB2 or APB3 at AP index: 0 (IDR=0x24770002) Debug: 335 27 arm_adi_v5.c:933 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0 Debug: 336 27 cortex_a.c:2962 cortex_a_examine_first(): didr = 0x3515f005 Debug: 337 27 cortex_a.c:2963 cortex_a_examine_first(): cpuid = 0x410fc075 Debug: 338 28 cortex_a.c:2972 cortex_a_examine_first(): [bcm2836.cpu2] DBGPRSR 0x2b Debug: 339 28 cortex_a.c:2981 cortex_a_examine_first(): [bcm2836.cpu2] was reset! Debug: 340 28 cortex_a.c:2988 cortex_a_examine_first(): [bcm2836.cpu2] DBGOSLSR 0xa Debug: 341 28 cortex_a.c:2994 cortex_a_examine_first(): [bcm2836.cpu2] OSLock set! Trying to unlock Debug: 342 28 cortex_a.c:3018 cortex_a_examine_first(): [bcm2836.cpu2] has security extensions Debug: 343 28 cortex_a.c:3022 cortex_a_examine_first(): [bcm2836.cpu2] has virtualization extensions Info : 344 28 arm_dpm.c:1148 arm_dpm_setup(): bcm2836.cpu2: hardware has 6 breakpoints, 4 watchpoints Debug: 345 28 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014140 Debug: 346 29 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014144 Debug: 347 29 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014148 Debug: 348 29 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 8001414c Debug: 349 29 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014150 Debug: 350 29 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014154 Debug: 351 30 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800141c0 Debug: 352 30 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800141c4 Debug: 353 30 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800141c8 Debug: 354 30 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800141cc Debug: 355 30 cortex_a.c:3055 cortex_a_examine_first(): Configured 6 hw breakpoints Debug: 356 30 cortex_a.c:3069 cortex_a_examine_first(): Configured 4 hw watchpoints Debug: 357 31 target.c:1774 target_call_event_callbacks(): target event 21 (examine-end) for core bcm2836.cpu2 Info : 358 31 target.c:690 target_examine_one(): [bcm2836.cpu2] Examination succeed Debug: 359 31 target.c:674 target_examine_one(): [bcm2836.cpu3] Examination started Debug: 360 31 target.c:1774 target_call_event_callbacks(): target event 19 (examine-start) for core bcm2836.cpu3 Debug: 361 31 arm_adi_v5.c:1192 dap_get_ap(): refcount AP#0x0 get 5 Debug: 362 31 arm_adi_v5.c:1135 dap_find_get_ap(): Found MEM-AP APB2 or APB3 at AP index: 0 (IDR=0x24770002) Debug: 363 32 arm_adi_v5.c:933 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0 Debug: 364 32 cortex_a.c:2962 cortex_a_examine_first(): didr = 0x3515f005 Debug: 365 32 cortex_a.c:2963 cortex_a_examine_first(): cpuid = 0x410fc075 Debug: 366 32 cortex_a.c:2972 cortex_a_examine_first(): [bcm2836.cpu3] DBGPRSR 0x2b Debug: 367 32 cortex_a.c:2981 cortex_a_examine_first(): [bcm2836.cpu3] was reset! Debug: 368 33 cortex_a.c:2988 cortex_a_examine_first(): [bcm2836.cpu3] DBGOSLSR 0xa Debug: 369 33 cortex_a.c:2994 cortex_a_examine_first(): [bcm2836.cpu3] OSLock set! Trying to unlock Debug: 370 33 cortex_a.c:3018 cortex_a_examine_first(): [bcm2836.cpu3] has security extensions Debug: 371 33 cortex_a.c:3022 cortex_a_examine_first(): [bcm2836.cpu3] has virtualization extensions Info : 372 33 arm_dpm.c:1148 arm_dpm_setup(): bcm2836.cpu3: hardware has 6 breakpoints, 4 watchpoints Debug: 373 33 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016140 Debug: 374 33 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016144 Debug: 375 33 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016148 Debug: 376 34 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 8001614c Debug: 377 34 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016150 Debug: 378 34 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016154 Debug: 379 34 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800161c0 Debug: 380 34 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800161c4 Debug: 381 35 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800161c8 Debug: 382 35 cortex_a.c:628 cortex_a_bpwp_disable(): A: bpwp disable, cr 800161cc Debug: 383 35 cortex_a.c:3055 cortex_a_examine_first(): Configured 6 hw breakpoints Debug: 384 35 cortex_a.c:3069 cortex_a_examine_first(): Configured 4 hw watchpoints Debug: 385 36 target.c:1774 target_call_event_callbacks(): target event 21 (examine-end) for core bcm2836.cpu3 Info : 386 36 target.c:690 target_examine_one(): [bcm2836.cpu3] Examination succeed Debug: 387 36 command.c:153 script_debug(): command - flash init Debug: 388 36 tcl.c:1364 handle_flash_init_command(): Initializing flash devices... Debug: 389 36 command.c:153 script_debug(): command - nand init Debug: 390 36 tcl.c:484 handle_nand_init_command(): Initializing NAND devices... Debug: 391 36 command.c:153 script_debug(): command - pld init Debug: 392 36 pld.c:337 handle_pld_init_command(): Initializing PLDs... Debug: 393 36 command.c:153 script_debug(): command - tpiu init Info : 394 36 gdb_server.c:3874 gdb_target_add_one(): [bcm2836.ap] gdb port disabled Info : 395 36 gdb_server.c:3840 gdb_target_start(): [bcm2836.cpu0] starting gdb server on 3333 Info : 396 36 server.c:298 add_service(): Listening on port 3333 for gdb connections Info : 397 36 gdb_server.c:3840 gdb_target_start(): [bcm2836.cpu1] starting gdb server on 3334 Info : 398 36 server.c:298 add_service(): Listening on port 3334 for gdb connections Info : 399 36 gdb_server.c:3840 gdb_target_start(): [bcm2836.cpu2] starting gdb server on 3335 Info : 400 36 server.c:298 add_service(): Listening on port 3335 for gdb connections Info : 401 36 gdb_server.c:3840 gdb_target_start(): [bcm2836.cpu3] starting gdb server on 3336 Info : 402 36 server.c:298 add_service(): Listening on port 3336 for gdb connections Debug: 403 36 command.c:153 script_debug(): command - target names Debug: 404 36 command.c:153 script_debug(): command - target names Debug: 405 36 command.c:153 script_debug(): command - bcm2836.ap cget -type Debug: 406 36 command.c:153 script_debug(): command - bcm2836.cpu0 cget -type Debug: 407 36 command.c:153 script_debug(): command - bcm2836.cpu1 cget -type Debug: 408 36 command.c:153 script_debug(): command - bcm2836.cpu2 cget -type Debug: 409 36 command.c:153 script_debug(): command - bcm2836.cpu3 cget -type Info : 410 51435 server.c:91 add_connection(): accepting 'telnet' connection on tcp/4444 Debug: 411 58818 command.c:153 script_debug(): command - halt Debug: 412 58818 target.c:3245 handle_halt_command(): - Debug: 413 58819 cortex_a.c:764 cortex_a_poll(): Target halted Debug: 414 58819 cortex_a.c:1031 cortex_a_debug_entry(): dscr = 0x030c4003 Debug: 415 58819 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 416 58820 arm_dpm.c:269 arm_dpm_read_reg(): READ: r0, 00000000 Debug: 417 58820 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee001e15 Debug: 418 58820 arm_dpm.c:269 arm_dpm_read_reg(): READ: r1, 00000c42 Debug: 419 58820 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xe10f0000 Debug: 420 58820 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 421 58821 armv4_5.c:485 arm_set_cpsr(): set CPSR 0x000001da: Hypervisor mode, ARM state Debug: 422 58821 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee002e15 Debug: 423 58821 arm_dpm.c:269 arm_dpm_read_reg(): READ: r2, 2e0d4d00 Debug: 424 58821 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee003e15 Debug: 425 58821 arm_dpm.c:269 arm_dpm_read_reg(): READ: r3, 00008000 Debug: 426 58821 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee004e15 Debug: 427 58822 arm_dpm.c:269 arm_dpm_read_reg(): READ: r4, 1fb7daf4 Debug: 428 58822 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee005e15 Debug: 429 58822 arm_dpm.c:269 arm_dpm_read_reg(): READ: r5, 00000000 Debug: 430 58822 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee006e15 Debug: 431 58823 arm_dpm.c:269 arm_dpm_read_reg(): READ: r6, 00000000 Debug: 432 58823 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee007e15 Debug: 433 58823 arm_dpm.c:269 arm_dpm_read_reg(): READ: r7, 40000000 Debug: 434 58823 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee008e15 Debug: 435 58823 arm_dpm.c:269 arm_dpm_read_reg(): READ: r8, 7ef73ebd Debug: 436 58823 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee009e15 Debug: 437 58824 arm_dpm.c:269 arm_dpm_read_reg(): READ: r9, 4b4b3e54 Debug: 438 58824 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee00ae15 Debug: 439 58824 arm_dpm.c:269 arm_dpm_read_reg(): READ: r10, 3a6a637c Debug: 440 58824 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee00be15 Debug: 441 58824 arm_dpm.c:269 arm_dpm_read_reg(): READ: r11, ebe33d74 Debug: 442 58824 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee00ce15 Debug: 443 58825 arm_dpm.c:269 arm_dpm_read_reg(): READ: r12, 000001fa Debug: 444 58825 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee00de15 Debug: 445 58825 arm_dpm.c:269 arm_dpm_read_reg(): READ: sp_hyp, eb9a39df Debug: 446 58825 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee00ee15 Debug: 447 58826 arm_dpm.c:269 arm_dpm_read_reg(): READ: lr_usr, e241f8e7 Debug: 448 58826 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xe1a0000f Debug: 449 58826 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 450 58826 arm_dpm.c:269 arm_dpm_read_reg(): READ: pc, 00008004 Debug: 451 58826 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xe14f0000 Debug: 452 58826 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 453 58827 arm_dpm.c:269 arm_dpm_read_reg(): READ: spsr_hyp, 7a0efe5d Debug: 454 58827 arm_dpm.c:53 dpm_mrc(): MRC p15, 0, r0, c1, c0, 0 Debug: 455 58827 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee110f10 Debug: 456 58827 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 457 58827 cortex_a.c:1115 cortex_a_post_debug_entry(): cp15_control_reg: 00c50878 Debug: 458 58828 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee120f50 Debug: 459 58828 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 460 58828 armv7a.c:137 armv7a_read_ttbcr(): ttbcr 0 Debug: 461 58828 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee120f10 Debug: 462 58828 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 463 58829 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee120f30 Debug: 464 58829 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 465 58829 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100f10 Debug: 466 58830 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 467 58830 armv7a.c:104 armv7a_read_midr(): bcm2836.cpu0 rev 5, partnum c07, arch f, variant 0, implementor 41 Debug: 468 58830 armv7a.c:172 armv7a_read_ttbcr(): ttbr1 not used, ttbr0_mask ffffc000 ttbr1_mask ffffc000 Debug: 469 58830 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100f30 Debug: 470 58830 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 471 58831 armv7a.c:390 armv7a_identify_cache(): ctr 84448003 ctr.iminline 32 ctr.dminline 64 Debug: 472 58831 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee300f30 Debug: 473 58831 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 474 58831 armv7a.c:402 armv7a_identify_cache(): Number of cache levels to PoC 2 Debug: 475 58831 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee500f10 Debug: 476 58832 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 477 58832 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x00000000 Debug: 478 58832 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 479 58832 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee400f10 Debug: 480 58832 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee300f10 Debug: 481 58833 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 482 58833 armv7a.c:430 armv7a_identify_cache(): data/unified cache index 127 << 6, way 3 << 30 Debug: 483 58833 armv7a.c:436 armv7a_identify_cache(): cacheline 64 bytes 32 KBytes asso 4 ways Debug: 484 58833 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x00000001 Debug: 485 58833 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 486 58833 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee400f10 Debug: 487 58833 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee300f10 Debug: 488 58834 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 489 58834 armv7a.c:450 armv7a_identify_cache(): instruction cache index 511 << 5, way 1 << 31 Debug: 490 58834 armv7a.c:456 armv7a_identify_cache(): cacheline 32 bytes 32 KBytes asso 2 ways Debug: 491 58834 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x00000002 Debug: 492 58834 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 493 58834 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee400f10 Debug: 494 58834 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee300f10 Debug: 495 58835 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 496 58835 armv7a.c:430 armv7a_identify_cache(): data/unified cache index 1023 << 6, way 7 << 29 Debug: 497 58835 armv7a.c:436 armv7a_identify_cache(): cacheline 64 bytes 512 KBytes asso 8 ways Debug: 498 58835 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x00000000 Debug: 499 58835 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 500 58835 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee500f10 Debug: 501 58836 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100fb0 Debug: 502 58836 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 503 58836 armv7a.c:300 armv7a_read_mpidr(): bcm2836.cpu0: MPIDR 0x80000f00 Info : 504 58836 armv7a.c:306 armv7a_read_mpidr(): bcm2836.cpu0: MPIDR level2 0, cluster f, core 0, multi core, no SMT Debug: 505 58836 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x00000013 Debug: 506 58836 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 507 58836 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xe12ff000 Debug: 508 58837 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee070f95 Debug: 509 58837 arm_dpm.c:53 dpm_mrc(): MRC p15, 0, r0, c3, c0, 0 Debug: 510 58837 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee130f10 Debug: 511 58837 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee000e15 Debug: 512 58838 cortex_a.c:1142 cortex_a_post_debug_entry(): cp15_dacr_reg: 470f19c8 Debug: 513 58838 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x000001da Debug: 514 58838 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 515 58838 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xe12ff000 Debug: 516 58838 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee070f95 Debug: 517 58838 target.c:1774 target_call_event_callbacks(): target event 0 (gdb-halt) for core bcm2836.cpu0 Debug: 518 58838 target.c:1774 target_call_event_callbacks(): target event 1 (halted) for core bcm2836.cpu0 User : 519 58838 armv4_5.c:795 arm_arch_state(): target halted in ARM state due to debug-request, current mode: Hypervisor cpsr: 0x000001da pc: 0x00008004 User : 520 58838 armv7a.c:552 armv7a_arch_state(): MMU: disabled, D-Cache: disabled, I-Cache: disabled Debug: 521 80962 command.c:153 script_debug(): command - step Debug: 522 80962 target.c:3322 handle_step_command(): - Debug: 523 80962 target.c:1774 target_call_event_callbacks(): target event 5 (step-start) for core bcm2836.cpu0 Debug: 524 80963 cortex_a.c:1323 cortex_a_set_breakpoint(): brp 0 control 0x4001e7 value 0x8004 Debug: 525 80963 target.c:2130 target_free_all_working_areas_restore(): freeing all working areas Debug: 526 80963 cortex_a.c:881 cortex_a_internal_restore(): resume pc = 0x00008004 Debug: 527 80963 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x000001da Debug: 528 80963 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 529 80963 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xe12ff000 Debug: 530 80963 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee070f95 Debug: 531 80963 cortex_a.c:1268 cortex_a_restore_context(): Debug: 532 80964 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x000001da Debug: 533 80964 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 534 80964 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xe12ff000 Debug: 535 80964 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee070f95 Debug: 536 80964 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x00008004 Debug: 537 80964 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 538 80965 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xe12fff10 Debug: 539 80965 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x00008004 Debug: 540 80965 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 541 80965 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xe1a0f000 Debug: 542 80965 arm_dpm.c:354 dpm_write_reg(): WRITE: pc, 00008004 Debug: 543 80965 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x00000000 Debug: 544 80965 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee100e15 Debug: 545 80965 arm_dpm.c:354 dpm_write_reg(): WRITE: r0, 00000000 Debug: 546 80965 cortex_a.c:335 cortex_a_write_dcc(): write DCC 0x00000c42 Debug: 547 80965 cortex_a.c:292 cortex_a_exec_opcode(): exec opcode 0xee101e15 Debug: 548 80966 arm_dpm.c:354 dpm_write_reg(): WRITE: r1, 00000c42 Debug: 549 80966 target.c:1774 target_call_event_callbacks(): target event 2 (resumed) for core bcm2836.cpu0 Debug: 550 80966 cortex_a.c:1013 cortex_a_resume(): target resumed at 0x00008004 Error: 551 81967 cortex_a.c:1238 cortex_a_step(): timeout waiting for target halt Debug: 552 81967 command.c:528 exec_command(): Command 'step' failed with error code -4 User : 553 81967 command.c:601 command_run_line(): Regards, Bob |
