[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-611-gb1600bb34

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commit b1600bb342e191463094f534f71a4e5d51407e18
Author: George Voicu <raz...@ho...>
Date:   Sat Nov 5 11:14:22 2022 +0100

    tcl/board: Support for Digilent Nexys 2 board
    
    Support Digilent Nexys 2 board JTAG chain
    
    Signed-off-by: George Voicu <raz...@ho...>
    Change-Id: I350f80b49303c4b0402d93ebc120a591ef727551
    Reviewed-on: https://review.openocd.org/c/openocd/+/7336
    Tested-by: jenkins
    Reviewed-by: Antonio Borneo <bor...@gm...>

diff --git a/tcl/board/digilent_nexys2.cfg b/tcl/board/digilent_nexys2.cfg
new file mode 100644
index 000000000..c1c5b2ac6
--- /dev/null
+++ b/tcl/board/digilent_nexys2.cfg
@@ -0,0 +1,30 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# https://digilent.com/reference/programmable-logic/nexys-2/start
+#
+# The Digilent Nexy2 normally requires proprietary tools to program and will
+# enumerate as:
+#   ID 1443:0005 1443 ONBOARD USB
+#
+# However, the ixo-usb-jtag project provides an alternative open firmware for
+# the on board programmer. When using this firmware the board will then
+# enumerate as:
+#   ID 16c0:06ad ixo.de USB-JTAG-IF (With SerialNumber == hw_nexys)
+#
+# See the interface/usb-jtag.cfg for more information.
+
+source [find interface/usb-jtag.cfg]
+source [find cpld/xilinx-xcf-s.cfg]
+source [find fpga/xilinx-xc3s.cfg]
+
+# Usage:
+#
+# Load Bitstream into FPGA:
+#    openocd -f board/digilent_nexys2.cfg -c "init;\
+#    pld load 0 bitstream.bit;\
+#    shutdown"
+
+# Read Unique Device Identifier (DNA):
+#    openocd -f board/digilent_nexys2.cfg -c "init;\
+#    xilinx_print_dna [xc3s_get_dna xc3s.tap];\
+#    shutdown"

commit a420f00d106cb2638bb4c272a4780e05623ea64b
Author: George Voicu <raz...@ho...>
Date:   Sat Nov 5 11:08:43 2022 +0100

    tcl/fpga: Support for Xilinx Spartan3 series devices
    
    Tap definition for Xilinx Spartan 3/3E/3A/3AN/3A-DSP devices.
    
    Signed-off-by: George Voicu <raz...@ho...>
    Change-Id: Ieda2b61fc270840f9192976697fcac259c45e3b8
    Reviewed-on: https://review.openocd.org/c/openocd/+/7335
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/fpga/xilinx-xc3s.cfg b/tcl/fpga/xilinx-xc3s.cfg
new file mode 100644
index 000000000..7c17206c9
--- /dev/null
+++ b/tcl/fpga/xilinx-xc3s.cfg
@@ -0,0 +1,43 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# Xilinx Spartan3 generation
+# https://www.xilinx.com/support/documentation/user_guides/ug331.pdf
+
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME xc3s
+}
+
+# Table 12-4 in https://www.xilinx.com/support/documentation/user_guides/ug332.pdf
+# the 4 top bits (28:31) are the die stepping, ignore them.
+jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \
+	-expected-id 0x02210093 \
+	-expected-id 0x02218093 \
+	-expected-id 0x02220093 \
+	-expected-id 0x02228093 \
+	-expected-id 0x02230093 \
+	-expected-id 0x02610093 \
+	-expected-id 0x02618093 \
+	-expected-id 0x02620093 \
+	-expected-id 0x02628093 \
+	-expected-id 0x02630093 \
+	-expected-id 0x03840093 \
+	-expected-id 0x0384E093 \
+	-expected-id 0x01C10093 \
+	-expected-id 0x01C1A093 \
+	-expected-id 0x01C22093 \
+	-expected-id 0x01C2E093 \
+	-expected-id 0x01C3A093 \
+	-expected-id 0x0140C093 \
+	-expected-id 0x01414093 \
+	-expected-id 0x0141C093 \
+	-expected-id 0x01428093 \
+	-expected-id 0x01434093 \
+	-expected-id 0x01440093 \
+	-expected-id 0x01448093 \
+	-expected-id 0x01450093
+
+pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap
+
+source [find fpga/xilinx-dna.cfg]

-----------------------------------------------------------------------

Summary of changes:
 tcl/board/digilent_nexys2.cfg      | 30 ++++++++++++++++++++++++++++++
 tcl/{cpld => fpga}/xilinx-xc3s.cfg | 37 ++++++++++++++++++++-----------------
 2 files changed, 50 insertions(+), 17 deletions(-)
 create mode 100644 tcl/board/digilent_nexys2.cfg
 copy tcl/{cpld => fpga}/xilinx-xc3s.cfg (72%)


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