From: openocd-gerrit <ope...@us...> - 2024-06-08 08:46:09
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This is an automated email from the git hooks/post-receive script. It was generated because a ref change was pushed to the repository containing the project "Main OpenOCD repository". The branch, master has been updated via d382c95d57c0ad9ed2dcc83c95404babb7647708 (commit) from 2f8bb252ffb89cb2019f634230bc17b4dfccc75a (commit) Those revisions listed above that are new to this repository have not appeared on any other notification email; so we list those revisions in full, below. - Log ----------------------------------------------------------------- commit d382c95d57c0ad9ed2dcc83c95404babb7647708 Author: Parshintsev Anatoly <ana...@sy...> Date: Thu Jun 22 19:28:52 2023 +0300 target/riscv: support for smp group manipulation this functionality allows to query if a target belongs to some smp group and to dynamically turn on/off smp-specific behavior Change-Id: I67bafb1817c621a38ae4a2f55e12e4143e992c4e Signed-off-by: Parshintsev Anatoly <ana...@sy...> Signed-off-by: Bernhard Rosenkränzer <be...@ba...> Reviewed-on: https://review.openocd.org/c/openocd/+/8296 Tested-by: jenkins Reviewed-by: Antonio Borneo <bor...@gm...> diff --git a/doc/openocd.texi b/doc/openocd.texi index 87e3650b4..b782e0ba9 100644 --- a/doc/openocd.texi +++ b/doc/openocd.texi @@ -11278,6 +11278,18 @@ When utilizing version 0.11 of the RISC-V Debug Specification, and DBUS registers, respectively. @end deffn +@deffn {Command} {riscv smp} [on|off] +Display, enable or disable SMP handling mode. This command is needed only if +user wants to temporary @b{disable} SMP handling for an existing SMP group +(see @code{aarch64 smp} for additional information). To define an SMP +group the command @code{target smp} should be used. +@end deffn + +@deffn {Command} {riscv smp_gdb} [core_id] +Display/set the current core displayed in GDB. This is needed only if +@code{riscv smp} was used. +@end deffn + @deffn {Command} {riscv use_bscan_tunnel} value Enable or disable use of a BSCAN tunnel to reach the Debug Module. Supply the width of the DM transport TAP's instruction register to enable. Supply a diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index 9cd4922d2..511a3c6c3 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -3049,6 +3049,9 @@ static const struct command_registration riscv_command_handlers[] = { .usage = "", .chain = semihosting_common_handlers }, + { + .chain = smp_command_handlers + }, COMMAND_REGISTRATION_DONE }; ----------------------------------------------------------------------- Summary of changes: doc/openocd.texi | 12 ++++++++++++ src/target/riscv/riscv.c | 3 +++ 2 files changed, 15 insertions(+) hooks/post-receive -- Main OpenOCD repository |