[OpenOCD-commit] Main OpenOCD repository branch, master, updated. v0.12.0-455-gd46a3d635

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- Log -----------------------------------------------------------------
commit d46a3d635e3d41e2c531a20c97bde217431b5f76
Author: Marc Schink <de...@za...>
Date:   Sat May 13 12:37:12 2023 +0200

    tcl/target: Add Geehy APM32F0x config
    
    Tested with APM32F030C8T using SWD transport. All flash operations,
    including sector and device protection, work as expected.
    
    Revision identifier (0x0011) is not updated due to missing documentation.
    
    Introduce a new directory structure that contains the manufacturer for
    the sake of clarity.
    
    Change-Id: I679387943b09fef640f8f8b6904e542f4e4b29aa
    Signed-off-by: Marc Schink <de...@za...>
    Reviewed-on: https://review.openocd.org/c/openocd/+/8015
    Reviewed-by: Tomas Vanek <va...@fb...>
    Reviewed-by: Antonio Borneo <bor...@gm...>
    Tested-by: jenkins

diff --git a/tcl/target/geehy/apm32f0x.cfg b/tcl/target/geehy/apm32f0x.cfg
new file mode 100644
index 000000000..502c09275
--- /dev/null
+++ b/tcl/target/geehy/apm32f0x.cfg
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# Geehy APM32F0x target
+#
+# https://global.geehy.com/MCU
+#
+
+#
+# APM32F0x devices support SWD transport only.
+#
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+   set _CHIPNAME $CHIPNAME
+} else {
+   set _CHIPNAME apm32f0x
+}
+
+# Work-area is a space in RAM used for flash programming, by default use 1 KiB.
+if { [info exists WORKAREASIZE] } {
+   set _WORKAREASIZE $WORKAREASIZE
+} else {
+   set _WORKAREASIZE 0x400
+}
+
+if { [info exists CPUTAPID] } {
+   set _CPUTAPID $CPUTAPID
+} else {
+   set _CPUTAPID 0x0bc11477
+}
+
+swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
+
+adapter speed 1000
+
+if {![using_hla]} {
+   # if srst is not fitted use SYSRESETREQ to perform a soft reset.
+   cortex_m reset_config sysresetreq
+}

-----------------------------------------------------------------------

Summary of changes:
 tcl/target/geehy/apm32f0x.cfg | 49 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 49 insertions(+)
 create mode 100644 tcl/target/geehy/apm32f0x.cfg


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